hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/arch/arm/boot/dts/exynos5420-arndale-octa.dts
....@@ -15,7 +15,7 @@
1515 #include <dt-bindings/clock/samsung,s2mps11.h>
1616
1717 / {
18
- model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
18
+ model = "Insignal Arndale Octa evaluation board based on Exynos5420";
1919 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
2020
2121 memory@20000000 {
....@@ -24,7 +24,7 @@
2424 };
2525
2626 chosen {
27
- bootargs = "console=ttySAC3,115200";
27
+ stdout-path = "serial3:115200n8";
2828 };
2929
3030 firmware@2073000 {
....@@ -51,6 +51,15 @@
5151 };
5252 };
5353
54
+&adc {
55
+ vdd-supply = <&ldo4_reg>;
56
+ status = "okay";
57
+};
58
+
59
+&cci {
60
+ status = "disabled";
61
+};
62
+
5463 &cpu0 {
5564 cpu-supply = <&buck2_reg>;
5665 };
....@@ -59,12 +68,268 @@
5968 cpu-supply = <&buck6_reg>;
6069 };
6170
62
-&usbdrd_dwc3_1 {
63
- dr_mode = "host";
71
+&cpu0_thermal {
72
+ trips {
73
+ cpu0_alert0: cpu-alert-0 {
74
+ temperature = <60000>; /* millicelsius */
75
+ hysteresis = <5000>; /* millicelsius */
76
+ type = "passive";
77
+ };
78
+ cpu0_alert1: cpu-alert-1 {
79
+ temperature = <80000>; /* millicelsius */
80
+ hysteresis = <10000>; /* millicelsius */
81
+ type = "passive";
82
+ };
83
+ cpu0_alert2: cpu-alert-2 {
84
+ temperature = <110000>; /* millicelsius */
85
+ hysteresis = <10000>; /* millicelsius */
86
+ type = "passive";
87
+ };
88
+ cpu0_crit0: cpu-crit-0 {
89
+ temperature = <120000>; /* millicelsius */
90
+ hysteresis = <0>; /* millicelsius */
91
+ type = "critical";
92
+ };
93
+ };
94
+
95
+ cooling-maps {
96
+ /*
97
+ * Reduce the CPU speed by 2 steps, down to: 1600 MHz
98
+ * and 1100 MHz.
99
+ */
100
+ map0 {
101
+ trip = <&cpu0_alert0>;
102
+ cooling-device = <&cpu0 0 2>,
103
+ <&cpu1 0 2>,
104
+ <&cpu2 0 2>,
105
+ <&cpu3 0 2>,
106
+ <&cpu4 0 2>,
107
+ <&cpu5 0 2>,
108
+ <&cpu6 0 2>,
109
+ <&cpu7 0 2>;
110
+ };
111
+
112
+ /*
113
+ * Reduce the CPU speed down to 1200 MHz big (6 steps)
114
+ * and 800 MHz LITTLE (5 steps).
115
+ */
116
+ map1 {
117
+ trip = <&cpu0_alert1>;
118
+ cooling-device = <&cpu0 3 6>,
119
+ <&cpu1 3 6>,
120
+ <&cpu2 3 6>,
121
+ <&cpu3 3 6>,
122
+ <&cpu4 3 5>,
123
+ <&cpu5 3 5>,
124
+ <&cpu6 3 5>,
125
+ <&cpu7 3 5>;
126
+ };
127
+
128
+ /*
129
+ * Reduce the CPU speed as much as possible, down to 700 MHz
130
+ * big (11 steps) and 600 MHz LITTLE (7 steps).
131
+ */
132
+ map2 {
133
+ trip = <&cpu0_alert2>;
134
+ cooling-device = <&cpu0 6 11>,
135
+ <&cpu1 6 11>,
136
+ <&cpu2 6 11>,
137
+ <&cpu3 6 11>,
138
+ <&cpu4 5 7>,
139
+ <&cpu5 5 7>,
140
+ <&cpu6 5 7>,
141
+ <&cpu7 5 7>;
142
+ };
143
+ };
64144 };
65145
66
-&cci {
67
- status = "disabled";
146
+&cpu1_thermal {
147
+ trips {
148
+ cpu1_alert0: cpu-alert-0 {
149
+ temperature = <60000>; /* millicelsius */
150
+ hysteresis = <5000>; /* millicelsius */
151
+ type = "passive";
152
+ };
153
+ cpu1_alert1: cpu-alert-1 {
154
+ temperature = <80000>; /* millicelsius */
155
+ hysteresis = <10000>; /* millicelsius */
156
+ type = "passive";
157
+ };
158
+ cpu1_alert2: cpu-alert-2 {
159
+ temperature = <110000>; /* millicelsius */
160
+ hysteresis = <10000>; /* millicelsius */
161
+ type = "passive";
162
+ };
163
+ cpu1_crit0: cpu-crit-0 {
164
+ temperature = <120000>; /* millicelsius */
165
+ hysteresis = <0>; /* millicelsius */
166
+ type = "critical";
167
+ };
168
+ };
169
+
170
+ cooling-maps {
171
+ map0 {
172
+ trip = <&cpu1_alert0>;
173
+ cooling-device = <&cpu0 0 2>,
174
+ <&cpu1 0 2>,
175
+ <&cpu2 0 2>,
176
+ <&cpu3 0 2>,
177
+ <&cpu4 0 2>,
178
+ <&cpu5 0 2>,
179
+ <&cpu6 0 2>,
180
+ <&cpu7 0 2>;
181
+ };
182
+
183
+ map1 {
184
+ trip = <&cpu1_alert1>;
185
+ cooling-device = <&cpu0 3 6>,
186
+ <&cpu1 3 6>,
187
+ <&cpu2 3 6>,
188
+ <&cpu3 3 6>,
189
+ <&cpu4 3 5>,
190
+ <&cpu5 3 5>,
191
+ <&cpu6 3 5>,
192
+ <&cpu7 3 5>;
193
+ };
194
+
195
+ map2 {
196
+ trip = <&cpu1_alert2>;
197
+ cooling-device = <&cpu0 6 11>,
198
+ <&cpu1 6 11>,
199
+ <&cpu2 6 11>,
200
+ <&cpu3 6 11>,
201
+ <&cpu4 5 7>,
202
+ <&cpu5 5 7>,
203
+ <&cpu6 5 7>,
204
+ <&cpu7 5 7>;
205
+ };
206
+ };
207
+};
208
+
209
+&cpu2_thermal {
210
+ trips {
211
+ cpu2_alert0: cpu-alert-0 {
212
+ temperature = <60000>; /* millicelsius */
213
+ hysteresis = <5000>; /* millicelsius */
214
+ type = "passive";
215
+ };
216
+ cpu2_alert1: cpu-alert-1 {
217
+ temperature = <80000>; /* millicelsius */
218
+ hysteresis = <10000>; /* millicelsius */
219
+ type = "passive";
220
+ };
221
+ cpu2_alert2: cpu-alert-2 {
222
+ temperature = <110000>; /* millicelsius */
223
+ hysteresis = <10000>; /* millicelsius */
224
+ type = "passive";
225
+ };
226
+ cpu2_crit0: cpu-crit-0 {
227
+ temperature = <120000>; /* millicelsius */
228
+ hysteresis = <0>; /* millicelsius */
229
+ type = "critical";
230
+ };
231
+ };
232
+
233
+ cooling-maps {
234
+ map0 {
235
+ trip = <&cpu2_alert0>;
236
+ cooling-device = <&cpu0 0 2>,
237
+ <&cpu1 0 2>,
238
+ <&cpu2 0 2>,
239
+ <&cpu3 0 2>,
240
+ <&cpu4 0 2>,
241
+ <&cpu5 0 2>,
242
+ <&cpu6 0 2>,
243
+ <&cpu7 0 2>;
244
+ };
245
+
246
+ map1 {
247
+ trip = <&cpu2_alert1>;
248
+ cooling-device = <&cpu0 3 6>,
249
+ <&cpu1 3 6>,
250
+ <&cpu2 3 6>,
251
+ <&cpu3 3 6>,
252
+ <&cpu4 3 5>,
253
+ <&cpu5 3 5>,
254
+ <&cpu6 3 5>,
255
+ <&cpu7 3 5>;
256
+ };
257
+
258
+ map2 {
259
+ trip = <&cpu2_alert2>;
260
+ cooling-device = <&cpu0 6 11>,
261
+ <&cpu1 6 11>,
262
+ <&cpu2 6 11>,
263
+ <&cpu3 6 11>,
264
+ <&cpu4 6 7>,
265
+ <&cpu5 6 7>,
266
+ <&cpu6 6 7>,
267
+ <&cpu7 6 7>;
268
+ };
269
+ };
270
+};
271
+
272
+&cpu3_thermal {
273
+ trips {
274
+ cpu3_alert0: cpu-alert-0 {
275
+ temperature = <60000>; /* millicelsius */
276
+ hysteresis = <5000>; /* millicelsius */
277
+ type = "passive";
278
+ };
279
+ cpu3_alert1: cpu-alert-1 {
280
+ temperature = <80000>; /* millicelsius */
281
+ hysteresis = <10000>; /* millicelsius */
282
+ type = "passive";
283
+ };
284
+ cpu3_alert2: cpu-alert-2 {
285
+ temperature = <110000>; /* millicelsius */
286
+ hysteresis = <10000>; /* millicelsius */
287
+ type = "passive";
288
+ };
289
+ cpu3_crit0: cpu-crit-0 {
290
+ temperature = <120000>; /* millicelsius */
291
+ hysteresis = <0>; /* millicelsius */
292
+ type = "critical";
293
+ };
294
+ };
295
+
296
+ cooling-maps {
297
+ map0 {
298
+ trip = <&cpu3_alert0>;
299
+ cooling-device = <&cpu0 0 2>,
300
+ <&cpu1 0 2>,
301
+ <&cpu2 0 2>,
302
+ <&cpu3 0 2>,
303
+ <&cpu4 0 2>,
304
+ <&cpu5 0 2>,
305
+ <&cpu6 0 2>,
306
+ <&cpu7 0 2>;
307
+ };
308
+
309
+ map1 {
310
+ trip = <&cpu3_alert1>;
311
+ cooling-device = <&cpu0 3 6>,
312
+ <&cpu1 3 6>,
313
+ <&cpu2 3 6>,
314
+ <&cpu3 3 6>,
315
+ <&cpu4 3 5>,
316
+ <&cpu5 3 5>,
317
+ <&cpu6 3 5>,
318
+ <&cpu7 3 5>;
319
+ };
320
+
321
+ map2 {
322
+ trip = <&cpu3_alert2>;
323
+ cooling-device = <&cpu0 6 11>,
324
+ <&cpu1 6 11>,
325
+ <&cpu2 6 11>,
326
+ <&cpu3 6 11>,
327
+ <&cpu4 5 7>,
328
+ <&cpu5 5 7>,
329
+ <&cpu6 5 7>,
330
+ <&cpu7 5 7>;
331
+ };
332
+ };
68333 };
69334
70335 &hdmi {
....@@ -89,6 +354,7 @@
89354 pinctrl-0 = <&s2mps11_irq>;
90355
91356 s2mps11_osc: clocks {
357
+ compatible = "samsung,s2mps11-clk";
92358 #clock-cells = <1>;
93359 clock-output-names = "s2mps11_ap",
94360 "s2mps11_cp", "s2mps11_bt";
....@@ -113,7 +379,17 @@
113379 regulator-name = "PVDD_APIO_MMCON_1V8";
114380 regulator-min-microvolt = <1800000>;
115381 regulator-max-microvolt = <1800000>;
382
+ /*
383
+ * Must be always on, even though there is
384
+ * a consumer (mmc_0). Otherwise the board
385
+ * does not reboot with vendor U-Boot
386
+ * (Linaro for Arndale Octa, v2012.07).
387
+ */
116388 regulator-always-on;
389
+
390
+ regulator-state-mem {
391
+ regulator-off-in-suspend;
392
+ };
117393 };
118394
119395 ldo4_reg: LDO4 {
....@@ -139,6 +415,10 @@
139415 regulator-name = "PVDD_ANAIP_1V8";
140416 regulator-min-microvolt = <1800000>;
141417 regulator-max-microvolt = <1800000>;
418
+
419
+ regulator-state-mem {
420
+ regulator-off-in-suspend;
421
+ };
142422 };
143423
144424 ldo8_reg: LDO8 {
....@@ -177,32 +457,74 @@
177457
178458 ldo13_reg: LDO13 {
179459 regulator-name = "PVDD_APIO_MMCOFF_2V8";
180
- regulator-min-microvolt = <2800000>;
460
+ regulator-min-microvolt = <1800000>;
181461 regulator-max-microvolt = <2800000>;
462
+
463
+ regulator-state-mem {
464
+ regulator-off-in-suspend;
465
+ };
466
+ };
467
+
468
+ ldo14_reg: LDO14 {
469
+ /* Unused */
470
+ regulator-name = "PVDD_LDO14";
471
+ regulator-min-microvolt = <800000>;
472
+ regulator-max-microvolt = <3950000>;
182473 };
183474
184475 ldo15_reg: LDO15 {
185476 regulator-name = "PVDD_PERI_2V8";
186477 regulator-min-microvolt = <3300000>;
187478 regulator-max-microvolt = <3300000>;
479
+
480
+ regulator-state-mem {
481
+ regulator-on-in-suspend;
482
+ };
188483 };
189484
190485 ldo16_reg: LDO16 {
191486 regulator-name = "PVDD_PERI_3V3";
192487 regulator-min-microvolt = <2200000>;
193488 regulator-max-microvolt = <2200000>;
489
+
490
+ regulator-state-mem {
491
+ regulator-on-in-suspend;
492
+ };
493
+ };
494
+
495
+ ldo17_reg: LDO17 {
496
+ /* Unused */
497
+ regulator-name = "PVDD_LDO17";
498
+ regulator-min-microvolt = <800000>;
499
+ regulator-max-microvolt = <3950000>;
194500 };
195501
196502 ldo18_reg: LDO18 {
197503 regulator-name = "PVDD_EMMC_1V8";
198504 regulator-min-microvolt = <1800000>;
199505 regulator-max-microvolt = <1800000>;
506
+ /*
507
+ * Must stay in "off" mode during shutdown for
508
+ * proper eMMC reset. The "off" mode is in
509
+ * fact controlled by LDO18EN. The eMMC does
510
+ * not have reset pin connected so the reset
511
+ * will be triggered by falling edge of
512
+ * LDO18EN.
513
+ */
514
+
515
+ regulator-state-mem {
516
+ regulator-off-in-suspend;
517
+ };
200518 };
201519
202520 ldo19_reg: LDO19 {
203521 regulator-name = "PVDD_TFLASH_2V8";
204522 regulator-min-microvolt = <2800000>;
205523 regulator-max-microvolt = <2800000>;
524
+
525
+ regulator-state-mem {
526
+ regulator-off-in-suspend;
527
+ };
206528 };
207529
208530 ldo20_reg: LDO20 {
....@@ -217,17 +539,39 @@
217539 regulator-max-microvolt = <1800000>;
218540 };
219541
542
+ ldo22_reg: LDO22 {
543
+ /* Unused */
544
+ regulator-name = "PVDD_LDO22";
545
+ regulator-min-microvolt = <800000>;
546
+ regulator-max-microvolt = <2375000>;
547
+ };
548
+
220549 ldo23_reg: LDO23 {
221550 regulator-name = "PVDD_MIFS_1V1";
222
- regulator-min-microvolt = <1200000>;
223
- regulator-max-microvolt = <1200000>;
551
+ regulator-min-microvolt = <800000>;
552
+ regulator-max-microvolt = <1100000>;
224553 regulator-always-on;
554
+
555
+ regulator-state-mem {
556
+ regulator-on-in-suspend;
557
+ };
225558 };
226559
227560 ldo24_reg: LDO24 {
228561 regulator-name = "PVDD_CAM1_AVDD_2V8";
229562 regulator-min-microvolt = <2800000>;
230563 regulator-max-microvolt = <2800000>;
564
+
565
+ regulator-state-mem {
566
+ regulator-on-in-suspend;
567
+ };
568
+ };
569
+
570
+ ldo25_reg: LDO25 {
571
+ /* Unused */
572
+ regulator-name = "PVDD_LDO25";
573
+ regulator-min-microvolt = <800000>;
574
+ regulator-max-microvolt = <3950000>;
231575 };
232576
233577 ldo26_reg: LDO26 {
....@@ -238,8 +582,13 @@
238582
239583 ldo27_reg: LDO27 {
240584 regulator-name = "PVDD_G3DS_1V0";
241
- regulator-min-microvolt = <1200000>;
242
- regulator-max-microvolt = <1200000>;
585
+ regulator-min-microvolt = <800000>;
586
+ regulator-max-microvolt = <1100000>;
587
+ regulator-always-on;
588
+
589
+ regulator-state-mem {
590
+ regulator-on-in-suspend;
591
+ };
243592 };
244593
245594 ldo28_reg: LDO28 {
....@@ -252,6 +601,13 @@
252601 regulator-name = "PVDD_AUDIO_1V8";
253602 regulator-min-microvolt = <1800000>;
254603 regulator-max-microvolt = <1800000>;
604
+ };
605
+
606
+ ldo30_reg: LDO30 {
607
+ /* Unused */
608
+ regulator-name = "PVDD_LDO30";
609
+ regulator-min-microvolt = <800000>;
610
+ regulator-max-microvolt = <3950000>;
255611 };
256612
257613 ldo31_reg: LDO31 {
....@@ -272,10 +628,31 @@
272628 regulator-max-microvolt = <1800000>;
273629 };
274630
631
+ ldo34_reg: LDO34 {
632
+ /* Unused */
633
+ regulator-name = "PVDD_LDO34";
634
+ regulator-min-microvolt = <800000>;
635
+ regulator-max-microvolt = <3950000>;
636
+ };
637
+
275638 ldo35_reg: LDO35 {
276639 regulator-name = "PVDD_CAM0_DVDD_1V2";
277640 regulator-min-microvolt = <1200000>;
278641 regulator-max-microvolt = <1200000>;
642
+ };
643
+
644
+ ldo36_reg: LDO36 {
645
+ /* Unused */
646
+ regulator-name = "PVDD_LDO36";
647
+ regulator-min-microvolt = <800000>;
648
+ regulator-max-microvolt = <3950000>;
649
+ };
650
+
651
+ ldo37_reg: LDO37 {
652
+ /* Unused */
653
+ regulator-name = "PVDD_LDO37";
654
+ regulator-min-microvolt = <800000>;
655
+ regulator-max-microvolt = <3950000>;
279656 };
280657
281658 ldo38_reg: LDO38 {
....@@ -287,55 +664,76 @@
287664 buck1_reg: BUCK1 {
288665 regulator-name = "PVDD_MIF_1V1";
289666 regulator-min-microvolt = <800000>;
290
- regulator-max-microvolt = <1100000>;
667
+ regulator-max-microvolt = <1300000>;
291668 regulator-always-on;
669
+
670
+ regulator-state-mem {
671
+ regulator-off-in-suspend;
672
+ };
292673 };
293674
294675 buck2_reg: BUCK2 {
295
- regulator-name = "vdd_arm";
676
+ regulator-name = "PVDD_ARM_1V0";
296677 regulator-min-microvolt = <800000>;
297
- regulator-max-microvolt = <1000000>;
678
+ regulator-max-microvolt = <1500000>;
298679 regulator-always-on;
680
+
681
+ regulator-state-mem {
682
+ regulator-off-in-suspend;
683
+ };
299684 };
300685
301686 buck3_reg: BUCK3 {
302687 regulator-name = "PVDD_INT_1V0";
303688 regulator-min-microvolt = <800000>;
304
- regulator-max-microvolt = <1000000>;
689
+ regulator-max-microvolt = <1400000>;
305690 regulator-always-on;
691
+
692
+ regulator-state-mem {
693
+ regulator-off-in-suspend;
694
+ };
306695 };
307696
308697 buck4_reg: BUCK4 {
309698 regulator-name = "PVDD_G3D_1V0";
310699 regulator-min-microvolt = <800000>;
311
- regulator-max-microvolt = <1000000>;
700
+ regulator-max-microvolt = <1400000>;
701
+ regulator-always-on;
702
+
703
+ regulator-state-mem {
704
+ regulator-off-in-suspend;
705
+ };
312706 };
313707
314708 buck5_reg: BUCK5 {
315709 regulator-name = "PVDD_LPDDR3_1V2";
316710 regulator-min-microvolt = <800000>;
317
- regulator-max-microvolt = <1200000>;
711
+ regulator-max-microvolt = <1400000>;
318712 regulator-always-on;
319713 };
320714
321715 buck6_reg: BUCK6 {
322716 regulator-name = "PVDD_KFC_1V0";
323717 regulator-min-microvolt = <800000>;
324
- regulator-max-microvolt = <1000000>;
718
+ regulator-max-microvolt = <1500000>;
325719 regulator-always-on;
720
+
721
+ regulator-state-mem {
722
+ regulator-off-in-suspend;
723
+ };
326724 };
327725
328726 buck7_reg: BUCK7 {
329727 regulator-name = "VIN_LLDO_1V4";
330
- regulator-min-microvolt = <800000>;
331
- regulator-max-microvolt = <1400000>;
728
+ regulator-min-microvolt = <1200000>;
729
+ regulator-max-microvolt = <1500000>;
332730 regulator-always-on;
333731 };
334732
335733 buck8_reg: BUCK8 {
336734 regulator-name = "VIN_MLDO_2V0";
337
- regulator-min-microvolt = <800000>;
338
- regulator-max-microvolt = <2000000>;
735
+ regulator-min-microvolt = <1800000>;
736
+ regulator-max-microvolt = <2100000>;
339737 regulator-always-on;
340738 };
341739
....@@ -350,6 +748,18 @@
350748 regulator-name = "PVDD_EMMCF_2V8";
351749 regulator-min-microvolt = <2800000>;
352750 regulator-max-microvolt = <2800000>;
751
+ /*
752
+ * Must stay in "off" mode during shutdown for
753
+ * proper eMMC reset. The "off" mode is in
754
+ * fact controlled by BUCK10EN. The eMMC does
755
+ * not have reset pin connected so the reset
756
+ * will be triggered by falling edge of
757
+ * BUCK10EN.
758
+ */
759
+
760
+ regulator-state-mem {
761
+ regulator-off-in-suspend;
762
+ };
353763 };
354764 };
355765 };
....@@ -365,30 +775,35 @@
365775
366776 &mmc_0 {
367777 status = "okay";
368
- broken-cd;
778
+ non-removable;
369779 card-detect-delay = <200>;
370780 samsung,dw-mshc-ciu-div = <3>;
371781 samsung,dw-mshc-sdr-timing = <0 4>;
372782 samsung,dw-mshc-ddr-timing = <0 2>;
373783 pinctrl-names = "default";
374784 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
375
- vmmc-supply = <&ldo10_reg>;
785
+ vmmc-supply = <&ldo18_reg>;
786
+ vqmmc-supply = <&ldo3_reg>;
376787 bus-width = <8>;
377788 cap-mmc-highspeed;
789
+ mmc-hs200-1_8v;
378790 };
379791
380792 &mmc_2 {
381793 status = "okay";
382794 card-detect-delay = <200>;
383795 samsung,dw-mshc-ciu-div = <3>;
384
- samsung,dw-mshc-sdr-timing = <2 3>;
385
- samsung,dw-mshc-ddr-timing = <1 2>;
796
+ samsung,dw-mshc-sdr-timing = <0 4>;
797
+ samsung,dw-mshc-ddr-timing = <0 2>;
386798 pinctrl-names = "default";
387799 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
388800 vmmc-supply = <&ldo19_reg>;
389801 vqmmc-supply = <&ldo13_reg>;
390802 bus-width = <4>;
391803 cap-sd-highspeed;
804
+ sd-uhs-sdr50;
805
+ sd-uhs-sdr104;
806
+ sd-uhs-ddr50;
392807 };
393808
394809 &pinctrl_0 {
....@@ -405,3 +820,7 @@
405820 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
406821 clock-names = "rtc", "rtc_src";
407822 };
823
+
824
+&usbdrd_dwc3_1 {
825
+ dr_mode = "host";
826
+};