.. | .. |
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15 | 15 | #include <dt-bindings/clock/samsung,s2mps11.h> |
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16 | 16 | |
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17 | 17 | / { |
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18 | | - model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; |
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| 18 | + model = "Insignal Arndale Octa evaluation board based on Exynos5420"; |
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19 | 19 | compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; |
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20 | 20 | |
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21 | 21 | memory@20000000 { |
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.. | .. |
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24 | 24 | }; |
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25 | 25 | |
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26 | 26 | chosen { |
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27 | | - bootargs = "console=ttySAC3,115200"; |
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| 27 | + stdout-path = "serial3:115200n8"; |
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28 | 28 | }; |
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29 | 29 | |
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30 | 30 | firmware@2073000 { |
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.. | .. |
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51 | 51 | }; |
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52 | 52 | }; |
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53 | 53 | |
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| 54 | +&adc { |
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| 55 | + vdd-supply = <&ldo4_reg>; |
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| 56 | + status = "okay"; |
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| 57 | +}; |
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| 58 | + |
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| 59 | +&cci { |
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| 60 | + status = "disabled"; |
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| 61 | +}; |
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| 62 | + |
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54 | 63 | &cpu0 { |
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55 | 64 | cpu-supply = <&buck2_reg>; |
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56 | 65 | }; |
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.. | .. |
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59 | 68 | cpu-supply = <&buck6_reg>; |
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60 | 69 | }; |
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61 | 70 | |
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62 | | -&usbdrd_dwc3_1 { |
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63 | | - dr_mode = "host"; |
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| 71 | +&cpu0_thermal { |
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| 72 | + trips { |
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| 73 | + cpu0_alert0: cpu-alert-0 { |
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| 74 | + temperature = <60000>; /* millicelsius */ |
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| 75 | + hysteresis = <5000>; /* millicelsius */ |
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| 76 | + type = "passive"; |
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| 77 | + }; |
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| 78 | + cpu0_alert1: cpu-alert-1 { |
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| 79 | + temperature = <80000>; /* millicelsius */ |
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| 80 | + hysteresis = <10000>; /* millicelsius */ |
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| 81 | + type = "passive"; |
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| 82 | + }; |
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| 83 | + cpu0_alert2: cpu-alert-2 { |
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| 84 | + temperature = <110000>; /* millicelsius */ |
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| 85 | + hysteresis = <10000>; /* millicelsius */ |
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| 86 | + type = "passive"; |
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| 87 | + }; |
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| 88 | + cpu0_crit0: cpu-crit-0 { |
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| 89 | + temperature = <120000>; /* millicelsius */ |
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| 90 | + hysteresis = <0>; /* millicelsius */ |
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| 91 | + type = "critical"; |
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| 92 | + }; |
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| 93 | + }; |
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| 94 | + |
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| 95 | + cooling-maps { |
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| 96 | + /* |
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| 97 | + * Reduce the CPU speed by 2 steps, down to: 1600 MHz |
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| 98 | + * and 1100 MHz. |
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| 99 | + */ |
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| 100 | + map0 { |
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| 101 | + trip = <&cpu0_alert0>; |
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| 102 | + cooling-device = <&cpu0 0 2>, |
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| 103 | + <&cpu1 0 2>, |
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| 104 | + <&cpu2 0 2>, |
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| 105 | + <&cpu3 0 2>, |
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| 106 | + <&cpu4 0 2>, |
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| 107 | + <&cpu5 0 2>, |
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| 108 | + <&cpu6 0 2>, |
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| 109 | + <&cpu7 0 2>; |
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| 110 | + }; |
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| 111 | + |
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| 112 | + /* |
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| 113 | + * Reduce the CPU speed down to 1200 MHz big (6 steps) |
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| 114 | + * and 800 MHz LITTLE (5 steps). |
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| 115 | + */ |
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| 116 | + map1 { |
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| 117 | + trip = <&cpu0_alert1>; |
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| 118 | + cooling-device = <&cpu0 3 6>, |
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| 119 | + <&cpu1 3 6>, |
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| 120 | + <&cpu2 3 6>, |
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| 121 | + <&cpu3 3 6>, |
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| 122 | + <&cpu4 3 5>, |
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| 123 | + <&cpu5 3 5>, |
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| 124 | + <&cpu6 3 5>, |
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| 125 | + <&cpu7 3 5>; |
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| 126 | + }; |
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| 127 | + |
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| 128 | + /* |
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| 129 | + * Reduce the CPU speed as much as possible, down to 700 MHz |
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| 130 | + * big (11 steps) and 600 MHz LITTLE (7 steps). |
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| 131 | + */ |
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| 132 | + map2 { |
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| 133 | + trip = <&cpu0_alert2>; |
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| 134 | + cooling-device = <&cpu0 6 11>, |
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| 135 | + <&cpu1 6 11>, |
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| 136 | + <&cpu2 6 11>, |
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| 137 | + <&cpu3 6 11>, |
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| 138 | + <&cpu4 5 7>, |
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| 139 | + <&cpu5 5 7>, |
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| 140 | + <&cpu6 5 7>, |
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| 141 | + <&cpu7 5 7>; |
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| 142 | + }; |
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| 143 | + }; |
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64 | 144 | }; |
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65 | 145 | |
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66 | | -&cci { |
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67 | | - status = "disabled"; |
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| 146 | +&cpu1_thermal { |
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| 147 | + trips { |
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| 148 | + cpu1_alert0: cpu-alert-0 { |
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| 149 | + temperature = <60000>; /* millicelsius */ |
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| 150 | + hysteresis = <5000>; /* millicelsius */ |
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| 151 | + type = "passive"; |
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| 152 | + }; |
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| 153 | + cpu1_alert1: cpu-alert-1 { |
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| 154 | + temperature = <80000>; /* millicelsius */ |
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| 155 | + hysteresis = <10000>; /* millicelsius */ |
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| 156 | + type = "passive"; |
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| 157 | + }; |
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| 158 | + cpu1_alert2: cpu-alert-2 { |
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| 159 | + temperature = <110000>; /* millicelsius */ |
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| 160 | + hysteresis = <10000>; /* millicelsius */ |
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| 161 | + type = "passive"; |
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| 162 | + }; |
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| 163 | + cpu1_crit0: cpu-crit-0 { |
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| 164 | + temperature = <120000>; /* millicelsius */ |
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| 165 | + hysteresis = <0>; /* millicelsius */ |
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| 166 | + type = "critical"; |
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| 167 | + }; |
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| 168 | + }; |
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| 169 | + |
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| 170 | + cooling-maps { |
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| 171 | + map0 { |
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| 172 | + trip = <&cpu1_alert0>; |
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| 173 | + cooling-device = <&cpu0 0 2>, |
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| 174 | + <&cpu1 0 2>, |
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| 175 | + <&cpu2 0 2>, |
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| 176 | + <&cpu3 0 2>, |
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| 177 | + <&cpu4 0 2>, |
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| 178 | + <&cpu5 0 2>, |
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| 179 | + <&cpu6 0 2>, |
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| 180 | + <&cpu7 0 2>; |
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| 181 | + }; |
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| 182 | + |
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| 183 | + map1 { |
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| 184 | + trip = <&cpu1_alert1>; |
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| 185 | + cooling-device = <&cpu0 3 6>, |
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| 186 | + <&cpu1 3 6>, |
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| 187 | + <&cpu2 3 6>, |
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| 188 | + <&cpu3 3 6>, |
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| 189 | + <&cpu4 3 5>, |
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| 190 | + <&cpu5 3 5>, |
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| 191 | + <&cpu6 3 5>, |
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| 192 | + <&cpu7 3 5>; |
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| 193 | + }; |
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| 194 | + |
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| 195 | + map2 { |
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| 196 | + trip = <&cpu1_alert2>; |
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| 197 | + cooling-device = <&cpu0 6 11>, |
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| 198 | + <&cpu1 6 11>, |
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| 199 | + <&cpu2 6 11>, |
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| 200 | + <&cpu3 6 11>, |
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| 201 | + <&cpu4 5 7>, |
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| 202 | + <&cpu5 5 7>, |
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| 203 | + <&cpu6 5 7>, |
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| 204 | + <&cpu7 5 7>; |
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| 205 | + }; |
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| 206 | + }; |
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| 207 | +}; |
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| 208 | + |
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| 209 | +&cpu2_thermal { |
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| 210 | + trips { |
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| 211 | + cpu2_alert0: cpu-alert-0 { |
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| 212 | + temperature = <60000>; /* millicelsius */ |
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| 213 | + hysteresis = <5000>; /* millicelsius */ |
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| 214 | + type = "passive"; |
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| 215 | + }; |
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| 216 | + cpu2_alert1: cpu-alert-1 { |
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| 217 | + temperature = <80000>; /* millicelsius */ |
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| 218 | + hysteresis = <10000>; /* millicelsius */ |
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| 219 | + type = "passive"; |
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| 220 | + }; |
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| 221 | + cpu2_alert2: cpu-alert-2 { |
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| 222 | + temperature = <110000>; /* millicelsius */ |
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| 223 | + hysteresis = <10000>; /* millicelsius */ |
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| 224 | + type = "passive"; |
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| 225 | + }; |
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| 226 | + cpu2_crit0: cpu-crit-0 { |
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| 227 | + temperature = <120000>; /* millicelsius */ |
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| 228 | + hysteresis = <0>; /* millicelsius */ |
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| 229 | + type = "critical"; |
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| 230 | + }; |
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| 231 | + }; |
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| 232 | + |
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| 233 | + cooling-maps { |
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| 234 | + map0 { |
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| 235 | + trip = <&cpu2_alert0>; |
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| 236 | + cooling-device = <&cpu0 0 2>, |
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| 237 | + <&cpu1 0 2>, |
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| 238 | + <&cpu2 0 2>, |
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| 239 | + <&cpu3 0 2>, |
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| 240 | + <&cpu4 0 2>, |
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| 241 | + <&cpu5 0 2>, |
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| 242 | + <&cpu6 0 2>, |
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| 243 | + <&cpu7 0 2>; |
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| 244 | + }; |
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| 245 | + |
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| 246 | + map1 { |
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| 247 | + trip = <&cpu2_alert1>; |
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| 248 | + cooling-device = <&cpu0 3 6>, |
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| 249 | + <&cpu1 3 6>, |
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| 250 | + <&cpu2 3 6>, |
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| 251 | + <&cpu3 3 6>, |
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| 252 | + <&cpu4 3 5>, |
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| 253 | + <&cpu5 3 5>, |
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| 254 | + <&cpu6 3 5>, |
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| 255 | + <&cpu7 3 5>; |
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| 256 | + }; |
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| 257 | + |
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| 258 | + map2 { |
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| 259 | + trip = <&cpu2_alert2>; |
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| 260 | + cooling-device = <&cpu0 6 11>, |
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| 261 | + <&cpu1 6 11>, |
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| 262 | + <&cpu2 6 11>, |
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| 263 | + <&cpu3 6 11>, |
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| 264 | + <&cpu4 6 7>, |
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| 265 | + <&cpu5 6 7>, |
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| 266 | + <&cpu6 6 7>, |
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| 267 | + <&cpu7 6 7>; |
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| 268 | + }; |
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| 269 | + }; |
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| 270 | +}; |
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| 271 | + |
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| 272 | +&cpu3_thermal { |
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| 273 | + trips { |
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| 274 | + cpu3_alert0: cpu-alert-0 { |
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| 275 | + temperature = <60000>; /* millicelsius */ |
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| 276 | + hysteresis = <5000>; /* millicelsius */ |
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| 277 | + type = "passive"; |
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| 278 | + }; |
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| 279 | + cpu3_alert1: cpu-alert-1 { |
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| 280 | + temperature = <80000>; /* millicelsius */ |
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| 281 | + hysteresis = <10000>; /* millicelsius */ |
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| 282 | + type = "passive"; |
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| 283 | + }; |
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| 284 | + cpu3_alert2: cpu-alert-2 { |
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| 285 | + temperature = <110000>; /* millicelsius */ |
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| 286 | + hysteresis = <10000>; /* millicelsius */ |
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| 287 | + type = "passive"; |
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| 288 | + }; |
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| 289 | + cpu3_crit0: cpu-crit-0 { |
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| 290 | + temperature = <120000>; /* millicelsius */ |
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| 291 | + hysteresis = <0>; /* millicelsius */ |
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| 292 | + type = "critical"; |
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| 293 | + }; |
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| 294 | + }; |
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| 295 | + |
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| 296 | + cooling-maps { |
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| 297 | + map0 { |
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| 298 | + trip = <&cpu3_alert0>; |
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| 299 | + cooling-device = <&cpu0 0 2>, |
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| 300 | + <&cpu1 0 2>, |
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| 301 | + <&cpu2 0 2>, |
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| 302 | + <&cpu3 0 2>, |
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| 303 | + <&cpu4 0 2>, |
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| 304 | + <&cpu5 0 2>, |
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| 305 | + <&cpu6 0 2>, |
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| 306 | + <&cpu7 0 2>; |
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| 307 | + }; |
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| 308 | + |
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| 309 | + map1 { |
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| 310 | + trip = <&cpu3_alert1>; |
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| 311 | + cooling-device = <&cpu0 3 6>, |
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| 312 | + <&cpu1 3 6>, |
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| 313 | + <&cpu2 3 6>, |
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| 314 | + <&cpu3 3 6>, |
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| 315 | + <&cpu4 3 5>, |
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| 316 | + <&cpu5 3 5>, |
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| 317 | + <&cpu6 3 5>, |
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| 318 | + <&cpu7 3 5>; |
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| 319 | + }; |
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| 320 | + |
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| 321 | + map2 { |
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| 322 | + trip = <&cpu3_alert2>; |
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| 323 | + cooling-device = <&cpu0 6 11>, |
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| 324 | + <&cpu1 6 11>, |
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| 325 | + <&cpu2 6 11>, |
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| 326 | + <&cpu3 6 11>, |
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| 327 | + <&cpu4 5 7>, |
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| 328 | + <&cpu5 5 7>, |
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| 329 | + <&cpu6 5 7>, |
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| 330 | + <&cpu7 5 7>; |
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| 331 | + }; |
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| 332 | + }; |
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68 | 333 | }; |
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69 | 334 | |
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70 | 335 | &hdmi { |
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.. | .. |
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89 | 354 | pinctrl-0 = <&s2mps11_irq>; |
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90 | 355 | |
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91 | 356 | s2mps11_osc: clocks { |
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| 357 | + compatible = "samsung,s2mps11-clk"; |
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92 | 358 | #clock-cells = <1>; |
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93 | 359 | clock-output-names = "s2mps11_ap", |
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94 | 360 | "s2mps11_cp", "s2mps11_bt"; |
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.. | .. |
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113 | 379 | regulator-name = "PVDD_APIO_MMCON_1V8"; |
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114 | 380 | regulator-min-microvolt = <1800000>; |
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115 | 381 | regulator-max-microvolt = <1800000>; |
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| 382 | + /* |
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| 383 | + * Must be always on, even though there is |
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| 384 | + * a consumer (mmc_0). Otherwise the board |
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| 385 | + * does not reboot with vendor U-Boot |
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| 386 | + * (Linaro for Arndale Octa, v2012.07). |
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| 387 | + */ |
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116 | 388 | regulator-always-on; |
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| 389 | + |
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| 390 | + regulator-state-mem { |
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| 391 | + regulator-off-in-suspend; |
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| 392 | + }; |
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117 | 393 | }; |
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118 | 394 | |
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119 | 395 | ldo4_reg: LDO4 { |
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.. | .. |
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139 | 415 | regulator-name = "PVDD_ANAIP_1V8"; |
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140 | 416 | regulator-min-microvolt = <1800000>; |
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141 | 417 | regulator-max-microvolt = <1800000>; |
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| 418 | + |
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| 419 | + regulator-state-mem { |
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| 420 | + regulator-off-in-suspend; |
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| 421 | + }; |
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142 | 422 | }; |
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143 | 423 | |
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144 | 424 | ldo8_reg: LDO8 { |
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.. | .. |
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177 | 457 | |
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178 | 458 | ldo13_reg: LDO13 { |
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179 | 459 | regulator-name = "PVDD_APIO_MMCOFF_2V8"; |
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180 | | - regulator-min-microvolt = <2800000>; |
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| 460 | + regulator-min-microvolt = <1800000>; |
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181 | 461 | regulator-max-microvolt = <2800000>; |
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| 462 | + |
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| 463 | + regulator-state-mem { |
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| 464 | + regulator-off-in-suspend; |
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| 465 | + }; |
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| 466 | + }; |
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| 467 | + |
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| 468 | + ldo14_reg: LDO14 { |
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| 469 | + /* Unused */ |
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| 470 | + regulator-name = "PVDD_LDO14"; |
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| 471 | + regulator-min-microvolt = <800000>; |
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| 472 | + regulator-max-microvolt = <3950000>; |
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182 | 473 | }; |
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183 | 474 | |
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184 | 475 | ldo15_reg: LDO15 { |
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185 | 476 | regulator-name = "PVDD_PERI_2V8"; |
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186 | 477 | regulator-min-microvolt = <3300000>; |
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187 | 478 | regulator-max-microvolt = <3300000>; |
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| 479 | + |
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| 480 | + regulator-state-mem { |
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| 481 | + regulator-on-in-suspend; |
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| 482 | + }; |
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188 | 483 | }; |
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189 | 484 | |
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190 | 485 | ldo16_reg: LDO16 { |
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191 | 486 | regulator-name = "PVDD_PERI_3V3"; |
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192 | 487 | regulator-min-microvolt = <2200000>; |
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193 | 488 | regulator-max-microvolt = <2200000>; |
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| 489 | + |
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| 490 | + regulator-state-mem { |
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| 491 | + regulator-on-in-suspend; |
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| 492 | + }; |
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| 493 | + }; |
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| 494 | + |
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| 495 | + ldo17_reg: LDO17 { |
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| 496 | + /* Unused */ |
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| 497 | + regulator-name = "PVDD_LDO17"; |
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| 498 | + regulator-min-microvolt = <800000>; |
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| 499 | + regulator-max-microvolt = <3950000>; |
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194 | 500 | }; |
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195 | 501 | |
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196 | 502 | ldo18_reg: LDO18 { |
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197 | 503 | regulator-name = "PVDD_EMMC_1V8"; |
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198 | 504 | regulator-min-microvolt = <1800000>; |
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199 | 505 | regulator-max-microvolt = <1800000>; |
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| 506 | + /* |
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| 507 | + * Must stay in "off" mode during shutdown for |
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| 508 | + * proper eMMC reset. The "off" mode is in |
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| 509 | + * fact controlled by LDO18EN. The eMMC does |
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| 510 | + * not have reset pin connected so the reset |
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| 511 | + * will be triggered by falling edge of |
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| 512 | + * LDO18EN. |
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| 513 | + */ |
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| 514 | + |
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| 515 | + regulator-state-mem { |
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| 516 | + regulator-off-in-suspend; |
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| 517 | + }; |
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200 | 518 | }; |
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201 | 519 | |
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202 | 520 | ldo19_reg: LDO19 { |
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203 | 521 | regulator-name = "PVDD_TFLASH_2V8"; |
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204 | 522 | regulator-min-microvolt = <2800000>; |
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205 | 523 | regulator-max-microvolt = <2800000>; |
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| 524 | + |
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| 525 | + regulator-state-mem { |
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| 526 | + regulator-off-in-suspend; |
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| 527 | + }; |
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206 | 528 | }; |
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207 | 529 | |
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208 | 530 | ldo20_reg: LDO20 { |
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.. | .. |
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217 | 539 | regulator-max-microvolt = <1800000>; |
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218 | 540 | }; |
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219 | 541 | |
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| 542 | + ldo22_reg: LDO22 { |
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| 543 | + /* Unused */ |
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| 544 | + regulator-name = "PVDD_LDO22"; |
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| 545 | + regulator-min-microvolt = <800000>; |
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| 546 | + regulator-max-microvolt = <2375000>; |
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| 547 | + }; |
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| 548 | + |
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220 | 549 | ldo23_reg: LDO23 { |
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221 | 550 | regulator-name = "PVDD_MIFS_1V1"; |
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222 | | - regulator-min-microvolt = <1200000>; |
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223 | | - regulator-max-microvolt = <1200000>; |
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| 551 | + regulator-min-microvolt = <800000>; |
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| 552 | + regulator-max-microvolt = <1100000>; |
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224 | 553 | regulator-always-on; |
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| 554 | + |
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| 555 | + regulator-state-mem { |
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| 556 | + regulator-on-in-suspend; |
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| 557 | + }; |
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225 | 558 | }; |
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226 | 559 | |
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227 | 560 | ldo24_reg: LDO24 { |
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228 | 561 | regulator-name = "PVDD_CAM1_AVDD_2V8"; |
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229 | 562 | regulator-min-microvolt = <2800000>; |
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230 | 563 | regulator-max-microvolt = <2800000>; |
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| 564 | + |
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| 565 | + regulator-state-mem { |
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| 566 | + regulator-on-in-suspend; |
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| 567 | + }; |
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| 568 | + }; |
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| 569 | + |
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| 570 | + ldo25_reg: LDO25 { |
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| 571 | + /* Unused */ |
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| 572 | + regulator-name = "PVDD_LDO25"; |
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| 573 | + regulator-min-microvolt = <800000>; |
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| 574 | + regulator-max-microvolt = <3950000>; |
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231 | 575 | }; |
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232 | 576 | |
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233 | 577 | ldo26_reg: LDO26 { |
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.. | .. |
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238 | 582 | |
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239 | 583 | ldo27_reg: LDO27 { |
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240 | 584 | regulator-name = "PVDD_G3DS_1V0"; |
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241 | | - regulator-min-microvolt = <1200000>; |
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242 | | - regulator-max-microvolt = <1200000>; |
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| 585 | + regulator-min-microvolt = <800000>; |
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| 586 | + regulator-max-microvolt = <1100000>; |
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| 587 | + regulator-always-on; |
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| 588 | + |
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| 589 | + regulator-state-mem { |
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| 590 | + regulator-on-in-suspend; |
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| 591 | + }; |
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243 | 592 | }; |
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244 | 593 | |
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245 | 594 | ldo28_reg: LDO28 { |
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.. | .. |
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252 | 601 | regulator-name = "PVDD_AUDIO_1V8"; |
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253 | 602 | regulator-min-microvolt = <1800000>; |
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254 | 603 | regulator-max-microvolt = <1800000>; |
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| 604 | + }; |
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| 605 | + |
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| 606 | + ldo30_reg: LDO30 { |
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| 607 | + /* Unused */ |
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| 608 | + regulator-name = "PVDD_LDO30"; |
---|
| 609 | + regulator-min-microvolt = <800000>; |
---|
| 610 | + regulator-max-microvolt = <3950000>; |
---|
255 | 611 | }; |
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256 | 612 | |
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257 | 613 | ldo31_reg: LDO31 { |
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.. | .. |
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272 | 628 | regulator-max-microvolt = <1800000>; |
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273 | 629 | }; |
---|
274 | 630 | |
---|
| 631 | + ldo34_reg: LDO34 { |
---|
| 632 | + /* Unused */ |
---|
| 633 | + regulator-name = "PVDD_LDO34"; |
---|
| 634 | + regulator-min-microvolt = <800000>; |
---|
| 635 | + regulator-max-microvolt = <3950000>; |
---|
| 636 | + }; |
---|
| 637 | + |
---|
275 | 638 | ldo35_reg: LDO35 { |
---|
276 | 639 | regulator-name = "PVDD_CAM0_DVDD_1V2"; |
---|
277 | 640 | regulator-min-microvolt = <1200000>; |
---|
278 | 641 | regulator-max-microvolt = <1200000>; |
---|
| 642 | + }; |
---|
| 643 | + |
---|
| 644 | + ldo36_reg: LDO36 { |
---|
| 645 | + /* Unused */ |
---|
| 646 | + regulator-name = "PVDD_LDO36"; |
---|
| 647 | + regulator-min-microvolt = <800000>; |
---|
| 648 | + regulator-max-microvolt = <3950000>; |
---|
| 649 | + }; |
---|
| 650 | + |
---|
| 651 | + ldo37_reg: LDO37 { |
---|
| 652 | + /* Unused */ |
---|
| 653 | + regulator-name = "PVDD_LDO37"; |
---|
| 654 | + regulator-min-microvolt = <800000>; |
---|
| 655 | + regulator-max-microvolt = <3950000>; |
---|
279 | 656 | }; |
---|
280 | 657 | |
---|
281 | 658 | ldo38_reg: LDO38 { |
---|
.. | .. |
---|
287 | 664 | buck1_reg: BUCK1 { |
---|
288 | 665 | regulator-name = "PVDD_MIF_1V1"; |
---|
289 | 666 | regulator-min-microvolt = <800000>; |
---|
290 | | - regulator-max-microvolt = <1100000>; |
---|
| 667 | + regulator-max-microvolt = <1300000>; |
---|
291 | 668 | regulator-always-on; |
---|
| 669 | + |
---|
| 670 | + regulator-state-mem { |
---|
| 671 | + regulator-off-in-suspend; |
---|
| 672 | + }; |
---|
292 | 673 | }; |
---|
293 | 674 | |
---|
294 | 675 | buck2_reg: BUCK2 { |
---|
295 | | - regulator-name = "vdd_arm"; |
---|
| 676 | + regulator-name = "PVDD_ARM_1V0"; |
---|
296 | 677 | regulator-min-microvolt = <800000>; |
---|
297 | | - regulator-max-microvolt = <1000000>; |
---|
| 678 | + regulator-max-microvolt = <1500000>; |
---|
298 | 679 | regulator-always-on; |
---|
| 680 | + |
---|
| 681 | + regulator-state-mem { |
---|
| 682 | + regulator-off-in-suspend; |
---|
| 683 | + }; |
---|
299 | 684 | }; |
---|
300 | 685 | |
---|
301 | 686 | buck3_reg: BUCK3 { |
---|
302 | 687 | regulator-name = "PVDD_INT_1V0"; |
---|
303 | 688 | regulator-min-microvolt = <800000>; |
---|
304 | | - regulator-max-microvolt = <1000000>; |
---|
| 689 | + regulator-max-microvolt = <1400000>; |
---|
305 | 690 | regulator-always-on; |
---|
| 691 | + |
---|
| 692 | + regulator-state-mem { |
---|
| 693 | + regulator-off-in-suspend; |
---|
| 694 | + }; |
---|
306 | 695 | }; |
---|
307 | 696 | |
---|
308 | 697 | buck4_reg: BUCK4 { |
---|
309 | 698 | regulator-name = "PVDD_G3D_1V0"; |
---|
310 | 699 | regulator-min-microvolt = <800000>; |
---|
311 | | - regulator-max-microvolt = <1000000>; |
---|
| 700 | + regulator-max-microvolt = <1400000>; |
---|
| 701 | + regulator-always-on; |
---|
| 702 | + |
---|
| 703 | + regulator-state-mem { |
---|
| 704 | + regulator-off-in-suspend; |
---|
| 705 | + }; |
---|
312 | 706 | }; |
---|
313 | 707 | |
---|
314 | 708 | buck5_reg: BUCK5 { |
---|
315 | 709 | regulator-name = "PVDD_LPDDR3_1V2"; |
---|
316 | 710 | regulator-min-microvolt = <800000>; |
---|
317 | | - regulator-max-microvolt = <1200000>; |
---|
| 711 | + regulator-max-microvolt = <1400000>; |
---|
318 | 712 | regulator-always-on; |
---|
319 | 713 | }; |
---|
320 | 714 | |
---|
321 | 715 | buck6_reg: BUCK6 { |
---|
322 | 716 | regulator-name = "PVDD_KFC_1V0"; |
---|
323 | 717 | regulator-min-microvolt = <800000>; |
---|
324 | | - regulator-max-microvolt = <1000000>; |
---|
| 718 | + regulator-max-microvolt = <1500000>; |
---|
325 | 719 | regulator-always-on; |
---|
| 720 | + |
---|
| 721 | + regulator-state-mem { |
---|
| 722 | + regulator-off-in-suspend; |
---|
| 723 | + }; |
---|
326 | 724 | }; |
---|
327 | 725 | |
---|
328 | 726 | buck7_reg: BUCK7 { |
---|
329 | 727 | regulator-name = "VIN_LLDO_1V4"; |
---|
330 | | - regulator-min-microvolt = <800000>; |
---|
331 | | - regulator-max-microvolt = <1400000>; |
---|
| 728 | + regulator-min-microvolt = <1200000>; |
---|
| 729 | + regulator-max-microvolt = <1500000>; |
---|
332 | 730 | regulator-always-on; |
---|
333 | 731 | }; |
---|
334 | 732 | |
---|
335 | 733 | buck8_reg: BUCK8 { |
---|
336 | 734 | regulator-name = "VIN_MLDO_2V0"; |
---|
337 | | - regulator-min-microvolt = <800000>; |
---|
338 | | - regulator-max-microvolt = <2000000>; |
---|
| 735 | + regulator-min-microvolt = <1800000>; |
---|
| 736 | + regulator-max-microvolt = <2100000>; |
---|
339 | 737 | regulator-always-on; |
---|
340 | 738 | }; |
---|
341 | 739 | |
---|
.. | .. |
---|
350 | 748 | regulator-name = "PVDD_EMMCF_2V8"; |
---|
351 | 749 | regulator-min-microvolt = <2800000>; |
---|
352 | 750 | regulator-max-microvolt = <2800000>; |
---|
| 751 | + /* |
---|
| 752 | + * Must stay in "off" mode during shutdown for |
---|
| 753 | + * proper eMMC reset. The "off" mode is in |
---|
| 754 | + * fact controlled by BUCK10EN. The eMMC does |
---|
| 755 | + * not have reset pin connected so the reset |
---|
| 756 | + * will be triggered by falling edge of |
---|
| 757 | + * BUCK10EN. |
---|
| 758 | + */ |
---|
| 759 | + |
---|
| 760 | + regulator-state-mem { |
---|
| 761 | + regulator-off-in-suspend; |
---|
| 762 | + }; |
---|
353 | 763 | }; |
---|
354 | 764 | }; |
---|
355 | 765 | }; |
---|
.. | .. |
---|
365 | 775 | |
---|
366 | 776 | &mmc_0 { |
---|
367 | 777 | status = "okay"; |
---|
368 | | - broken-cd; |
---|
| 778 | + non-removable; |
---|
369 | 779 | card-detect-delay = <200>; |
---|
370 | 780 | samsung,dw-mshc-ciu-div = <3>; |
---|
371 | 781 | samsung,dw-mshc-sdr-timing = <0 4>; |
---|
372 | 782 | samsung,dw-mshc-ddr-timing = <0 2>; |
---|
373 | 783 | pinctrl-names = "default"; |
---|
374 | 784 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; |
---|
375 | | - vmmc-supply = <&ldo10_reg>; |
---|
| 785 | + vmmc-supply = <&ldo18_reg>; |
---|
| 786 | + vqmmc-supply = <&ldo3_reg>; |
---|
376 | 787 | bus-width = <8>; |
---|
377 | 788 | cap-mmc-highspeed; |
---|
| 789 | + mmc-hs200-1_8v; |
---|
378 | 790 | }; |
---|
379 | 791 | |
---|
380 | 792 | &mmc_2 { |
---|
381 | 793 | status = "okay"; |
---|
382 | 794 | card-detect-delay = <200>; |
---|
383 | 795 | samsung,dw-mshc-ciu-div = <3>; |
---|
384 | | - samsung,dw-mshc-sdr-timing = <2 3>; |
---|
385 | | - samsung,dw-mshc-ddr-timing = <1 2>; |
---|
| 796 | + samsung,dw-mshc-sdr-timing = <0 4>; |
---|
| 797 | + samsung,dw-mshc-ddr-timing = <0 2>; |
---|
386 | 798 | pinctrl-names = "default"; |
---|
387 | 799 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
---|
388 | 800 | vmmc-supply = <&ldo19_reg>; |
---|
389 | 801 | vqmmc-supply = <&ldo13_reg>; |
---|
390 | 802 | bus-width = <4>; |
---|
391 | 803 | cap-sd-highspeed; |
---|
| 804 | + sd-uhs-sdr50; |
---|
| 805 | + sd-uhs-sdr104; |
---|
| 806 | + sd-uhs-ddr50; |
---|
392 | 807 | }; |
---|
393 | 808 | |
---|
394 | 809 | &pinctrl_0 { |
---|
.. | .. |
---|
405 | 820 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; |
---|
406 | 821 | clock-names = "rtc", "rtc_src"; |
---|
407 | 822 | }; |
---|
| 823 | + |
---|
| 824 | +&usbdrd_dwc3_1 { |
---|
| 825 | + dr_mode = "host"; |
---|
| 826 | +}; |
---|