.. | .. |
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5 | 5 | |
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6 | 6 | Required properites: |
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7 | 7 | - reg : Offset and length of the register set of the RCPM block. |
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8 | | - - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the |
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| 8 | + - #fsl,rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the |
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9 | 9 | fsl,rcpm-wakeup property. |
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10 | 10 | - compatible : Must contain a chip-specific RCPM block compatible string |
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11 | 11 | and (if applicable) may contain a chassis-version RCPM compatible |
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.. | .. |
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20 | 20 | * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm |
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21 | 21 | * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm |
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22 | 22 | * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm |
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| 23 | + * "fsl,qoriq-rcpm-2.1+": for chassis 2.1+ rcpm |
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23 | 24 | |
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24 | 25 | All references to "1.0" and "2.0" refer to the QorIQ chassis version to |
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25 | 26 | which the chip complies. |
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.. | .. |
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27 | 28 | --------------- ------------------------------- |
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28 | 29 | 1.0 p4080, p5020, p5040, p2041, p3041 |
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29 | 30 | 2.0 t4240, b4860, b4420 |
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30 | | -2.1 t1040, ls1021 |
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| 31 | +2.1 t1040, |
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| 32 | +2.1+ ls1021a, ls1012a, ls1043a, ls1046a |
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| 33 | + |
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| 34 | +Optional properties: |
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| 35 | + - little-endian : RCPM register block is Little Endian. Without it RCPM |
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| 36 | + will be Big Endian (default case). |
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31 | 37 | |
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32 | 38 | Example: |
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33 | 39 | The RCPM node for T4240: |
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34 | 40 | rcpm: global-utilities@e2000 { |
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35 | 41 | compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0"; |
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36 | 42 | reg = <0xe2000 0x1000>; |
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37 | | - fsl,#rcpm-wakeup-cells = <2>; |
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| 43 | + #fsl,rcpm-wakeup-cells = <2>; |
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38 | 44 | }; |
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39 | 45 | |
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40 | 46 | * Freescale RCPM Wakeup Source Device Tree Bindings |
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.. | .. |
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44 | 50 | |
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45 | 51 | - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR |
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46 | 52 | register cells. The number of IPPDEXPCR register cells is defined in |
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47 | | - "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is |
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| 53 | + "#fsl,rcpm-wakeup-cells" in the rcpm node. The first register cell is |
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48 | 54 | the bit mask that should be set in IPPDEXPCR0, and the second register |
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49 | 55 | cell is for IPPDEXPCR1, and so on. |
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50 | 56 | |
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