modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
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@@ -18,7 +18,8 @@
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 - reg : offset and length of the device registers.
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 - bus-frequency : the clock frequency for QUICC Engine.
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 - fsl,qe-num-riscs: define how many RISC engines the QE has.
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-- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the
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+- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
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+  defining the array of serial number (SNUM) values for the virtual
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   threads.
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 Optional properties:
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@@ -34,6 +35,11 @@
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 - brg-frequency : the internal clock source frequency for baud-rate
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   generators in Hz.
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+Deprecated properties
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+- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
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+  for the threads. Use fsl,qe-snums instead to not only specify the
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+  number of snums, but also their values.
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+
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 Example:
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      qe@e0100000 {
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 	#address-cells = <1>;
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@@ -44,6 +50,11 @@
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 	reg = <e0100000 480>;
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 	brg-frequency = <0>;
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 	bus-frequency = <179A7B00>;
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+	fsl,qe-snums = /bits/ 8 <
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+		0x04 0x05 0x0C 0x0D 0x14 0x15 0x1C 0x1D
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+		0x24 0x25 0x2C 0x2D 0x34 0x35 0x88 0x89
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+		0x98 0x99 0xA8 0xA9 0xB8 0xB9 0xC8 0xC9
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+		0xD8 0xD9 0xE8 0xE9>;
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      }
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 * Multi-User RAM (MURAM)