kernel/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
.. .. @@ -1,10 +1,13 @@ 1 1 Microsemi Ocelot reset controller 2 2 3 3 The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the 4 -SoC MIPS core.4 +SoC core.5 +6 +The reset registers are both present in the MSCC vcoreiii MIPS and7 +microchip Sparx5 armv8 SoC's.5 8 6 9 Required Properties: 7 - - compatible: "mscc,ocelot-chip-reset"10 + - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"8 11 9 12 Example: 10 13 reset@1070008 {