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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/Documentation/devicetree/bindings/net/stmmac.txt
....@@ -1,178 +1 @@
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-* STMicroelectronics 10/100/1000/2500/10000 Ethernet (GMAC/XGMAC)
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-
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-Required properties:
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-- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" or
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-	"snps,dwxgmac-<ip_version>", "snps,dwxgmac".
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-	For backwards compatibility: "st,spear600-gmac" is also supported.
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-- reg: Address and length of the register set for the device
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-- interrupts: Should contain the STMMAC interrupts
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-- interrupt-names: Should contain a list of interrupt names corresponding to
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-	the interrupts in the interrupts property, if available.
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-	Valid interrupt names are:
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-  - "macirq" (combined signal for various interrupt events)
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-  - "eth_wake_irq" (the interrupt to manage the remote wake-up packet detection)
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-  - "eth_lpi" (the interrupt that occurs when Rx exits the LPI state)
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-- phy-mode: See ethernet.txt file in the same directory.
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-- snps,reset-gpio 	gpio number for phy reset.
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-- snps,reset-active-low boolean flag to indicate if phy reset is active low.
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-- snps,reset-delays-us  is triplet of delays
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-	The 1st cell is reset pre-delay in micro seconds.
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-	The 2nd cell is reset pulse in micro seconds.
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-	The 3rd cell is reset post-delay in micro seconds.
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-
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-Optional properties:
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-- resets: Should contain a phandle to the STMMAC reset signal, if any
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-- reset-names: Should contain the reset signal name "stmmaceth", if a
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-	reset phandle is given
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-- max-frame-size: See ethernet.txt file in the same directory
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-- clocks: If present, the first clock should be the GMAC main clock and
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-  the second clock should be peripheral's register interface clock. Further
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-  clocks may be specified in derived bindings.
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-- clock-names: One name for each entry in the clocks property, the
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-  first one should be "stmmaceth" and the second one should be "pclk".
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-- ptp_ref: this is the PTP reference clock; in case of the PTP is available
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-  this clock is used for programming the Timestamp Addend Register. If not
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-  passed then the system clock will be used and this is fine on some
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-  platforms.
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-- tx-fifo-depth: See ethernet.txt file in the same directory
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-- rx-fifo-depth: See ethernet.txt file in the same directory
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-- snps,pbl		Programmable Burst Length (tx and rx)
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-- snps,txpbl		Tx Programmable Burst Length. Only for GMAC and newer.
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-			If set, DMA tx will use this value rather than snps,pbl.
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-- snps,rxpbl		Rx Programmable Burst Length. Only for GMAC and newer.
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-			If set, DMA rx will use this value rather than snps,pbl.
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-- snps,no-pbl-x8	Don't multiply the pbl/txpbl/rxpbl values by 8.
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-			For core rev < 3.50, don't multiply the values by 4.
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-- snps,aal		Address-Aligned Beats
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-- snps,fixed-burst	Program the DMA to use the fixed burst mode
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-- snps,mixed-burst	Program the DMA to use the mixed burst mode
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-- snps,force_thresh_dma_mode	Force DMA to use the threshold mode for
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-				both tx and rx
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-- snps,force_sf_dma_mode	Force DMA to use the Store and Forward
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-				mode for both tx and rx. This flag is
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-				ignored if force_thresh_dma_mode is set.
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-- snps,en-tx-lpi-clockgating	Enable gating of the MAC TX clock during
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-				TX low-power mode
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-- snps,multicast-filter-bins:	Number of multicast filter hash bins
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-				supported by this device instance
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-- snps,perfect-filter-entries:	Number of perfect filter entries supported
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-				by this device instance
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-- snps,ps-speed: port selection speed that can be passed to the core when
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-		 PCS is supported. For example, this is used in case of SGMII
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-		 and MAC2MAC connection.
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-- snps,tso: this enables the TSO feature otherwise it will be managed by
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-		 MAC HW capability register. Only for GMAC4 and newer.
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-- AXI BUS Mode parameters: below the list of all the parameters to program the
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-			   AXI register inside the DMA module:
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-	- snps,lpi_en: enable Low Power Interface
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-	- snps,xit_frm: unlock on WoL
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-	- snps,wr_osr_lmt: max write outstanding req. limit
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-	- snps,rd_osr_lmt: max read outstanding req. limit
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-	- snps,kbbe: do not cross 1KiB boundary.
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-	- snps,blen: this is a vector of supported burst length.
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-	- snps,fb: fixed-burst
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-	- snps,mb: mixed-burst
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-	- snps,rb: rebuild INCRx Burst
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-- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
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-- Multiple RX Queues parameters: below the list of all the parameters to
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-				 configure the multiple RX queues:
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-	- snps,rx-queues-to-use: number of RX queues to be used in the driver
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-	- Choose one of these RX scheduling algorithms:
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-		- snps,rx-sched-sp: Strict priority
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-		- snps,rx-sched-wsp: Weighted Strict priority
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-	- For each RX queue
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-		- Choose one of these modes:
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-			- snps,dcb-algorithm: Queue to be enabled as DCB
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-			- snps,avb-algorithm: Queue to be enabled as AVB
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-		- snps,map-to-dma-channel: Channel to map
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-		- Specifiy specific packet routing:
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-			- snps,route-avcp: AV Untagged Control packets
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-			- snps,route-ptp: PTP Packets
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-			- snps,route-dcbcp: DCB Control Packets
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-			- snps,route-up: Untagged Packets
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-			- snps,route-multi-broad: Multicast & Broadcast Packets
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-		- snps,priority: RX queue priority (Range: 0x0 to 0xF)
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-- Multiple TX Queues parameters: below the list of all the parameters to
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-				 configure the multiple TX queues:
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-	- snps,tx-queues-to-use: number of TX queues to be used in the driver
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-	- Choose one of these TX scheduling algorithms:
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-		- snps,tx-sched-wrr: Weighted Round Robin
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-		- snps,tx-sched-wfq: Weighted Fair Queuing
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-		- snps,tx-sched-dwrr: Deficit Weighted Round Robin
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-		- snps,tx-sched-sp: Strict priority
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-	- For each TX queue
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-		- snps,weight: TX queue weight (if using a DCB weight algorithm)
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-		- Choose one of these modes:
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-			- snps,dcb-algorithm: TX queue will be working in DCB
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-			- snps,avb-algorithm: TX queue will be working in AVB
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-			  [Attention] Queue 0 is reserved for legacy traffic
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-			  and so no AVB is available in this queue.
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-		- Configure Credit Base Shaper (if AVB Mode selected):
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-			- snps,send_slope: enable Low Power Interface
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-			- snps,idle_slope: unlock on WoL
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-			- snps,high_credit: max write outstanding req. limit
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-			- snps,low_credit: max read outstanding req. limit
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-		- snps,priority: TX queue priority (Range: 0x0 to 0xF)
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-Examples:
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-
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-	stmmac_axi_setup: stmmac-axi-config {
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-		snps,wr_osr_lmt = <0xf>;
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-		snps,rd_osr_lmt = <0xf>;
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-		snps,blen = <256 128 64 32 0 0 0>;
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-	};
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-
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-	mtl_rx_setup: rx-queues-config {
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-		snps,rx-queues-to-use = <1>;
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-		snps,rx-sched-sp;
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-		queue0 {
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-			snps,dcb-algorithm;
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-			snps,map-to-dma-channel = <0x0>;
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-			snps,priority = <0x0>;
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-		};
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-	};
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-
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-	mtl_tx_setup: tx-queues-config {
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-		snps,tx-queues-to-use = <2>;
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-		snps,tx-sched-wrr;
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-		queue0 {
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-			snps,weight = <0x10>;
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-			snps,dcb-algorithm;
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-			snps,priority = <0x0>;
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-		};
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-
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-		queue1 {
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-			snps,avb-algorithm;
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-			snps,send_slope = <0x1000>;
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-			snps,idle_slope = <0x1000>;
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-			snps,high_credit = <0x3E800>;
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-			snps,low_credit = <0xFFC18000>;
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-			snps,priority = <0x1>;
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-		};
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-	};
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-
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-	gmac0: ethernet@e0800000 {
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-		compatible = "st,spear600-gmac";
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-		reg = <0xe0800000 0x8000>;
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-		interrupt-parent = <&vic1>;
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-		interrupts = <24 23 22>;
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-		interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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-		mac-address = [000000000000]; /* Filled in by U-Boot */
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-		max-frame-size = <3800>;
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-		phy-mode = "gmii";
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-		snps,multicast-filter-bins = <256>;
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-		snps,perfect-filter-entries = <128>;
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-		rx-fifo-depth = <16384>;
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-		tx-fifo-depth = <16384>;
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-		clocks = <&clock>;
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-		clock-names = "stmmaceth";
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-		snps,axi-config = <&stmmac_axi_setup>;
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-		mdio0 {
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-			#address-cells = <1>;
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-			#size-cells = <0>;
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-			compatible = "snps,dwmac-mdio";
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-			phy1: ethernet-phy@0 {
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-			};
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-		};
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-		snps,mtl-rx-config = <&mtl_rx_setup>;
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-		snps,mtl-tx-config = <&mtl_tx_setup>;
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-	};
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+This file has moved to snps,dwmac.yaml.