modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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@@ -9,13 +9,22 @@
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 - #size-cells: must be 0
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 - #address-cells: must be 1
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+Optional properties:
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+
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+- reset-gpios: GPIO to be used to reset the whole device
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+
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 Subnodes:
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 The integrated switch subnode should be specified according to the binding
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-described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
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-port and PHY id, each subnode describing a port needs to have a valid phandle
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-referencing the internal PHY connected to it. The CPU port of this switch is
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-always port 0.
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+described in dsa/dsa.txt. If the QCA8K switch is connect to a SoC's external
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+mdio-bus each subnode describing a port needs to have a valid phandle
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+referencing the internal PHY it is connected to. This is because there's no
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+N:N mapping of port and PHY id.
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+
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+Don't use mixed external and internal mdio-bus configurations, as this is
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+not supported by the hardware.
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+
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+The CPU port of this switch is always port 0.
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 A CPU port node has the following optional node:
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..
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@@ -31,8 +40,9 @@
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 - 'full-duplex' (boolean, optional), to indicate that full duplex is
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   used. When absent, half duplex is assumed.
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42
 
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-Example:
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+Examples:
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+for the external mdio-bus configuration:
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 	&mdio0 {
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 		phy_port1: phy@0 {
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@@ -55,12 +65,13 @@
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 			reg = <4>;
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 		};
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-		switch0@0 {
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+		switch@10 {
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 			compatible = "qca,qca8337";
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 			#address-cells = <1>;
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 			#size-cells = <0>;
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-			reg = <0>;
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+			reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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+			reg = <0x10>;
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 			ports {
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 				#address-cells = <1>;
..
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@@ -108,3 +119,57 @@
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 			};
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 		};
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 	};
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+
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+for the internal master mdio-bus configuration:
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+
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+	&mdio0 {
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+		switch@10 {
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+			compatible = "qca,qca8337";
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
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+			reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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+			reg = <0x10>;
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+
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+			ports {
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+				#address-cells = <1>;
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+				#size-cells = <0>;
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+
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+				port@0 {
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+					reg = <0>;
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+					label = "cpu";
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+					ethernet = <&gmac1>;
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+					phy-mode = "rgmii";
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+					fixed-link {
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+						speed = 1000;
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+						full-duplex;
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+					};
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+				};
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+
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+				port@1 {
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+					reg = <1>;
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+					label = "lan1";
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+				};
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+
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+				port@2 {
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+					reg = <2>;
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+					label = "lan2";
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+				};
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+
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+				port@3 {
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+					reg = <3>;
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+					label = "lan3";
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+				};
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+
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+				port@4 {
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+					reg = <4>;
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+					label = "lan4";
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+				};
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+
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+				port@5 {
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+					reg = <5>;
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+					label = "wan";
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+				};
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+			};
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+		};
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+	};