forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/Documentation/devicetree/bindings/net/dsa/ksz.txt
....@@ -5,8 +5,23 @@
55
66 - compatible: For external switch chips, compatible string must be exactly one
77 of the following:
8
+ - "microchip,ksz8765"
9
+ - "microchip,ksz8794"
10
+ - "microchip,ksz8795"
811 - "microchip,ksz9477"
912 - "microchip,ksz9897"
13
+ - "microchip,ksz9896"
14
+ - "microchip,ksz9567"
15
+ - "microchip,ksz8565"
16
+ - "microchip,ksz9893"
17
+ - "microchip,ksz9563"
18
+ - "microchip,ksz8563"
19
+
20
+Optional properties:
21
+
22
+- reset-gpios : Should be a gpio specifier for a reset line
23
+- microchip,synclko-125 : Set if the output SYNCLKO frequency should be set to
24
+ 125MHz instead of 25MHz.
1025
1126 See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
1227 required and optional properties.
....@@ -15,58 +30,96 @@
1530
1631 Ethernet switch connected via SPI to the host, CPU port wired to eth0:
1732
18
- eth0: ethernet@10001000 {
19
- fixed-link {
20
- speed = <1000>;
21
- full-duplex;
22
- };
23
- };
33
+ eth0: ethernet@10001000 {
34
+ fixed-link {
35
+ speed = <1000>;
36
+ full-duplex;
37
+ };
38
+ };
2439
25
- spi1: spi@f8008000 {
26
- pinctrl-0 = <&pinctrl_spi_ksz>;
27
- cs-gpios = <&pioC 25 0>;
28
- id = <1>;
40
+ spi1: spi@f8008000 {
41
+ pinctrl-0 = <&pinctrl_spi_ksz>;
42
+ cs-gpios = <&pioC 25 0>;
43
+ id = <1>;
2944
30
- ksz9477: ksz9477@0 {
31
- compatible = "microchip,ksz9477";
32
- reg = <0>;
45
+ ksz9477: ksz9477@0 {
46
+ compatible = "microchip,ksz9477";
47
+ reg = <0>;
3348
34
- spi-max-frequency = <44000000>;
35
- spi-cpha;
36
- spi-cpol;
49
+ spi-max-frequency = <44000000>;
50
+ spi-cpha;
51
+ spi-cpol;
3752
38
- ports {
39
- #address-cells = <1>;
40
- #size-cells = <0>;
41
- port@0 {
42
- reg = <0>;
43
- label = "lan1";
44
- };
45
- port@1 {
46
- reg = <1>;
47
- label = "lan2";
48
- };
49
- port@2 {
50
- reg = <2>;
51
- label = "lan3";
52
- };
53
- port@3 {
54
- reg = <3>;
55
- label = "lan4";
56
- };
57
- port@4 {
58
- reg = <4>;
59
- label = "lan5";
60
- };
61
- port@5 {
62
- reg = <5>;
63
- label = "cpu";
64
- ethernet = <&eth0>;
65
- fixed-link {
66
- speed = <1000>;
67
- full-duplex;
68
- };
69
- };
70
- };
71
- };
72
- };
53
+ ports {
54
+ #address-cells = <1>;
55
+ #size-cells = <0>;
56
+ port@0 {
57
+ reg = <0>;
58
+ label = "lan1";
59
+ };
60
+ port@1 {
61
+ reg = <1>;
62
+ label = "lan2";
63
+ };
64
+ port@2 {
65
+ reg = <2>;
66
+ label = "lan3";
67
+ };
68
+ port@3 {
69
+ reg = <3>;
70
+ label = "lan4";
71
+ };
72
+ port@4 {
73
+ reg = <4>;
74
+ label = "lan5";
75
+ };
76
+ port@5 {
77
+ reg = <5>;
78
+ label = "cpu";
79
+ ethernet = <&eth0>;
80
+ fixed-link {
81
+ speed = <1000>;
82
+ full-duplex;
83
+ };
84
+ };
85
+ };
86
+ };
87
+ ksz8565: ksz8565@0 {
88
+ compatible = "microchip,ksz8565";
89
+ reg = <0>;
90
+
91
+ spi-max-frequency = <44000000>;
92
+ spi-cpha;
93
+ spi-cpol;
94
+
95
+ ports {
96
+ #address-cells = <1>;
97
+ #size-cells = <0>;
98
+ port@0 {
99
+ reg = <0>;
100
+ label = "lan1";
101
+ };
102
+ port@1 {
103
+ reg = <1>;
104
+ label = "lan2";
105
+ };
106
+ port@2 {
107
+ reg = <2>;
108
+ label = "lan3";
109
+ };
110
+ port@3 {
111
+ reg = <3>;
112
+ label = "lan4";
113
+ };
114
+ port@6 {
115
+ reg = <6>;
116
+ label = "cpu";
117
+ ethernet = <&eth0>;
118
+ fixed-link {
119
+ speed = <1000>;
120
+ full-duplex;
121
+ };
122
+ };
123
+ };
124
+ };
125
+ };