.. | .. |
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7 | 7 | |
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8 | 8 | Required properties: |
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9 | 9 | - compatible: "mediatek,<chip>-dsi" |
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10 | | - the supported chips are mt2701 and mt8173. |
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| 10 | +- the supported chips are mt2701, mt7623, mt8173 and mt8183. |
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11 | 11 | - reg: Physical base address and length of the controller's registers |
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12 | 12 | - interrupts: The interrupt signal from the function block. |
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13 | 13 | - clocks: device clocks |
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.. | .. |
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26 | 26 | |
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27 | 27 | Required properties: |
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28 | 28 | - compatible: "mediatek,<chip>-mipi-tx" |
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29 | | - the supported chips are mt2701 and mt8173. |
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| 29 | +- the supported chips are mt2701, 7623, mt8173 and mt8183. |
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30 | 30 | - reg: Physical base address and length of the controller's registers |
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31 | 31 | - clocks: PLL reference clock |
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32 | 32 | - clock-output-names: name of the output clock line to the DSI encoder |
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33 | 33 | - #clock-cells: must be <0>; |
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34 | 34 | - #phy-cells: must be <0>. |
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| 35 | + |
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| 36 | +Optional properties: |
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| 37 | +- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And |
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| 38 | + the step is 200. |
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| 39 | +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If |
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| 40 | + unspecified default values shall be used. |
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| 41 | +- nvmem-cell-names: Should be "calibration-data" |
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35 | 42 | |
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36 | 43 | Example: |
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37 | 44 | |
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.. | .. |
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42 | 49 | clock-output-names = "mipi_tx0_pll"; |
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43 | 50 | #clock-cells = <0>; |
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44 | 51 | #phy-cells = <0>; |
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| 52 | + drive-strength-microamp = <4600>; |
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| 53 | + nvmem-cells= <&mipi_tx_calibration>; |
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| 54 | + nvmem-cell-names = "calibration-data"; |
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45 | 55 | }; |
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46 | 56 | |
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47 | 57 | dsi0: dsi@1401b000 { |
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