kernel/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt
.. .. @@ -8,8 +8,12 @@ 8 8 - compatible: Should be one of: 9 9 - "mediatek,mt2701-vdecsys", "syscon" 10 10 - "mediatek,mt2712-vdecsys", "syscon" 11 + - "mediatek,mt6779-vdecsys", "syscon"11 12 - "mediatek,mt6797-vdecsys", "syscon" 13 + - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"14 + - "mediatek,mt8167-vdecsys", "syscon"12 15 - "mediatek,mt8173-vdecsys", "syscon" 16 + - "mediatek,mt8183-vdecsys", "syscon"13 17 - #clock-cells: Must be 1 14 18 15 19 The vdecsys controller uses the common clk binding from