.. | .. |
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59 | 59 | =========================================== |
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60 | 60 | |
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61 | 61 | Example 1 (ARM 64-bit, 6-cpu system, two clusters): |
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62 | | -capacities-dmips-mhz are scaled w.r.t. 1024 (cpu@0 and cpu@1) |
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63 | | -supposing cluster0@max-freq=1100 and custer1@max-freq=850, |
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64 | | -final capacities are 1024 for cluster0 and 446 for cluster1 |
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| 62 | +The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024) |
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| 63 | +are 1024 and 578 for cluster0 and cluster1. Further normalization |
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| 64 | +is done by the operating system based on cluster0@max-freq=1100 and |
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| 65 | +custer1@max-freq=850, final capacities are 1024 for cluster0 and |
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| 66 | +446 for cluster1 (576*850/1100). |
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65 | 67 | |
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66 | 68 | cpus { |
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67 | 69 | #address-cells = <2>; |
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.. | .. |
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116 | 118 | }; |
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117 | 119 | |
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118 | 120 | A57_0: cpu@0 { |
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119 | | - compatible = "arm,cortex-a57","arm,armv8"; |
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| 121 | + compatible = "arm,cortex-a57"; |
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120 | 122 | reg = <0x0 0x0>; |
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121 | 123 | device_type = "cpu"; |
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122 | 124 | enable-method = "psci"; |
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.. | .. |
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127 | 129 | }; |
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128 | 130 | |
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129 | 131 | A57_1: cpu@1 { |
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130 | | - compatible = "arm,cortex-a57","arm,armv8"; |
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| 132 | + compatible = "arm,cortex-a57"; |
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131 | 133 | reg = <0x0 0x1>; |
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132 | 134 | device_type = "cpu"; |
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133 | 135 | enable-method = "psci"; |
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.. | .. |
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138 | 140 | }; |
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139 | 141 | |
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140 | 142 | A53_0: cpu@100 { |
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141 | | - compatible = "arm,cortex-a53","arm,armv8"; |
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| 143 | + compatible = "arm,cortex-a53"; |
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142 | 144 | reg = <0x0 0x100>; |
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143 | 145 | device_type = "cpu"; |
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144 | 146 | enable-method = "psci"; |
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.. | .. |
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149 | 151 | }; |
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150 | 152 | |
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151 | 153 | A53_1: cpu@101 { |
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152 | | - compatible = "arm,cortex-a53","arm,armv8"; |
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| 154 | + compatible = "arm,cortex-a53"; |
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153 | 155 | reg = <0x0 0x101>; |
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154 | 156 | device_type = "cpu"; |
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155 | 157 | enable-method = "psci"; |
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.. | .. |
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160 | 162 | }; |
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161 | 163 | |
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162 | 164 | A53_2: cpu@102 { |
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163 | | - compatible = "arm,cortex-a53","arm,armv8"; |
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| 165 | + compatible = "arm,cortex-a53"; |
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164 | 166 | reg = <0x0 0x102>; |
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165 | 167 | device_type = "cpu"; |
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166 | 168 | enable-method = "psci"; |
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.. | .. |
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171 | 173 | }; |
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172 | 174 | |
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173 | 175 | A53_3: cpu@103 { |
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174 | | - compatible = "arm,cortex-a53","arm,armv8"; |
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| 176 | + compatible = "arm,cortex-a53"; |
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175 | 177 | reg = <0x0 0x103>; |
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176 | 178 | device_type = "cpu"; |
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177 | 179 | enable-method = "psci"; |
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.. | .. |
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233 | 235 | =========================================== |
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234 | 236 | |
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235 | 237 | [1] ARM Linux Kernel documentation - CPUs bindings |
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236 | | - Documentation/devicetree/bindings/arm/cpus.txt |
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| 238 | + Documentation/devicetree/bindings/arm/cpus.yaml |
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