.. | .. |
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6 | 6 | Users: OpenBMC. Proposed changes should be mailed to |
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7 | 7 | openbmc@lists.ozlabs.org |
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8 | 8 | |
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9 | | -What: /sys/bus/platform/drivers/aspeed-vuart*/sirq |
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| 9 | +What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq |
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10 | 10 | Date: April 2017 |
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11 | 11 | Contact: Jeremy Kerr <jk@ozlabs.org> |
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12 | 12 | Description: Configures which interrupt number the host side of |
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13 | 13 | the UART will appear on the host <-> BMC LPC bus. |
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14 | 14 | Users: OpenBMC. Proposed changes should be mailed to |
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15 | 15 | openbmc@lists.ozlabs.org |
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| 16 | + |
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| 17 | +What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity |
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| 18 | +Date: July 2019 |
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| 19 | +Contact: Oskar Senft <osk@google.com> |
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| 20 | +Description: Configures the polarity of the serial interrupt to the |
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| 21 | + host via the BMC LPC bus. |
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| 22 | + Set to 0 for active-low or 1 for active-high. |
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| 23 | +Users: OpenBMC. Proposed changes should be mailed to |
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| 24 | + openbmc@lists.ozlabs.org |
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