~hc/RK356X_SDK_RELEASE.git

..	..	@@ -16,14 +16,6 @@
16	16	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
17	17	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18	18
19		- rk_headset: rk-headset {
20		- compatible = "rockchip_headset";
21		- headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22		- spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23		- pinctrl-names = "default";
24		- pinctrl-0 = <&hp_det>;
25		- };
26		-
27	19	vcc2v5_sys: vcc2v5-ddr {
28	20	compatible = "regulator-fixed";
29	21	regulator-name = "vcc2v5-sys";
..	..	@@ -34,6 +26,15 @@
34	26	vin-supply = <&vcc3v3_sys>;
35	27	};
36	28
	29	+ vcc3v3_vga: vcc3v3-vga {
	30	+ compatible = "regulator-fixed";
	31	+ regulator-name = "vcc3v3_vga";
	32	+ regulator-always-on;
	33	+ regulator-boot-on;
	34	+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
	35	+ enable-active-high;
	36	+ vin-supply = <&vcc3v3_sys>;
	37	+ };
37	38
38	39	pcie30_avdd0v9: pcie30-avdd0v9 {
39	40	compatible = "regulator-fixed";
..	..	@@ -60,9 +61,7 @@
60	61	regulator-name = "vcc3v3_pcie";
61	62	regulator-min-microvolt = <3300000>;
62	63	regulator-max-microvolt = <3300000>;
63		- regulator-always-on;
64	64	enable-active-high;
65		- regulator-boot-on;
66	65	gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
67	66	startup-delay-us = <5000>;
68	67	vin-supply = <&dc_12v>;
..	..	@@ -87,49 +86,130 @@
87	86	enable-active-high;
88	87	regulator-always-on;
89	88	regulator-boot-on;
90		- };
	89	+ };
91	90	#endif
92	91
93		- nk_io_init {
94		- compatible = "nk_io_control";
95		- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
96		- hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
97		- hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
98		- vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
99		- vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
100		- en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
101		- reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
102		- air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
103		- wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
104		- hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105		-// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
106		- wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
107		-// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
108		- pinctrl-names = "default";
109		- pinctrl-0 = <&nk_io_gpio>;
110		- };
111		-
112		- panel: panel {
	92	+ ndj_io_init {
	93	+ compatible = "nk_io_control";
	94	+ pinctrl-names = "default";
	95	+ pinctrl-0 = <&nk_io_gpio>;
	96	+
	97	+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
	98	+
	99	+ vcc_5v {
	100	+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	101	+ gpio_function = <0>;
	102	+ };
	103	+
	104	+ vcc_12v {
	105	+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	106	+ gpio_function = <0>;
	107	+ };
	108	+
	109	+ hub_host2_rst {
	110	+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
	111	+ gpio_function = <3>;
	112	+ };
	113	+
	114	+ hub_host3 {
	115	+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
	116	+ gpio_function = <0>;
	117	+ };
	118	+
	119	+ wake_4g {
	120	+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
	121	+ gpio_function = <0>;
	122	+ };
	123	+
	124	+ air_mode_4g {
	125	+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
	126	+ gpio_function = <0>;
	127	+ };
	128	+
	129	+ reset_4g {
	130	+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
	131	+ gpio_function = <3>;
	132	+ };
	133	+
	134	+ en_4g {
	135	+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
	136	+ gpio_function = <0>;
	137	+ };
	138	+
	139	+ hp_en {
	140	+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
	141	+ gpio_function = <0>;
	142	+ };
	143	+
	144	+ usb_ogt {
	145	+ gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
	146	+ gpio_function = <0>;
	147	+ };
	148	+
	149	+ m2_wifi_pwr {
	150	+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
	151	+ gpio_function = <0>;
	152	+ };
	153	+
	154	+
	155	+ #if 0
	156	+ do1 {
	157	+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
	158	+ gpio_function = <0>;
	159	+ };
	160	+
	161	+ do2 {
	162	+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
	163	+ gpio_function = <0>;
	164	+ };
	165	+
	166	+ do3 {
	167	+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
	168	+ gpio_function = <0>;
	169	+ };
	170	+
	171	+ do4 {
	172	+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
	173	+ gpio_function = <0>;
	174	+ };
	175	+
	176	+ do5 {
	177	+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
	178	+ gpio_function = <0>;
	179	+ };
	180	+
	181	+ do6 {
	182	+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
	183	+ gpio_function = <0>;
	184	+ };
	185	+
	186	+ do7 {
	187	+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
	188	+ gpio_function = <0>;
	189	+ };
	190	+
	191	+ di1 {
	192	+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
	193	+ gpio_function = <1>;
	194	+ };
	195	+ #endif
	196	+ };
	197	+
	198	+ panel: panel {
113	199	compatible = "simple-panel";
114	200	backlight = <&backlight>;
115	201	power-supply = <&vcc3v3_lcd0_n>;
116		- enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
117		- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
118		- edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	202	+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
	203	+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_PWBLK_H_GPIO0_B7
119	204	edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
120	205	bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
121	206	bpc = <8>;
122	207	prepare-delay-ms = <200>;
123	208	enable-delay-ms = <20>;
124		- lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
125		- lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
126		- lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
127		- lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
128		- nodka-lvds = <15>;
129	209
130	210	display-timings {
131		- native-mode = <&timing0>;
132		- timing0: timing0 {
	211	+ native-mode = <&timing>;
	212	+ timing: timing {
133	213	clock-frequency = <72500000>;
134	214	hactive = <1280>;
135	215	vactive = <800>;
..	..	@@ -146,8 +226,8 @@
146	226	};
147	227	};
148	228	ports {
149		- panel_in: endpoint {
150		- remote-endpoint = <&edp_out>;
	229	+ panel_in_lvds: endpoint {
	230	+ remote-endpoint = <&lvds_out>;
151	231	};
152	232	};
153	233	};
..	..	@@ -213,10 +293,6 @@
213	293	* video_phy0 needs to be enabled
214	294	* when dsi0 is enabled
215	295	*/
216		-&video_phy0 {
217		- status = "disabled";
218		-};
219		-
220	296	&dsi0 {
221	297	status = "disabled";
222	298	};
..	..	@@ -237,10 +313,6 @@
237	313	* video_phy1 needs to be enabled
238	314	* when dsi1 is enabled
239	315	*/
240		-
241		-&video_phy1 {
242		- status = "okay";
243		-};
244	316	&dsi1 {
245	317	status = "disabled";
246	318	};
..	..	@@ -250,108 +322,58 @@
250	322	};
251	323
252	324	&dsi1_in_vp1 {
253		- status = "okay";
	325	+ status = "disabled";
254	326	};
255	327
256	328	&dsi1_panel {
257		- power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
258		- vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
259		- reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
260		- vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
261		- pinctrl-names = "default";
262		- pinctrl-0 = <&lcd1_rst_gpio>;
	329	+ power-supply = <&vcc3v3_lcd1_n>;
263	330	};
264		-
265		-&route_dsi1 {
266		- status = "disabled";
267		- connect = <&vp1_out_dsi1>;
268		-};
269		-
270		-
271		-/*
272		-* edp_start
273		-*/
274	331
275	332	&edp {
	333	+ //hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
276	334	force-hpd;
	335	+ status = "disabled";
	336	+};
	337	+
	338	+&lvds {
277	339	status = "okay";
278	340	ports {
279	341	port@1 {
280	342	reg = <1>;
281		- edp_out: endpoint {
282		- remote-endpoint = <&panel_in>;
	343	+ lvds_out: endpoint {
	344	+ remote-endpoint = <&panel_in_lvds>;
283	345	};
284	346	};
285		- };
	347	+
	348	+ };
	349	+};
	350	+
	351	+&route_lvds{
	352	+ status = "okay";
	353	+ connect = <&vp2_out_lvds>;
	354	+};
	355	+
	356	+&lvds_in_vp2 {
	357	+ status = "okay";
286	358	};
287	359
288	360	&edp_phy {
289		- status = "okay";
290		-
	361	+ status = "okay";
291	362	};
292	363
293	364	&edp_in_vp0 {
294		- status = "disabled";
295		-};
296		-
297		-&edp_in_vp1 {
298		- status = "okay";
299		-
300		-};
301		-
302		-&route_edp {
303		- status = "okay";
304		- connect = <&vp1_out_edp>;
305		-};
306		-
307		-&route_edp {
308		- status = "okay";
309		-};
310		-/*
311		-* edp_end
312		-*/
313		-
314		-/*
315		-* Hdmi_start
316		-*/
317		-
318		-&hdmi {
319		- status = "okay";
320		- rockchip,phy-table =
321		- <92812500 0x8009 0x0000 0x0270>,
322		- <165000000 0x800b 0x0000 0x026d>,
323		- <185625000 0x800b 0x0000 0x01ed>,
324		- <297000000 0x800b 0x0000 0x01ad>,
325		- <594000000 0x8029 0x0000 0x0088>,
326		- <000000000 0x0000 0x0000 0x0000>;
327		-};
328		-
329		-&route_hdmi {
330		- status = "okay";
331		- connect = <&vp0_out_hdmi>;
332		-};
333		-
334		-&hdmi_in_vp0 {
335		- status = "okay";
336		-};
337		-
338		-&hdmi_in_vp1 {
339	365	status = "disabled";
340	366	};
341	367
342		-&hdmi_sound {
	368	+&edp_in_vp1 {
343	369	status = "okay";
344	370	};
345		-
346		-/*
347		- * Hdmi_END
348		-*/
349	371
350	372	&gmac0 {
351	373	phy-mode = "rgmii";
352	374	clock_in_out = "output";
353	375
354		- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
	376	+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
355	377	snps,reset-active-low;
356	378	/* Reset time is 20ms, 100ms for rtl8211f */
357	379	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -371,7 +393,9 @@
371	393	rx_delay = <0x2f>;
372	394
373	395	phy-handle = <&rgmii_phy0>;
374		- status = "disabled";
	396	+
	397	+ status = "okay";
	398	+
375	399	};
376	400
377	401	&gmac1 {
..	..	@@ -405,9 +429,7 @@
405	429	* power-supply should switche to vcc3v3_lcd1_n
406	430	* when mipi panel is connected to dsi1.
407	431	*/
408		-&gt1x {
409		- power-supply = <&vcc3v3_lcd0_n>;
410		-};
	432	+
411	433
412	434	&i2c3 {
413	435	status = "okay";
..	..	@@ -426,7 +448,7 @@
426	448	};
427	449
428	450	&i2c4 {
429		- status = "okay";
	451	+ status = "disabled";
430	452	gc8034: gc8034@37 {
431	453	compatible = "galaxycore,gc8034";
432	454	status = "okay";
..	..	@@ -472,7 +494,7 @@
472	494	};
473	495	};
474	496	ov5695: ov5695@36 {
475		- status = "okay";
	497	+ status = "disabled";
476	498	compatible = "ovti,ov5695";
477	499	reg = <0x36>;
478	500	clocks = <&cru CLK_CIF_OUT>;
..	..	@@ -495,19 +517,6 @@
495	517	};
496	518	};
497	519
498		-&i2c5 {
499		- status = "okay";
500		-
501		- hym8563: hym8563@51 {
502		- compatible = "haoyu,hym8563";
503		- reg = <0x51>;
504		- #clock-cells = <0>;
505		- clock-frequency = <32768>;
506		- clock-output-names = "xin32k";
507		- /* rtc_int is not connected */
508		- };
509		-};
510		-
511	520	&mdio0 {
512	521	rgmii_phy0: phy@0 {
513	522	compatible = "ethernet-phy-ieee802.3-c22";
..	..	@@ -522,7 +531,13 @@
522	531	};
523	532	};
524	533
	534	+&video_phy0 {
	535	+ status = "okay";
	536	+};
525	537
	538	+&video_phy1 {
	539	+ status = "disabled";
	540	+};
526	541
527	542	&pcie30phy {
528	543	status = "okay";
..	..	@@ -534,39 +549,33 @@
534	549	status = "okay";
535	550	};
536	551
	552	+&pcie3x2 {
	553	+ reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	554	+ vpcie3v3-supply = <&vcc3v3_pcie>;
	555	+ status = "disabled";
	556	+};
	557	+
	558	+&pcie3x1 {
	559	+ rockchip,bifurcation;
	560	+ reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	561	+ vpcie3v3-supply = <&vcc3v3_pcie>;
	562	+ status = "okay";
	563	+};
	564	+
537	565	&pinctrl {
538		-// cam {
539		-// camera_pwr: camera-pwr {
540		-// rockchip,pins =
541		-// /* camera power en */
542		-// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
543		-// };
544		-// };
	566	+
545	567	headphone {
546	568	hp_det: hp-det {
547		- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
548		- <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
	569	+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
549	570	};
550	571	};
551	572
552	573	wireless-wlan {
553	574	wifi_host_wake_irq: wifi-host-wake-irq {
554		- rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
555		- };
556		- };
557		-
558		- wireless-bluetooth {
559		- uart1_gpios: uart1-gpios {
560		- rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
	575	+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
561	576	};
562	577	};
563	578
564		- lcd1 {
565		- lcd1_rst_gpio: lcd1-rst-gpio {
566		- rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
567		- };
568		- };
569		-
570	579	nk_io_init{
571	580	nk_io_gpio: nk-io-gpio{
572	581	rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -576,7 +585,7 @@
576	585	<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
577	586	<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
578	587	<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
579		- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
	588	+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
580	589	<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
581	590	<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
582	591	<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..	..	@@ -585,9 +594,17 @@
585	594	<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
586	595	<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
587	596	<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
	597	+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
	598	+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
	599	+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
	600	+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
588	601	<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
589	602	};
590	603	};
	604	+};
	605	+
	606	+&rk809_sound {
	607	+ hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
591	608	};
592	609
593	610	&rkisp {
..	..	@@ -612,32 +629,36 @@
612	629	};
613	630	};
614	631
	632	+&route_dsi0 {
	633	+ status = "disabled";
	634	+ connect = <&vp1_out_dsi0>;
	635	+};
615	636
616	637
617	638
	639	+&route_edp {
	640	+ status = "disabled";
	641	+ connect = <&vp1_out_edp>;
	642	+};
618	643
619	644	&sata2 {
620	645	status = "okay";
621	646	};
622	647
623	648	&sdmmc2 {
624		- status = "disabled";
625		-};
626		-
627		-&sdmmc1 {
628		- max-frequency = <150000000>;
629		- supports-sdio;
630		- bus-width = <4>;
631		- disable-wp;
632		- cap-sd-highspeed;
633		- cap-sdio-irq;
634		- keep-power-in-suspend;
635		- mmc-pwrseq = <&sdio_pwrseq>;
636		- non-removable;
637		- pinctrl-names = "default";
638		- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
639		- sd-uhs-sdr104;
640		- status = "okay";
	649	+ max-frequency = <150000000>;
	650	+ supports-sdio;
	651	+ bus-width = <4>;
	652	+ disable-wp;
	653	+ cap-sd-highspeed;
	654	+ cap-sdio-irq;
	655	+ keep-power-in-suspend;
	656	+ mmc-pwrseq = <&sdio_pwrseq>;
	657	+ non-removable;
	658	+ pinctrl-names = "default";
	659	+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
	660	+ sd-uhs-sdr104;
	661	+ status = "okay";
641	662	};
642	663
643	664	&spdif_8ch {
..	..	@@ -670,17 +691,7 @@
670	691
671	692	&wireless_bluetooth {
672	693	compatible = "bluetooth-platdata";
673		- clocks = <&rk809 1>;
674		- clock-names = "ext_clock";
675		- //wifi-bt-power-toggle;
676		- uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
677		- pinctrl-names = "default", "rts_gpio";
678		- pinctrl-0 = <&uart1m0_rtsn>;
679		- pinctrl-1 = <&uart1_gpios>;
680		- BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
681		- BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
682		- BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
683		- status = "okay";
	694	+ status = "disabled";
684	695	};
685	696
686	697	&uart0 {
..	..	@@ -690,7 +701,7 @@
690	701	&uart1 {
691	702	pinctrl-names = "default";
692	703	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
693		- status = "okay";
	704	+ status = "disabled";
694	705	};
695	706
696	707	&uart3 {
..	..	@@ -716,4 +727,4 @@
716	727	&uart9 {
717	728	status = "okay";
718	729	pinctrl-0 = <&uart9m1_xfer>;
719		-};
	730	+};