add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/tools/perf/arch/powerpc/util/perf_regs.c
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@@ -2,11 +2,19 @@
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 #include <errno.h>
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 #include <string.h>
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 #include <regex.h>
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+#include <linux/zalloc.h>
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-#include "../../perf.h"
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-#include "../../util/util.h"
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-#include "../../util/perf_regs.h"
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-#include "../../util/debug.h"
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+#include "../../../util/perf_regs.h"
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+#include "../../../util/debug.h"
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+#include "../../../util/event.h"
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+#include "../../../util/header.h"
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+#include "../../../perf-sys.h"
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+#include "utils_header.h"
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+
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+#include <linux/kernel.h>
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+
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+#define PVR_POWER9		0x004E
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+#define PVR_POWER10		0x0080
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 const struct sample_reg sample_reg_masks[] = {
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 	SMPL_REG(r0, PERF_REG_POWERPC_R0),
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@@ -52,6 +60,14 @@
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 	SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
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 	SMPL_REG(dar, PERF_REG_POWERPC_DAR),
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 	SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
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+	SMPL_REG(sier, PERF_REG_POWERPC_SIER),
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+	SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
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+	SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
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+	SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
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+	SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
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+	SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
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+	SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
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+	SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
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 	SMPL_REG_END
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 };
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@@ -160,3 +176,45 @@
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 	return SDT_ARG_VALID;
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 }
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+
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+uint64_t arch__intr_reg_mask(void)
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+{
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+	struct perf_event_attr attr = {
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+		.type                   = PERF_TYPE_HARDWARE,
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+		.config                 = PERF_COUNT_HW_CPU_CYCLES,
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+		.sample_type            = PERF_SAMPLE_REGS_INTR,
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+		.precise_ip             = 1,
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+		.disabled               = 1,
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+		.exclude_kernel         = 1,
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+	};
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+	int fd;
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+	u32 version;
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+	u64 extended_mask = 0, mask = PERF_REGS_MASK;
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+
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+	/*
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+	 * Get the PVR value to set the extended
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+	 * mask specific to platform.
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+	 */
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+	version = (((mfspr(SPRN_PVR)) >>  16) & 0xFFFF);
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+	if (version == PVR_POWER9)
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+		extended_mask = PERF_REG_PMU_MASK_300;
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+	else if (version == PVR_POWER10)
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+		extended_mask = PERF_REG_PMU_MASK_31;
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+	else
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+		return mask;
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+
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+	attr.sample_regs_intr = extended_mask;
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+	attr.sample_period = 1;
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+	event_attr_init(&attr);
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+
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+	/*
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+	 * check if the pmu supports perf extended regs, before
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+	 * returning the register mask to sample.
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+	 */
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+	fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
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+	if (fd != -1) {
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+		close(fd);
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+		mask |= extended_mask;
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+	}
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+	return mask;
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+}