add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/include/linux/mlx5/qp.h
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@@ -37,7 +37,8 @@
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 #include <linux/mlx5/driver.h>
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 #define MLX5_INVALID_LKEY	0x100
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-#define MLX5_SIG_WQE_SIZE	(MLX5_SEND_WQE_BB * 5)
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+/* UMR (3 WQE_BB's) + SIG (3 WQE_BB's) + PSV (mem) + PSV (wire) */
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+#define MLX5_SIG_WQE_SIZE	(MLX5_SEND_WQE_BB * 8)
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 #define MLX5_DIF_SIZE		8
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 #define MLX5_STRIDE_BLOCK_OP	0x400
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 #define MLX5_CPY_GRD_MASK	0xc0
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@@ -65,11 +66,13 @@
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 	MLX5_QP_OPTPAR_RETRY_COUNT		= 1 << 12,
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 	MLX5_QP_OPTPAR_RNR_RETRY		= 1 << 13,
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 	MLX5_QP_OPTPAR_ACK_TIMEOUT		= 1 << 14,
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+	MLX5_QP_OPTPAR_LAG_TX_AFF		= 1 << 15,
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 	MLX5_QP_OPTPAR_PRI_PORT			= 1 << 16,
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 	MLX5_QP_OPTPAR_SRQN			= 1 << 18,
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 	MLX5_QP_OPTPAR_CQN_RCV			= 1 << 19,
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 	MLX5_QP_OPTPAR_DC_HS			= 1 << 20,
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 	MLX5_QP_OPTPAR_DC_KEY			= 1 << 21,
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+	MLX5_QP_OPTPAR_COUNTER_SET_ID		= 1 << 25,
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 };
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 enum mlx5_qp_state {
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@@ -202,7 +205,12 @@
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 	u8			signature;
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 	u8			rsvd[2];
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 	u8			fm_ce_se;
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-	__be32			imm;
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+	union {
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+		__be32		general_id;
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+		__be32		imm;
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+		__be32		umr_mkey;
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+		__be32		tis_tir_num;
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+	};
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 };
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 #define MLX5_WQE_CTRL_DS_MASK 0x3f
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@@ -222,6 +230,11 @@
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 enum {
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 	MLX5_ETH_WQE_SVLAN              = 1 << 0,
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+	MLX5_ETH_WQE_TRAILER_HDR_OUTER_IP_ASSOC = 1 << 26,
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+	MLX5_ETH_WQE_TRAILER_HDR_OUTER_L4_ASSOC = 1 << 27,
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+	MLX5_ETH_WQE_TRAILER_HDR_INNER_IP_ASSOC = 3 << 26,
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+	MLX5_ETH_WQE_TRAILER_HDR_INNER_L4_ASSOC = 1 << 28,
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+	MLX5_ETH_WQE_INSERT_TRAILER     = 1 << 30,
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 	MLX5_ETH_WQE_INSERT_VLAN        = 1 << 15,
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 };
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@@ -232,6 +245,10 @@
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 	MLX5_ETH_WQE_SWP_OUTER_L4_UDP   = 1 << 5,
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 };
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+enum {
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+	MLX5_ETH_WQE_FT_META_IPSEC = BIT(0),
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+};
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+
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 struct mlx5_wqe_eth_seg {
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 	u8              swp_outer_l4_offset;
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 	u8              swp_outer_l3_offset;
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@@ -240,7 +257,7 @@
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 	u8              cs_flags;
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 	u8              swp_flags;
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 	__be16          mss;
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-	__be32          rsvd2;
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+	__be32          flow_table_metadata;
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 	union {
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 		struct {
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 			__be16 sz;
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@@ -250,6 +267,7 @@
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 			__be16 type;
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 			__be16 vlan_tci;
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 		} insert;
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+		__be32 trailer;
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 	};
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 };
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@@ -308,6 +326,7 @@
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 struct mlx5_ib_ah {
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 	struct ib_ah		ibah;
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 	struct mlx5_av		av;
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+	u8			xmit_port;
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 };
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 static inline struct mlx5_ib_ah *to_mah(struct ib_ah *ibah)
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@@ -395,6 +414,7 @@
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 struct mlx5_wqe_inline_seg {
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 	__be32	byte_count;
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+	__be32	data[];
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 };
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 enum mlx5_sig_type {
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@@ -471,6 +491,7 @@
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 	int			qpn;
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 	struct mlx5_rsc_debug	*dbg;
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 	int			pid;
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+	u16			uid;
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 };
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 struct mlx5_core_dct {
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@@ -478,122 +499,8 @@
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 	struct completion	drained;
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 };
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-struct mlx5_qp_path {
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-	u8			fl_free_ar;
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-	u8			rsvd3;
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-	__be16			pkey_index;
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-	u8			rsvd0;
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-	u8			grh_mlid;
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-	__be16			rlid;
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-	u8			ackto_lt;
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-	u8			mgid_index;
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-	u8			static_rate;
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-	u8			hop_limit;
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-	__be32			tclass_flowlabel;
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-	union {
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-		u8		rgid[16];
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-		u8		rip[16];
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-	};
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-	u8			f_dscp_ecn_prio;
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-	u8			ecn_dscp;
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-	__be16			udp_sport;
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-	u8			dci_cfi_prio_sl;
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-	u8			port;
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-	u8			rmac[6];
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-};
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-
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-/* FIXME: use mlx5_ifc.h qpc */
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-struct mlx5_qp_context {
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-	__be32			flags;
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-	__be32			flags_pd;
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-	u8			mtu_msgmax;
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-	u8			rq_size_stride;
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-	__be16			sq_crq_size;
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-	__be32			qp_counter_set_usr_page;
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-	__be32			wire_qpn;
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-	__be32			log_pg_sz_remote_qpn;
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-	struct			mlx5_qp_path pri_path;
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-	struct			mlx5_qp_path alt_path;
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-	__be32			params1;
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-	u8			reserved2[4];
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-	__be32			next_send_psn;
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-	__be32			cqn_send;
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-	__be32			deth_sqpn;
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-	u8			reserved3[4];
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-	__be32			last_acked_psn;
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-	__be32			ssn;
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-	__be32			params2;
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-	__be32			rnr_nextrecvpsn;
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-	__be32			xrcd;
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-	__be32			cqn_recv;
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-	__be64			db_rec_addr;
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-	__be32			qkey;
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-	__be32			rq_type_srqn;
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-	__be32			rmsn;
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-	__be16			hw_sq_wqe_counter;
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-	__be16			sw_sq_wqe_counter;
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-	__be16			hw_rcyclic_byte_counter;
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-	__be16			hw_rq_counter;
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-	__be16			sw_rcyclic_byte_counter;
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-	__be16			sw_rq_counter;
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-	u8			rsvd0[5];
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-	u8			cgs;
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-	u8			cs_req;
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-	u8			cs_res;
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-	__be64			dc_access_key;
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-	u8			rsvd1[24];
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-};
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-
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-static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn)
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-{
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-	return radix_tree_lookup(&dev->priv.qp_table.tree, qpn);
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-}
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-
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-static inline struct mlx5_core_mkey *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key)
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-{
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-	return radix_tree_lookup(&dev->priv.mkey_table.tree, key);
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-}
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-
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-int mlx5_core_create_dct(struct mlx5_core_dev *dev,
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-			 struct mlx5_core_dct *qp,
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-			 u32 *in, int inlen);
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-int mlx5_core_create_qp(struct mlx5_core_dev *dev,
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-			struct mlx5_core_qp *qp,
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-			u32 *in,
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-			int inlen);
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-int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 opcode,
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-			u32 opt_param_mask, void *qpc,
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-			struct mlx5_core_qp *qp);
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-int mlx5_core_destroy_qp(struct mlx5_core_dev *dev,
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-			 struct mlx5_core_qp *qp);
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-int mlx5_core_destroy_dct(struct mlx5_core_dev *dev,
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-			  struct mlx5_core_dct *dct);
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-int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp,
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-		       u32 *out, int outlen);
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-int mlx5_core_dct_query(struct mlx5_core_dev *dev, struct mlx5_core_dct *dct,
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-			u32 *out, int outlen);
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-
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-int mlx5_core_set_delay_drop(struct mlx5_core_dev *dev,
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-			     u32 timeout_usec);
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-
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-int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn);
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-int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn);
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-void mlx5_init_qp_table(struct mlx5_core_dev *dev);
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-void mlx5_cleanup_qp_table(struct mlx5_core_dev *dev);
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 int mlx5_debug_qp_add(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
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 void mlx5_debug_qp_remove(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
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-int mlx5_core_create_rq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
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-				struct mlx5_core_qp *rq);
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-void mlx5_core_destroy_rq_tracked(struct mlx5_core_dev *dev,
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-				  struct mlx5_core_qp *rq);
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-int mlx5_core_create_sq_tracked(struct mlx5_core_dev *dev, u32 *in, int inlen,
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-				struct mlx5_core_qp *sq);
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-void mlx5_core_destroy_sq_tracked(struct mlx5_core_dev *dev,
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-				  struct mlx5_core_qp *sq);
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-int mlx5_core_alloc_q_counter(struct mlx5_core_dev *dev, u16 *counter_id);
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-int mlx5_core_dealloc_q_counter(struct mlx5_core_dev *dev, u16 counter_id);
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-int mlx5_core_query_q_counter(struct mlx5_core_dev *dev, u16 counter_id,
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-			      int reset, void *out, int out_size);
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 static inline const char *mlx5_qp_type_str(int type)
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 {