~hc/RK356X_SDK_RELEASE.git

..	..	@@ -26,6 +26,7 @@
26	26	#include "pci.h"
27	27
28	28	unsigned int pci_flags;
	29	+EXPORT_SYMBOL_GPL(pci_flags);
29	30
30	31	struct pci_dev_resource {
31	32	struct list_head list;
..	..	@@ -49,17 +50,16 @@
49	50	}
50	51
51	52	/**
52		- * add_to_list() - add a new resource tracker to the list
	53	+ * add_to_list() - Add a new resource tracker to the list
53	54	* @head: Head of the list
54		- * @dev: device corresponding to which the resource
55		- * belongs
56		- * @res: The resource to be tracked
57		- * @add_size: additional size to be optionally added
58		- * to the resource
	55	+ * @dev: Device to which the resource belongs
	56	+ * @res: Resource to be tracked
	57	+ * @add_size: Additional size to be optionally added to the resource
	58	+ * @min_align: Minimum memory window alignment
59	59	*/
60		-static int add_to_list(struct list_head *head,
61		- struct pci_dev dev, struct resource res,
62		- resource_size_t add_size, resource_size_t min_align)
	60	+static int add_to_list(struct list_head head, struct pci_dev dev,
	61	+ struct resource *res, resource_size_t add_size,
	62	+ resource_size_t min_align)
63	63	{
64	64	struct pci_dev_resource *tmp;
65	65
..	..	@@ -80,8 +80,7 @@
80	80	return 0;
81	81	}
82	82
83		-static void remove_from_list(struct list_head *head,
84		- struct resource *res)
	83	+static void remove_from_list(struct list_head head, struct resource res)
85	84	{
86	85	struct pci_dev_resource dev_res, tmp;
87	86
..	..	@@ -154,11 +153,11 @@
154	153
155	154	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
156	155	if (!tmp)
157		- panic("pdev_sort_resources(): kmalloc() failed!\n");
	156	+ panic("%s: kzalloc() failed!\n", __func__);
158	157	tmp->res = r;
159	158	tmp->dev = dev;
160	159
161		- /* fallback is smallest one or list is empty*/
	160	+ /* Fallback is smallest one or list is empty */
162	161	n = head;
163	162	list_for_each_entry(dev_res, head, list) {
164	163	resource_size_t align;
..	..	@@ -171,21 +170,20 @@
171	170	break;
172	171	}
173	172	}
174		- /* Insert it just before n*/
	173	+ /* Insert it just before n */
175	174	list_add_tail(&tmp->list, n);
176	175	}
177	176	}
178	177
179		-static void __dev_sort_resources(struct pci_dev *dev,
180		- struct list_head *head)
	178	+static void __dev_sort_resources(struct pci_dev dev, struct list_head head)
181	179	{
182	180	u16 class = dev->class >> 8;
183	181
184		- /* Don't touch classless devices or host bridges or ioapics. */
	182	+ /* Don't touch classless devices or host bridges or IOAPICs */
185	183	if (class == PCI_CLASS_NOT_DEFINED \|\| class == PCI_CLASS_BRIDGE_HOST)
186	184	return;
187	185
188		- /* Don't touch ioapic devices already enabled by firmware */
	186	+ /* Don't touch IOAPIC devices already enabled by firmware */
189	187	if (class == PCI_CLASS_SYSTEM_PIC) {
190	188	u16 command;
191	189	pci_read_config_word(dev, PCI_COMMAND, &command);
..	..	@@ -204,19 +202,18 @@
204	202	}
205	203
206	204	/**
207		- * reassign_resources_sorted() - satisfy any additional resource requests
	205	+ * reassign_resources_sorted() - Satisfy any additional resource requests
208	206	*
209		- * @realloc_head : head of the list tracking requests requiring additional
210		- * resources
211		- * @head : head of the list tracking requests with allocated
212		- * resources
	207	+ * @realloc_head: Head of the list tracking requests requiring
	208	+ * additional resources
	209	+ * @head: Head of the list tracking requests with allocated
	210	+ * resources
213	211	*
214		- * Walk through each element of the realloc_head and try to procure
215		- * additional resources for the element, provided the element
216		- * is in the head list.
	212	+ * Walk through each element of the realloc_head and try to procure additional
	213	+ * resources for the element, provided the element is in the head list.
217	214	*/
218	215	static void reassign_resources_sorted(struct list_head *realloc_head,
219		- struct list_head *head)
	216	+ struct list_head *head)
220	217	{
221	218	struct resource *res;
222	219	struct pci_dev_resource add_res, tmp;
..	..	@@ -228,18 +225,18 @@
228	225	bool found_match = false;
229	226
230	227	res = add_res->res;
231		- /* skip resource that has been reset */
	228	+ /* Skip resource that has been reset */
232	229	if (!res->flags)
233	230	goto out;
234	231
235		- /* skip this resource if not found in head list */
	232	+ /* Skip this resource if not found in head list */
236	233	list_for_each_entry(dev_res, head, list) {
237	234	if (dev_res->res == res) {
238	235	found_match = true;
239	236	break;
240	237	}
241	238	}
242		- if (!found_match)/* just skip */
	239	+ if (!found_match) /* Just skip */
243	240	continue;
244	241
245	242	idx = res - &add_res->dev->resource[0];
..	..	@@ -255,10 +252,9 @@
255	252	(IORESOURCE_STARTALIGN\|IORESOURCE_SIZEALIGN);
256	253	if (pci_reassign_resource(add_res->dev, idx,
257	254	add_size, align))
258		- pci_printk(KERN_DEBUG, add_res->dev,
259		- "failed to add %llx res[%d]=%pR\n",
260		- (unsigned long long)add_size,
261		- idx, res);
	255	+ pci_info(add_res->dev, "failed to add %llx res[%d]=%pR\n",
	256	+ (unsigned long long) add_size, idx,
	257	+ res);
262	258	}
263	259	out:
264	260	list_del(&add_res->list);
..	..	@@ -267,14 +263,14 @@
267	263	}
268	264
269	265	/**
270		- * assign_requested_resources_sorted() - satisfy resource requests
	266	+ * assign_requested_resources_sorted() - Satisfy resource requests
271	267	*
272		- * @head : head of the list tracking requests for resources
273		- * @fail_head : head of the list tracking requests that could
274		- * not be allocated
	268	+ * @head: Head of the list tracking requests for resources
	269	+ * @fail_head: Head of the list tracking requests that could not be
	270	+ * allocated
275	271	*
276		- * Satisfy resource requests of each element in the list. Add
277		- * requests that could not satisfied to the failed_list.
	272	+ * Satisfy resource requests of each element in the list. Add requests that
	273	+ * could not be satisfied to the failed_list.
278	274	*/
279	275	static void assign_requested_resources_sorted(struct list_head *head,
280	276	struct list_head *fail_head)
..	..	@@ -290,8 +286,9 @@
290	286	pci_assign_resource(dev_res->dev, idx)) {
291	287	if (fail_head) {
292	288	/*
293		- * if the failed res is for ROM BAR, and it will
294		- * be enabled later, don't add it to the list
	289	+ * If the failed resource is a ROM BAR and
	290	+ * it will be enabled later, don't add it
	291	+ * to the list.
295	292	*/
296	293	if (!((idx == PCI_ROM_RESOURCE) &&
297	294	(!(res->flags & IORESOURCE_ROM_ENABLE))))
..	..	@@ -310,15 +307,14 @@
310	307	struct pci_dev_resource *fail_res;
311	308	unsigned long mask = 0;
312	309
313		- /* check failed type */
	310	+ /* Check failed type */
314	311	list_for_each_entry(fail_res, fail_head, list)
315	312	mask \|= fail_res->flags;
316	313
317	314	/*
318		- * one pref failed resource will set IORESOURCE_MEM,
319		- * as we can allocate pref in non-pref range.
320		- * Will release all assigned non-pref sibling resources
321		- * according to that bit.
	315	+ * One pref failed resource will set IORESOURCE_MEM, as we can
	316	+ * allocate pref in non-pref range. Will release all assigned
	317	+ * non-pref sibling resources according to that bit.
322	318	*/
323	319	return mask & (IORESOURCE_IO \| IORESOURCE_MEM \| IORESOURCE_PREFETCH);
324	320	}
..	..	@@ -328,11 +324,11 @@
328	324	if (res->flags & IORESOURCE_IO)
329	325	return !!(mask & IORESOURCE_IO);
330	326
331		- /* check pref at first */
	327	+ /* Check pref at first */
332	328	if (res->flags & IORESOURCE_PREFETCH) {
333	329	if (mask & IORESOURCE_PREFETCH)
334	330	return true;
335		- /* count pref if its parent is non-pref */
	331	+ /* Count pref if its parent is non-pref */
336	332	else if ((mask & IORESOURCE_MEM) &&
337	333	!(res->parent->flags & IORESOURCE_PREFETCH))
338	334	return true;
..	..	@@ -343,33 +339,33 @@
343	339	if (res->flags & IORESOURCE_MEM)
344	340	return !!(mask & IORESOURCE_MEM);
345	341
346		- return false; /* should not get here */
	342	+ return false; /* Should not get here */
347	343	}
348	344
349	345	static void __assign_resources_sorted(struct list_head *head,
350		- struct list_head *realloc_head,
351		- struct list_head *fail_head)
	346	+ struct list_head *realloc_head,
	347	+ struct list_head *fail_head)
352	348	{
353	349	/*
354		- * Should not assign requested resources at first.
355		- * they could be adjacent, so later reassign can not reallocate
356		- * them one by one in parent resource window.
357		- * Try to assign requested + add_size at beginning
358		- * if could do that, could get out early.
359		- * if could not do that, we still try to assign requested at first,
360		- * then try to reassign add_size for some resources.
	350	+ * Should not assign requested resources at first. They could be
	351	+ * adjacent, so later reassign can not reallocate them one by one in
	352	+ * parent resource window.
	353	+ *
	354	+ * Try to assign requested + add_size at beginning. If could do that,
	355	+ * could get out early. If could not do that, we still try to assign
	356	+ * requested at first, then try to reassign add_size for some resources.
361	357	*
362	358	* Separate three resource type checking if we need to release
363	359	* assigned resource after requested + add_size try.
364		- * 1. if there is io port assign fail, will release assigned
365		- * io port.
366		- * 2. if there is pref mmio assign fail, release assigned
367		- * pref mmio.
368		- * if assigned pref mmio's parent is non-pref mmio and there
369		- * is non-pref mmio assign fail, will release that assigned
370		- * pref mmio.
371		- * 3. if there is non-pref mmio assign fail or pref mmio
372		- * assigned fail, will release assigned non-pref mmio.
	360	+ *
	361	+ * 1. If IO port assignment fails, will release assigned IO
	362	+ * port.
	363	+ * 2. If pref MMIO assignment fails, release assigned pref
	364	+ * MMIO. If assigned pref MMIO's parent is non-pref MMIO
	365	+ * and non-pref MMIO assignment fails, will release that
	366	+ * assigned pref MMIO.
	367	+ * 3. If non-pref MMIO assignment fails or pref MMIO
	368	+ * assignment fails, will release assigned non-pref MMIO.
373	369	*/
374	370	LIST_HEAD(save_head);
375	371	LIST_HEAD(local_fail_head);
..	..	@@ -398,7 +394,7 @@
398	394	/*
399	395	* There are two kinds of additional resources in the list:
400	396	* 1. bridge resource -- IORESOURCE_STARTALIGN
401		- * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
	397	+ * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
402	398	* Here just fix the additional alignment for bridge
403	399	*/
404	400	if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
..	..	@@ -407,10 +403,10 @@
407	403	add_align = get_res_add_align(realloc_head, dev_res->res);
408	404
409	405	/*
410		- * The "head" list is sorted by the alignment to make sure
411		- * resources with bigger alignment will be assigned first.
412		- * After we change the alignment of a dev_res in "head" list,
413		- * we need to reorder the list by alignment to make it
	406	+ * The "head" list is sorted by alignment so resources with
	407	+ * bigger alignment will be assigned first. After we
	408	+ * change the alignment of a dev_res in "head" list, we
	409	+ * need to reorder the list by alignment to make it
414	410	* consistent.
415	411	*/
416	412	if (add_align > dev_res->res->start) {
..	..	@@ -435,7 +431,7 @@
435	431	/* Try updated head list with add_size added */
436	432	assign_requested_resources_sorted(head, &local_fail_head);
437	433
438		- /* all assigned with add_size ? */
	434	+ /* All assigned with add_size? */
439	435	if (list_empty(&local_fail_head)) {
440	436	/* Remove head list from realloc_head list */
441	437	list_for_each_entry(dev_res, head, list)
..	..	@@ -445,13 +441,13 @@
445	441	return;
446	442	}
447	443
448		- /* check failed type */
	444	+ /* Check failed type */
449	445	fail_type = pci_fail_res_type_mask(&local_fail_head);
450		- /* remove not need to be released assigned res from head list etc */
	446	+ /* Remove not need to be released assigned res from head list etc */
451	447	list_for_each_entry_safe(dev_res, tmp_res, head, list)
452	448	if (dev_res->res->parent &&
453	449	!pci_need_to_release(fail_type, dev_res->res)) {
454		- /* remove it from realloc_head list */
	450	+ /* Remove it from realloc_head list */
455	451	remove_from_list(realloc_head, dev_res->res);
456	452	remove_from_list(&save_head, dev_res->res);
457	453	list_del(&dev_res->list);
..	..	@@ -477,16 +473,15 @@
477	473	/* Satisfy the must-have resource requests */
478	474	assign_requested_resources_sorted(head, fail_head);
479	475
480		- /* Try to satisfy any additional optional resource
481		- requests */
	476	+ /* Try to satisfy any additional optional resource requests */
482	477	if (realloc_head)
483	478	reassign_resources_sorted(realloc_head, head);
484	479	free_list(head);
485	480	}
486	481
487	482	static void pdev_assign_resources_sorted(struct pci_dev *dev,
488		- struct list_head *add_head,
489		- struct list_head *fail_head)
	483	+ struct list_head *add_head,
	484	+ struct list_head *fail_head)
490	485	{
491	486	LIST_HEAD(head);
492	487
..	..	@@ -563,17 +558,19 @@
563	558	}
564	559	EXPORT_SYMBOL(pci_setup_cardbus);
565	560
566		-/* Initialize bridges with base/limit values we have collected.
567		- PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
568		- requires that if there is no I/O ports or memory behind the
569		- bridge, corresponding range must be turned off by writing base
570		- value greater than limit to the bridge's base/limit registers.
571		-
572		- Note: care must be taken when updating I/O base/limit registers
573		- of bridges which support 32-bit I/O. This update requires two
574		- config space writes, so it's quite possible that an I/O window of
575		- the bridge will have some undesirable address (e.g. 0) after the
576		- first write. Ditto 64-bit prefetchable MMIO. */
	561	+/*
	562	+ * Initialize bridges with base/limit values we have collected. PCI-to-PCI
	563	+ * Bridge Architecture Specification rev. 1.1 (1998) requires that if there
	564	+ * are no I/O ports or memory behind the bridge, the corresponding range
	565	+ * must be turned off by writing base value greater than limit to the
	566	+ * bridge's base/limit registers.
	567	+ *
	568	+ * Note: care must be taken when updating I/O base/limit registers of
	569	+ * bridges which support 32-bit I/O. This update requires two config space
	570	+ * writes, so it's quite possible that an I/O window of the bridge will
	571	+ * have some undesirable address (e.g. 0) after the first write. Ditto
	572	+ * 64-bit prefetchable MMIO.
	573	+ */
577	574	static void pci_setup_bridge_io(struct pci_dev *bridge)
578	575	{
579	576	struct resource *res;
..	..	@@ -587,27 +584,27 @@
587	584	if (bridge->io_window_1k)
588	585	io_mask = PCI_IO_1K_RANGE_MASK;
589	586
590		- /* Set up the top and bottom of the PCI I/O segment for this bus. */
591		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
	587	+ /* Set up the top and bottom of the PCI I/O segment for this bus */
	588	+ res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];
592	589	pcibios_resource_to_bus(bridge->bus, &region, res);
593	590	if (res->flags & IORESOURCE_IO) {
594	591	pci_read_config_word(bridge, PCI_IO_BASE, &l);
595	592	io_base_lo = (region.start >> 8) & io_mask;
596	593	io_limit_lo = (region.end >> 8) & io_mask;
597	594	l = ((u16) io_limit_lo << 8) \| io_base_lo;
598		- /* Set up upper 16 bits of I/O base/limit. */
	595	+ /* Set up upper 16 bits of I/O base/limit */
599	596	io_upper16 = (region.end & 0xffff0000) \| (region.start >> 16);
600	597	pci_info(bridge, " bridge window %pR\n", res);
601	598	} else {
602		- /* Clear upper 16 bits of I/O base/limit. */
	599	+ /* Clear upper 16 bits of I/O base/limit */
603	600	io_upper16 = 0;
604	601	l = 0x00f0;
605	602	}
606		- /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
	603	+ /* Temporarily disable the I/O range before updating PCI_IO_BASE */
607	604	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
608		- /* Update lower 16 bits of I/O base/limit. */
	605	+ /* Update lower 16 bits of I/O base/limit */
609	606	pci_write_config_word(bridge, PCI_IO_BASE, l);
610		- /* Update upper 16 bits of I/O base/limit. */
	607	+ /* Update upper 16 bits of I/O base/limit */
611	608	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
612	609	}
613	610
..	..	@@ -617,8 +614,8 @@
617	614	struct pci_bus_region region;
618	615	u32 l;
619	616
620		- /* Set up the top and bottom of the PCI Memory segment for this bus. */
621		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
	617	+ /* Set up the top and bottom of the PCI Memory segment for this bus */
	618	+ res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];
622	619	pcibios_resource_to_bus(bridge->bus, &region, res);
623	620	if (res->flags & IORESOURCE_MEM) {
624	621	l = (region.start >> 16) & 0xfff0;
..	..	@@ -636,14 +633,16 @@
636	633	struct pci_bus_region region;
637	634	u32 l, bu, lu;
638	635
639		- /* Clear out the upper 32 bits of PREF limit.
640		- If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
641		- disables PREF range, which is ok. */
	636	+ /*
	637	+ * Clear out the upper 32 bits of PREF limit. If
	638	+ * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables
	639	+ * PREF range, which is ok.
	640	+ */
642	641	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
643	642
644		- /* Set up PREF base/limit. */
	643	+ /* Set up PREF base/limit */
645	644	bu = lu = 0;
646		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
	645	+ res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
647	646	pcibios_resource_to_bus(bridge->bus, &region, res);
648	647	if (res->flags & IORESOURCE_PREFETCH) {
649	648	l = (region.start >> 16) & 0xfff0;
..	..	@@ -658,7 +657,7 @@
658	657	}
659	658	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
660	659
661		- /* Set the upper 32 bits of PREF base & limit. */
	660	+ /* Set the upper 32 bits of PREF base & limit */
662	661	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
663	662	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
664	663	}
..	..	@@ -702,22 +701,22 @@
702	701	return 0;
703	702
704	703	if (pci_claim_resource(bridge, i) == 0)
705		- return 0; /* claimed the window */
	704	+ return 0; /* Claimed the window */
706	705
707	706	if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
708	707	return 0;
709	708
710	709	if (!pci_bus_clip_resource(bridge, i))
711		- return -EINVAL; /* clipping didn't change anything */
	710	+ return -EINVAL; /* Clipping didn't change anything */
712	711
713		- switch (i - PCI_BRIDGE_RESOURCES) {
714		- case 0:
	712	+ switch (i) {
	713	+ case PCI_BRIDGE_IO_WINDOW:
715	714	pci_setup_bridge_io(bridge);
716	715	break;
717		- case 1:
	716	+ case PCI_BRIDGE_MEM_WINDOW:
718	717	pci_setup_bridge_mmio(bridge);
719	718	break;
720		- case 2:
	719	+ case PCI_BRIDGE_PREF_MEM_WINDOW:
721	720	pci_setup_bridge_mmio_pref(bridge);
722	721	break;
723	722	default:
..	..	@@ -725,115 +724,101 @@
725	724	}
726	725
727	726	if (pci_claim_resource(bridge, i) == 0)
728		- return 0; /* claimed a smaller window */
	727	+ return 0; /* Claimed a smaller window */
729	728
730	729	return -EINVAL;
731	730	}
732	731
733		-/* Check whether the bridge supports optional I/O and
734		- prefetchable memory ranges. If not, the respective
735		- base/limit registers must be read-only and read as 0. */
	732	+/*
	733	+ * Check whether the bridge supports optional I/O and prefetchable memory
	734	+ * ranges. If not, the respective base/limit registers must be read-only
	735	+ * and read as 0.
	736	+ */
736	737	static void pci_bridge_check_ranges(struct pci_bus *bus)
737	738	{
738		- u16 io;
739		- u32 pmem;
740	739	struct pci_dev *bridge = bus->self;
741	740	struct resource *b_res;
742	741
743		- b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
744		- b_res[1].flags \|= IORESOURCE_MEM;
	742	+ b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];
	743	+ b_res->flags \|= IORESOURCE_MEM;
745	744
746		- pci_read_config_word(bridge, PCI_IO_BASE, &io);
747		- if (!io) {
748		- pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0);
749		- pci_read_config_word(bridge, PCI_IO_BASE, &io);
750		- pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
	745	+ if (bridge->io_window) {
	746	+ b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];
	747	+ b_res->flags \|= IORESOURCE_IO;
751	748	}
752		- if (io)
753		- b_res[0].flags \|= IORESOURCE_IO;
754	749
755		- /* DECchip 21050 pass 2 errata: the bridge may miss an address
756		- disconnect boundary by one PCI data phase.
757		- Workaround: do not use prefetching on this device. */
758		- if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
759		- return;
760		-
761		- pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
762		- if (!pmem) {
763		- pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
764		- 0xffe0fff0);
765		- pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
766		- pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
767		- }
768		- if (pmem) {
769		- b_res[2].flags \|= IORESOURCE_MEM \| IORESOURCE_PREFETCH;
770		- if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
771		- PCI_PREF_RANGE_TYPE_64) {
772		- b_res[2].flags \|= IORESOURCE_MEM_64;
773		- b_res[2].flags \|= PCI_PREF_RANGE_TYPE_64;
	750	+ if (bridge->pref_window) {
	751	+ b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
	752	+ b_res->flags \|= IORESOURCE_MEM \| IORESOURCE_PREFETCH;
	753	+ if (bridge->pref_64_window) {
	754	+ b_res->flags \|= IORESOURCE_MEM_64 \|
	755	+ PCI_PREF_RANGE_TYPE_64;
774	756	}
775		- }
776		-
777		- /* double check if bridge does support 64 bit pref */
778		- if (b_res[2].flags & IORESOURCE_MEM_64) {
779		- u32 mem_base_hi, tmp;
780		- pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
781		- &mem_base_hi);
782		- pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
783		- 0xffffffff);
784		- pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
785		- if (!tmp)
786		- b_res[2].flags &= ~IORESOURCE_MEM_64;
787		- pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
788		- mem_base_hi);
789	757	}
790	758	}
791	759
792		-/* Helper function for sizing routines: find first available
793		- bus resource of a given type. Note: we intentionally skip
794		- the bus resources which have already been assigned (that is,
795		- have non-NULL parent resource). */
796		-static struct resource find_free_bus_resource(struct pci_bus bus,
797		- unsigned long type_mask, unsigned long type)
	760	+/*
	761	+ * Helper function for sizing routines. Assigned resources have non-NULL
	762	+ * parent resource.
	763	+ *
	764	+ * Return first unassigned resource of the correct type. If there is none,
	765	+ * return first assigned resource of the correct type. If none of the
	766	+ * above, return NULL.
	767	+ *
	768	+ * Returning an assigned resource of the correct type allows the caller to
	769	+ * distinguish between already assigned and no resource of the correct type.
	770	+ */
	771	+static struct resource find_bus_resource_of_type(struct pci_bus bus,
	772	+ unsigned long type_mask,
	773	+ unsigned long type)
798	774	{
	775	+ struct resource r, r_assigned = NULL;
799	776	int i;
800		- struct resource *r;
801	777
802	778	pci_bus_for_each_resource(bus, r, i) {
803	779	if (r == &ioport_resource \|\| r == &iomem_resource)
804	780	continue;
805	781	if (r && (r->flags & type_mask) == type && !r->parent)
806	782	return r;
	783	+ if (r && (r->flags & type_mask) == type && !r_assigned)
	784	+ r_assigned = r;
807	785	}
808		- return NULL;
	786	+ return r_assigned;
809	787	}
810	788
811	789	static resource_size_t calculate_iosize(resource_size_t size,
812		- resource_size_t min_size,
813		- resource_size_t size1,
814		- resource_size_t old_size,
815		- resource_size_t align)
	790	+ resource_size_t min_size,
	791	+ resource_size_t size1,
	792	+ resource_size_t add_size,
	793	+ resource_size_t children_add_size,
	794	+ resource_size_t old_size,
	795	+ resource_size_t align)
816	796	{
817	797	if (size < min_size)
818	798	size = min_size;
819	799	if (old_size == 1)
820	800	old_size = 0;
821		- /* To be fixed in 2.5: we should have sort of HAVE_ISA
822		- flag in the struct pci_bus. */
	801	+ /*
	802	+ * To be fixed in 2.5: we should have sort of HAVE_ISA flag in the
	803	+ * struct pci_bus.
	804	+ */
823	805	#if defined(CONFIG_ISA) \|\| defined(CONFIG_EISA)
824	806	size = (size & 0xff) + ((size & ~0xffUL) << 2);
825	807	#endif
826		- size = ALIGN(size + size1, align);
	808	+ size = size + size1;
827	809	if (size < old_size)
828	810	size = old_size;
	811	+
	812	+ size = ALIGN(max(size, add_size) + children_add_size, align);
829	813	return size;
830	814	}
831	815
832	816	static resource_size_t calculate_memsize(resource_size_t size,
833		- resource_size_t min_size,
834		- resource_size_t size1,
835		- resource_size_t old_size,
836		- resource_size_t align)
	817	+ resource_size_t min_size,
	818	+ resource_size_t add_size,
	819	+ resource_size_t children_add_size,
	820	+ resource_size_t old_size,
	821	+ resource_size_t align)
837	822	{
838	823	if (size < min_size)
839	824	size = min_size;
..	..	@@ -841,7 +826,8 @@
841	826	old_size = 0;
842	827	if (size < old_size)
843	828	size = old_size;
844		- size = ALIGN(size + size1, align);
	829	+
	830	+ size = ALIGN(max(size, add_size) + children_add_size, align);
845	831	return size;
846	832	}
847	833
..	..	@@ -855,8 +841,7 @@
855	841	#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
856	842	#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
857	843
858		-static resource_size_t window_alignment(struct pci_bus *bus,
859		- unsigned long type)
	844	+static resource_size_t window_alignment(struct pci_bus *bus, unsigned long type)
860	845	{
861	846	resource_size_t align = 1, arch_align;
862	847
..	..	@@ -864,10 +849,10 @@
864	849	align = PCI_P2P_DEFAULT_MEM_ALIGN;
865	850	else if (type & IORESOURCE_IO) {
866	851	/*
867		- * Per spec, I/O windows are 4K-aligned, but some
868		- * bridges have an extension to support 1K alignment.
	852	+ * Per spec, I/O windows are 4K-aligned, but some bridges have
	853	+ * an extension to support 1K alignment.
869	854	*/
870		- if (bus->self->io_window_1k)
	855	+ if (bus->self && bus->self->io_window_1k)
871	856	align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
872	857	else
873	858	align = PCI_P2P_DEFAULT_IO_ALIGN;
..	..	@@ -878,29 +863,34 @@
878	863	}
879	864
880	865	/**
881		- * pbus_size_io() - size the io window of a given bus
	866	+ * pbus_size_io() - Size the I/O window of a given bus
882	867	*
883		- * @bus : the bus
884		- * @min_size : the minimum io window that must to be allocated
885		- * @add_size : additional optional io window
886		- * @realloc_head : track the additional io window on this list
	868	+ * @bus: The bus
	869	+ * @min_size: The minimum I/O window that must be allocated
	870	+ * @add_size: Additional optional I/O window
	871	+ * @realloc_head: Track the additional I/O window on this list
887	872	*
888		- * Sizing the IO windows of the PCI-PCI bridge is trivial,
889		- * since these windows have 1K or 4K granularity and the IO ranges
890		- * of non-bridge PCI devices are limited to 256 bytes.
891		- * We must be careful with the ISA aliasing though.
	873	+ * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
	874	+ * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
	875	+ * devices are limited to 256 bytes. We must be careful with the ISA
	876	+ * aliasing though.
892	877	*/
893	878	static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
894		- resource_size_t add_size, struct list_head *realloc_head)
	879	+ resource_size_t add_size,
	880	+ struct list_head *realloc_head)
895	881	{
896	882	struct pci_dev *dev;
897		- struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO,
898		- IORESOURCE_IO);
	883	+ struct resource *b_res = find_bus_resource_of_type(bus, IORESOURCE_IO,
	884	+ IORESOURCE_IO);
899	885	resource_size_t size = 0, size0 = 0, size1 = 0;
900	886	resource_size_t children_add_size = 0;
901	887	resource_size_t min_align, align;
902	888
903	889	if (!b_res)
	890	+ return;
	891	+
	892	+ /* If resource is already assigned, nothing more to do */
	893	+ if (b_res->parent)
904	894	return;
905	895
906	896	min_align = window_alignment(bus, IORESOURCE_IO);
..	..	@@ -930,15 +920,13 @@
930	920	}
931	921	}
932	922
933		- size0 = calculate_iosize(size, min_size, size1,
	923	+ size0 = calculate_iosize(size, min_size, size1, 0, 0,
934	924	resource_size(b_res), min_align);
935		- if (children_add_size > add_size)
936		- add_size = children_add_size;
937		- size1 = (!realloc_head \|\| (realloc_head && !add_size)) ? size0 :
938		- calculate_iosize(size, min_size, add_size + size1,
	925	+ size1 = (!realloc_head \|\| (realloc_head && !add_size && !children_add_size)) ? size0 :
	926	+ calculate_iosize(size, min_size, size1, add_size, children_add_size,
939	927	resource_size(b_res), min_align);
940	928	if (!size0 && !size1) {
941		- if (b_res->start \|\| b_res->end)
	929	+ if (bus->self && (b_res->start \|\| b_res->end))
942	930	pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
943	931	b_res, &bus->busn_res);
944	932	b_res->flags = 0;
..	..	@@ -948,12 +936,12 @@
948	936	b_res->start = min_align;
949	937	b_res->end = b_res->start + size0 - 1;
950	938	b_res->flags \|= IORESOURCE_STARTALIGN;
951		- if (size1 > size0 && realloc_head) {
	939	+ if (bus->self && size1 > size0 && realloc_head) {
952	940	add_to_list(realloc_head, bus->self, b_res, size1-size0,
953	941	min_align);
954		- pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx\n",
955		- b_res, &bus->busn_res,
956		- (unsigned long long)size1-size0);
	942	+ pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n",
	943	+ b_res, &bus->busn_res,
	944	+ (unsigned long long) size1 - size0);
957	945	}
958	946	}
959	947
..	..	@@ -980,35 +968,35 @@
980	968	}
981	969
982	970	/**
983		- * pbus_size_mem() - size the memory window of a given bus
	971	+ * pbus_size_mem() - Size the memory window of a given bus
984	972	*
985		- * @bus : the bus
986		- * @mask: mask the resource flag, then compare it with type
987		- * @type: the type of free resource from bridge
988		- * @type2: second match type
989		- * @type3: third match type
990		- * @min_size : the minimum memory window that must to be allocated
991		- * @add_size : additional optional memory window
992		- * @realloc_head : track the additional memory window on this list
	973	+ * @bus: The bus
	974	+ * @mask: Mask the resource flag, then compare it with type
	975	+ * @type: The type of free resource from bridge
	976	+ * @type2: Second match type
	977	+ * @type3: Third match type
	978	+ * @min_size: The minimum memory window that must be allocated
	979	+ * @add_size: Additional optional memory window
	980	+ * @realloc_head: Track the additional memory window on this list
993	981	*
994		- * Calculate the size of the bus and minimal alignment which
995		- * guarantees that all child resources fit in this size.
	982	+ * Calculate the size of the bus and minimal alignment which guarantees
	983	+ * that all child resources fit in this size.
996	984	*
997		- * Returns -ENOSPC if there's no available bus resource of the desired type.
998		- * Otherwise, sets the bus resource start/end to indicate the required
999		- * size, adds things to realloc_head (if supplied), and returns 0.
	985	+ * Return -ENOSPC if there's no available bus resource of the desired
	986	+ * type. Otherwise, set the bus resource start/end to indicate the
	987	+ * required size, add things to realloc_head (if supplied), and return 0.
1000	988	*/
1001	989	static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
1002	990	unsigned long type, unsigned long type2,
1003		- unsigned long type3,
1004		- resource_size_t min_size, resource_size_t add_size,
	991	+ unsigned long type3, resource_size_t min_size,
	992	+ resource_size_t add_size,
1005	993	struct list_head *realloc_head)
1006	994	{
1007	995	struct pci_dev *dev;
1008	996	resource_size_t min_align, align, size, size0, size1;
1009		- resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
	997	+ resource_size_t aligns[18]; /* Alignments from 1MB to 128GB */
1010	998	int order, max_order;
1011		- struct resource *b_res = find_free_bus_resource(bus,
	999	+ struct resource *b_res = find_bus_resource_of_type(bus,
1012	1000	mask \| IORESOURCE_PREFETCH, type);
1013	1001	resource_size_t children_add_size = 0;
1014	1002	resource_size_t children_add_align = 0;
..	..	@@ -1016,6 +1004,10 @@
1016	1004
1017	1005	if (!b_res)
1018	1006	return -ENOSPC;
	1007	+
	1008	+ /* If resource is already assigned, nothing more to do */
	1009	+ if (b_res->parent)
	1010	+ return 0;
1019	1011
1020	1012	memset(aligns, 0, sizeof(aligns));
1021	1013	max_order = 0;
..	..	@@ -1035,12 +1027,12 @@
1035	1027	continue;
1036	1028	r_size = resource_size(r);
1037	1029	#ifdef CONFIG_PCI_IOV
1038		- /* put SRIOV requested res to the optional list */
	1030	+ /* Put SRIOV requested res to the optional list */
1039	1031	if (realloc_head && i >= PCI_IOV_RESOURCES &&
1040	1032	i <= PCI_IOV_RESOURCE_END) {
1041	1033	add_align = max(pci_resource_alignment(dev, r), add_align);
1042	1034	r->end = r->start - 1;
1043		- add_to_list(realloc_head, dev, r, r_size, 0/* don't care */);
	1035	+ add_to_list(realloc_head, dev, r, r_size, 0 /* Don't care */);
1044	1036	children_add_size += r_size;
1045	1037	continue;
1046	1038	}
..	..	@@ -1062,8 +1054,10 @@
1062	1054	continue;
1063	1055	}
1064	1056	size += max(r_size, align);
1065		- /* Exclude ranges with size > align from
1066		- calculation of the alignment. */
	1057	+ /*
	1058	+ * Exclude ranges with size > align from calculation of
	1059	+ * the alignment.
	1060	+ */
1067	1061	if (r_size <= align)
1068	1062	aligns[order] += align;
1069	1063	if (order > max_order)
..	..	@@ -1079,15 +1073,13 @@
1079	1073
1080	1074	min_align = calculate_mem_align(aligns, max_order);
1081	1075	min_align = max(min_align, window_alignment(bus, b_res->flags));
1082		- size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
	1076	+ size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), min_align);
1083	1077	add_align = max(min_align, add_align);
1084		- if (children_add_size > add_size)
1085		- add_size = children_add_size;
1086		- size1 = (!realloc_head \|\| (realloc_head && !add_size)) ? size0 :
1087		- calculate_memsize(size, min_size, add_size,
	1078	+ size1 = (!realloc_head \|\| (realloc_head && !add_size && !children_add_size)) ? size0 :
	1079	+ calculate_memsize(size, min_size, add_size, children_add_size,
1088	1080	resource_size(b_res), add_align);
1089	1081	if (!size0 && !size1) {
1090		- if (b_res->start \|\| b_res->end)
	1082	+ if (bus->self && (b_res->start \|\| b_res->end))
1091	1083	pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
1092	1084	b_res, &bus->busn_res);
1093	1085	b_res->flags = 0;
..	..	@@ -1096,9 +1088,9 @@
1096	1088	b_res->start = min_align;
1097	1089	b_res->end = size0 + min_align - 1;
1098	1090	b_res->flags \|= IORESOURCE_STARTALIGN;
1099		- if (size1 > size0 && realloc_head) {
	1091	+ if (bus->self && size1 > size0 && realloc_head) {
1100	1092	add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align);
1101		- pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",
	1093	+ pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",
1102	1094	b_res, &bus->busn_res,
1103	1095	(unsigned long long) (size1 - size0),
1104	1096	(unsigned long long) add_align);
..	..	@@ -1116,42 +1108,44 @@
1116	1108	}
1117	1109
1118	1110	static void pci_bus_size_cardbus(struct pci_bus *bus,
1119		- struct list_head *realloc_head)
	1111	+ struct list_head *realloc_head)
1120	1112	{
1121	1113	struct pci_dev *bridge = bus->self;
1122		- struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
	1114	+ struct resource *b_res;
1123	1115	resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
1124	1116	u16 ctrl;
1125	1117
1126		- if (b_res[0].parent)
	1118	+ b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW];
	1119	+ if (b_res->parent)
1127	1120	goto handle_b_res_1;
1128	1121	/*
1129		- * Reserve some resources for CardBus. We reserve
1130		- * a fixed amount of bus space for CardBus bridges.
	1122	+ * Reserve some resources for CardBus. We reserve a fixed amount
	1123	+ * of bus space for CardBus bridges.
1131	1124	*/
1132		- b_res[0].start = pci_cardbus_io_size;
1133		- b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1134		- b_res[0].flags \|= IORESOURCE_IO \| IORESOURCE_STARTALIGN;
	1125	+ b_res->start = pci_cardbus_io_size;
	1126	+ b_res->end = b_res->start + pci_cardbus_io_size - 1;
	1127	+ b_res->flags \|= IORESOURCE_IO \| IORESOURCE_STARTALIGN;
1135	1128	if (realloc_head) {
1136		- b_res[0].end -= pci_cardbus_io_size;
	1129	+ b_res->end -= pci_cardbus_io_size;
1137	1130	add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1138		- pci_cardbus_io_size);
	1131	+ pci_cardbus_io_size);
1139	1132	}
1140	1133
1141	1134	handle_b_res_1:
1142		- if (b_res[1].parent)
	1135	+ b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW];
	1136	+ if (b_res->parent)
1143	1137	goto handle_b_res_2;
1144		- b_res[1].start = pci_cardbus_io_size;
1145		- b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1146		- b_res[1].flags \|= IORESOURCE_IO \| IORESOURCE_STARTALIGN;
	1138	+ b_res->start = pci_cardbus_io_size;
	1139	+ b_res->end = b_res->start + pci_cardbus_io_size - 1;
	1140	+ b_res->flags \|= IORESOURCE_IO \| IORESOURCE_STARTALIGN;
1147	1141	if (realloc_head) {
1148		- b_res[1].end -= pci_cardbus_io_size;
1149		- add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1150		- pci_cardbus_io_size);
	1142	+ b_res->end -= pci_cardbus_io_size;
	1143	+ add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
	1144	+ pci_cardbus_io_size);
1151	1145	}
1152	1146
1153	1147	handle_b_res_2:
1154		- /* MEM1 must not be pref mmio */
	1148	+ /* MEM1 must not be pref MMIO */
1155	1149	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1156	1150	if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1157	1151	ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
..	..	@@ -1159,10 +1153,7 @@
1159	1153	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1160	1154	}
1161	1155
1162		- /*
1163		- * Check whether prefetchable memory is supported
1164		- * by this bridge.
1165		- */
	1156	+ /* Check whether prefetchable memory is supported by this bridge. */
1166	1157	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1167	1158	if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1168	1159	ctrl \|= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
..	..	@@ -1170,38 +1161,39 @@
1170	1161	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1171	1162	}
1172	1163
1173		- if (b_res[2].parent)
	1164	+ b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW];
	1165	+ if (b_res->parent)
1174	1166	goto handle_b_res_3;
1175	1167	/*
1176		- * If we have prefetchable memory support, allocate
1177		- * two regions. Otherwise, allocate one region of
1178		- * twice the size.
	1168	+ * If we have prefetchable memory support, allocate two regions.
	1169	+ * Otherwise, allocate one region of twice the size.
1179	1170	*/
1180	1171	if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
1181		- b_res[2].start = pci_cardbus_mem_size;
1182		- b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1183		- b_res[2].flags \|= IORESOURCE_MEM \| IORESOURCE_PREFETCH \|
1184		- IORESOURCE_STARTALIGN;
	1172	+ b_res->start = pci_cardbus_mem_size;
	1173	+ b_res->end = b_res->start + pci_cardbus_mem_size - 1;
	1174	+ b_res->flags \|= IORESOURCE_MEM \| IORESOURCE_PREFETCH \|
	1175	+ IORESOURCE_STARTALIGN;
1185	1176	if (realloc_head) {
1186		- b_res[2].end -= pci_cardbus_mem_size;
1187		- add_to_list(realloc_head, bridge, b_res+2,
1188		- pci_cardbus_mem_size, pci_cardbus_mem_size);
	1177	+ b_res->end -= pci_cardbus_mem_size;
	1178	+ add_to_list(realloc_head, bridge, b_res,
	1179	+ pci_cardbus_mem_size, pci_cardbus_mem_size);
1189	1180	}
1190	1181
1191		- /* reduce that to half */
	1182	+ /* Reduce that to half */
1192	1183	b_res_3_size = pci_cardbus_mem_size;
1193	1184	}
1194	1185
1195	1186	handle_b_res_3:
1196		- if (b_res[3].parent)
	1187	+ b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW];
	1188	+ if (b_res->parent)
1197	1189	goto handle_done;
1198		- b_res[3].start = pci_cardbus_mem_size;
1199		- b_res[3].end = b_res[3].start + b_res_3_size - 1;
1200		- b_res[3].flags \|= IORESOURCE_MEM \| IORESOURCE_STARTALIGN;
	1190	+ b_res->start = pci_cardbus_mem_size;
	1191	+ b_res->end = b_res->start + b_res_3_size - 1;
	1192	+ b_res->flags \|= IORESOURCE_MEM \| IORESOURCE_STARTALIGN;
1201	1193	if (realloc_head) {
1202		- b_res[3].end -= b_res_3_size;
1203		- add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1204		- pci_cardbus_mem_size);
	1194	+ b_res->end -= b_res_3_size;
	1195	+ add_to_list(realloc_head, bridge, b_res, b_res_3_size,
	1196	+ pci_cardbus_mem_size);
1205	1197	}
1206	1198
1207	1199	handle_done:
..	..	@@ -1212,21 +1204,23 @@
1212	1204	{
1213	1205	struct pci_dev *dev;
1214	1206	unsigned long mask, prefmask, type2 = 0, type3 = 0;
1215		- resource_size_t additional_mem_size = 0, additional_io_size = 0;
1216		- struct resource *b_res;
1217		- int ret;
	1207	+ resource_size_t additional_io_size = 0, additional_mmio_size = 0,
	1208	+ additional_mmio_pref_size = 0;
	1209	+ struct resource *pref;
	1210	+ struct pci_host_bridge *host;
	1211	+ int hdr_type, i, ret;
1218	1212
1219	1213	list_for_each_entry(dev, &bus->devices, bus_list) {
1220	1214	struct pci_bus *b = dev->subordinate;
1221	1215	if (!b)
1222	1216	continue;
1223	1217
1224		- switch (dev->class >> 8) {
1225		- case PCI_CLASS_BRIDGE_CARDBUS:
	1218	+ switch (dev->hdr_type) {
	1219	+ case PCI_HEADER_TYPE_CARDBUS:
1226	1220	pci_bus_size_cardbus(b, realloc_head);
1227	1221	break;
1228	1222
1229		- case PCI_CLASS_BRIDGE_PCI:
	1223	+ case PCI_HEADER_TYPE_BRIDGE:
1230	1224	default:
1231	1225	__pci_bus_size_bridges(b, realloc_head);
1232	1226	break;
..	..	@@ -1234,21 +1228,32 @@
1234	1228	}
1235	1229
1236	1230	/* The root bus? */
1237		- if (pci_is_root_bus(bus))
1238		- return;
	1231	+ if (pci_is_root_bus(bus)) {
	1232	+ host = to_pci_host_bridge(bus->bridge);
	1233	+ if (!host->size_windows)
	1234	+ return;
	1235	+ pci_bus_for_each_resource(bus, pref, i)
	1236	+ if (pref && (pref->flags & IORESOURCE_PREFETCH))
	1237	+ break;
	1238	+ hdr_type = -1; /* Intentionally invalid - not a PCI device. */
	1239	+ } else {
	1240	+ pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
	1241	+ hdr_type = bus->self->hdr_type;
	1242	+ }
1239	1243
1240		- switch (bus->self->class >> 8) {
1241		- case PCI_CLASS_BRIDGE_CARDBUS:
1242		- /* don't size cardbuses yet. */
	1244	+ switch (hdr_type) {
	1245	+ case PCI_HEADER_TYPE_CARDBUS:
	1246	+ /* Don't size CardBuses yet */
1243	1247	break;
1244	1248
1245		- case PCI_CLASS_BRIDGE_PCI:
	1249	+ case PCI_HEADER_TYPE_BRIDGE:
1246	1250	pci_bridge_check_ranges(bus);
1247	1251	if (bus->self->is_hotplug_bridge) {
1248	1252	additional_io_size = pci_hotplug_io_size;
1249		- additional_mem_size = pci_hotplug_mem_size;
	1253	+ additional_mmio_size = pci_hotplug_mmio_size;
	1254	+ additional_mmio_pref_size = pci_hotplug_mmio_pref_size;
1250	1255	}
1251		- /* Fall through */
	1256	+ fallthrough;
1252	1257	default:
1253	1258	pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1254	1259	additional_io_size, realloc_head);
..	..	@@ -1258,15 +1263,14 @@
1258	1263	* the size required to put all 64-bit prefetchable
1259	1264	* resources in it.
1260	1265	*/
1261		- b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
1262	1266	mask = IORESOURCE_MEM;
1263	1267	prefmask = IORESOURCE_MEM \| IORESOURCE_PREFETCH;
1264		- if (b_res[2].flags & IORESOURCE_MEM_64) {
	1268	+ if (pref && (pref->flags & IORESOURCE_MEM_64)) {
1265	1269	prefmask \|= IORESOURCE_MEM_64;
1266	1270	ret = pbus_size_mem(bus, prefmask, prefmask,
1267		- prefmask, prefmask,
1268		- realloc_head ? 0 : additional_mem_size,
1269		- additional_mem_size, realloc_head);
	1271	+ prefmask, prefmask,
	1272	+ realloc_head ? 0 : additional_mmio_pref_size,
	1273	+ additional_mmio_pref_size, realloc_head);
1270	1274
1271	1275	/*
1272	1276	* If successful, all non-prefetchable resources
..	..	@@ -1288,9 +1292,9 @@
1288	1292	if (!type2) {
1289	1293	prefmask &= ~IORESOURCE_MEM_64;
1290	1294	ret = pbus_size_mem(bus, prefmask, prefmask,
1291		- prefmask, prefmask,
1292		- realloc_head ? 0 : additional_mem_size,
1293		- additional_mem_size, realloc_head);
	1295	+ prefmask, prefmask,
	1296	+ realloc_head ? 0 : additional_mmio_pref_size,
	1297	+ additional_mmio_pref_size, realloc_head);
1294	1298
1295	1299	/*
1296	1300	* If successful, only non-prefetchable resources
..	..	@@ -1299,29 +1303,28 @@
1299	1303	if (ret == 0)
1300	1304	mask = prefmask;
1301	1305	else
1302		- additional_mem_size += additional_mem_size;
	1306	+ additional_mmio_size += additional_mmio_pref_size;
1303	1307
1304	1308	type2 = type3 = IORESOURCE_MEM;
1305	1309	}
1306	1310
1307	1311	/*
1308	1312	* Compute the size required to put everything else in the
1309		- * non-prefetchable window. This includes:
	1313	+ * non-prefetchable window. This includes:
1310	1314	*
1311	1315	* - all non-prefetchable resources
1312	1316	* - 32-bit prefetchable resources if there's a 64-bit
1313	1317	* prefetchable window or no prefetchable window at all
1314		- * - 64-bit prefetchable resources if there's no
1315		- * prefetchable window at all
	1318	+ * - 64-bit prefetchable resources if there's no prefetchable
	1319	+ * window at all
1316	1320	*
1317		- * Note that the strategy in __pci_assign_resource() must
1318		- * match that used here. Specifically, we cannot put a
1319		- * 32-bit prefetchable resource in a 64-bit prefetchable
1320		- * window.
	1321	+ * Note that the strategy in __pci_assign_resource() must match
	1322	+ * that used here. Specifically, we cannot put a 32-bit
	1323	+ * prefetchable resource in a 64-bit prefetchable window.
1321	1324	*/
1322	1325	pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
1323		- realloc_head ? 0 : additional_mem_size,
1324		- additional_mem_size, realloc_head);
	1326	+ realloc_head ? 0 : additional_mmio_size,
	1327	+ additional_mmio_size, realloc_head);
1325	1328	break;
1326	1329	}
1327	1330	}
..	..	@@ -1350,8 +1353,8 @@
1350	1353	}
1351	1354
1352	1355	/*
1353		- * Try to assign any resources marked as IORESOURCE_PCI_FIXED, as they
1354		- * are skipped by pbus_assign_resources_sorted().
	1356	+ * Try to assign any resources marked as IORESOURCE_PCI_FIXED, as they are
	1357	+ * skipped by pbus_assign_resources_sorted().
1355	1358	*/
1356	1359	static void pdev_assign_fixed_resources(struct pci_dev *dev)
1357	1360	{
..	..	@@ -1391,13 +1394,13 @@
1391	1394
1392	1395	__pci_bus_assign_resources(b, realloc_head, fail_head);
1393	1396
1394		- switch (dev->class >> 8) {
1395		- case PCI_CLASS_BRIDGE_PCI:
	1397	+ switch (dev->hdr_type) {
	1398	+ case PCI_HEADER_TYPE_BRIDGE:
1396	1399	if (!pci_is_enabled(dev))
1397	1400	pci_setup_bridge(b);
1398	1401	break;
1399	1402
1400		- case PCI_CLASS_BRIDGE_CARDBUS:
	1403	+ case PCI_HEADER_TYPE_CARDBUS:
1401	1404	pci_setup_cardbus(b);
1402	1405	break;
1403	1406
..	..	@@ -1462,10 +1465,9 @@
1462	1465	struct pci_bus *child;
1463	1466
1464	1467	/*
1465		- * Carry out a depth-first search on the PCI bus
1466		- * tree to allocate bridge apertures. Read the
1467		- * programmed bridge bases and recursively claim
1468		- * the respective bridge resources.
	1468	+ * Carry out a depth-first search on the PCI bus tree to allocate
	1469	+ * bridge apertures. Read the programmed bridge bases and
	1470	+ * recursively claim the respective bridge resources.
1469	1471	*/
1470	1472	if (b->self) {
1471	1473	pci_read_bridge_bases(b);
..	..	@@ -1519,7 +1521,7 @@
1519	1521	IORESOURCE_MEM_64)
1520	1522
1521	1523	static void pci_bridge_release_resources(struct pci_bus *bus,
1522		- unsigned long type)
	1524	+ unsigned long type)
1523	1525	{
1524	1526	struct pci_dev *dev = bus->self;
1525	1527	struct resource *r;
..	..	@@ -1530,16 +1532,14 @@
1530	1532	b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
1531	1533
1532	1534	/*
1533		- * 1. if there is io port assign fail, will release bridge
1534		- * io port.
1535		- * 2. if there is non pref mmio assign fail, release bridge
1536		- * nonpref mmio.
1537		- * 3. if there is 64bit pref mmio assign fail, and bridge pref
1538		- * is 64bit, release bridge pref mmio.
1539		- * 4. if there is pref mmio assign fail, and bridge pref is
1540		- * 32bit mmio, release bridge pref mmio
1541		- * 5. if there is pref mmio assign fail, and bridge pref is not
1542		- * assigned, release bridge nonpref mmio.
	1535	+ * 1. If IO port assignment fails, release bridge IO port.
	1536	+ * 2. If non pref MMIO assignment fails, release bridge nonpref MMIO.
	1537	+ * 3. If 64bit pref MMIO assignment fails, and bridge pref is 64bit,
	1538	+ * release bridge pref MMIO.
	1539	+ * 4. If pref MMIO assignment fails, and bridge pref is 32bit,
	1540	+ * release bridge pref MMIO.
	1541	+ * 5. If pref MMIO assignment fails, and bridge pref is not
	1542	+ * assigned, release bridge nonpref MMIO.
1543	1543	*/
1544	1544	if (type & IORESOURCE_IO)
1545	1545	idx = 0;
..	..	@@ -1559,25 +1559,22 @@
1559	1559	if (!r->parent)
1560	1560	return;
1561	1561
1562		- /*
1563		- * if there are children under that, we should release them
1564		- * all
1565		- */
	1562	+ /* If there are children, release them all */
1566	1563	release_child_resources(r);
1567	1564	if (!release_resource(r)) {
1568	1565	type = old_flags = r->flags & PCI_RES_TYPE_MASK;
1569		- pci_printk(KERN_DEBUG, dev, "resource %d %pR released\n",
1570		- PCI_BRIDGE_RESOURCES + idx, r);
1571		- /* keep the old size */
	1566	+ pci_info(dev, "resource %d %pR released\n",
	1567	+ PCI_BRIDGE_RESOURCES + idx, r);
	1568	+ /* Keep the old size */
1572	1569	r->end = resource_size(r) - 1;
1573	1570	r->start = 0;
1574	1571	r->flags = 0;
1575	1572
1576		- /* avoiding touch the one without PREF */
	1573	+ /* Avoiding touch the one without PREF */
1577	1574	if (type & IORESOURCE_PREFETCH)
1578	1575	type = IORESOURCE_PREFETCH;
1579	1576	__pci_setup_bridge(bus, type);
1580		- /* for next child res under same bridge */
	1577	+ /* For next child res under same bridge */
1581	1578	r->flags = old_flags;
1582	1579	}
1583	1580	}
..	..	@@ -1586,9 +1583,10 @@
1586	1583	leaf_only,
1587	1584	whole_subtree,
1588	1585	};
	1586	+
1589	1587	/*
1590		- * try to release pci bridge resources that is from leaf bridge,
1591		- * so we can allocate big new one later
	1588	+ * Try to release PCI bridge resources from leaf bridge, so we can allocate
	1589	+ * a larger window later.
1592	1590	*/
1593	1591	static void pci_bus_release_bridge_resources(struct pci_bus *bus,
1594	1592	unsigned long type,
..	..	@@ -1631,7 +1629,7 @@
1631	1629	if (!res \|\| !res->end \|\| !res->flags)
1632	1630	continue;
1633	1631
1634		- dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
	1632	+ dev_info(&bus->dev, "resource %d %pR\n", i, res);
1635	1633	}
1636	1634	}
1637	1635
..	..	@@ -1702,8 +1700,8 @@
1702	1700	int i;
1703	1701	bool *unassigned = data;
1704	1702
1705		- for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1706		- struct resource *r = &dev->resource[i];
	1703	+ for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
	1704	+ struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES];
1707	1705	struct pci_bus_region region;
1708	1706
1709	1707	/* Not assigned or rejected by kernel? */
..	..	@@ -1713,7 +1711,7 @@
1713	1711	pcibios_resource_to_bus(dev->bus, &region, r);
1714	1712	if (!region.start) {
1715	1713	*unassigned = true;
1716		- return 1; /* return early from pci_walk_bus() */
	1714	+ return 1; /* Return early from pci_walk_bus() */
1717	1715	}
1718	1716	}
1719	1717
..	..	@@ -1721,12 +1719,17 @@
1721	1719	}
1722	1720
1723	1721	static enum enable_type pci_realloc_detect(struct pci_bus *bus,
1724		- enum enable_type enable_local)
	1722	+ enum enable_type enable_local)
1725	1723	{
1726	1724	bool unassigned = false;
	1725	+ struct pci_host_bridge *host;
1727	1726
1728	1727	if (enable_local != undefined)
1729	1728	return enable_local;
	1729	+
	1730	+ host = pci_find_host_bridge(bus);
	1731	+ if (host->preserve_config)
	1732	+ return auto_disabled;
1730	1733
1731	1734	pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1732	1735	if (unassigned)
..	..	@@ -1736,21 +1739,21 @@
1736	1739	}
1737	1740	#else
1738	1741	static enum enable_type pci_realloc_detect(struct pci_bus *bus,
1739		- enum enable_type enable_local)
	1742	+ enum enable_type enable_local)
1740	1743	{
1741	1744	return enable_local;
1742	1745	}
1743	1746	#endif
1744	1747
1745	1748	/*
1746		- * first try will not touch pci bridge res
1747		- * second and later try will clear small leaf bridge res
1748		- * will stop till to the max depth if can not find good one
	1749	+ * First try will not touch PCI bridge res.
	1750	+ * Second and later try will clear small leaf bridge res.
	1751	+ * Will stop till to the max depth if can not find good one.
1749	1752	*/
1750	1753	void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
1751	1754	{
1752		- LIST_HEAD(realloc_head); /* list of resources that
1753		- want additional resources */
	1755	+ LIST_HEAD(realloc_head);
	1756	+ /* List of resources that want additional resources */
1754	1757	struct list_head *add_list = NULL;
1755	1758	int tried_times = 0;
1756	1759	enum release_type rel_type = leaf_only;
..	..	@@ -1759,26 +1762,26 @@
1759	1762	int pci_try_num = 1;
1760	1763	enum enable_type enable_local;
1761	1764
1762		- /* don't realloc if asked to do so */
	1765	+ /* Don't realloc if asked to do so */
1763	1766	enable_local = pci_realloc_detect(bus, pci_realloc_enable);
1764	1767	if (pci_realloc_enabled(enable_local)) {
1765	1768	int max_depth = pci_bus_get_depth(bus);
1766	1769
1767	1770	pci_try_num = max_depth + 1;
1768		- dev_printk(KERN_DEBUG, &bus->dev,
1769		- "max bus depth: %d pci_try_num: %d\n",
1770		- max_depth, pci_try_num);
	1771	+ dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n",
	1772	+ max_depth, pci_try_num);
1771	1773	}
1772	1774
1773	1775	again:
1774	1776	/*
1775		- * last try will use add_list, otherwise will try good to have as
1776		- * must have, so can realloc parent bridge resource
	1777	+ * Last try will use add_list, otherwise will try good to have as must
	1778	+ * have, so can realloc parent bridge resource
1777	1779	*/
1778	1780	if (tried_times + 1 == pci_try_num)
1779	1781	add_list = &realloc_head;
1780		- /* Depth first, calculate sizes and alignments of all
1781		- subordinate buses. */
	1782	+ /*
	1783	+ * Depth first, calculate sizes and alignments of all subordinate buses.
	1784	+ */
1782	1785	__pci_bus_size_bridges(bus, add_list);
1783	1786
1784	1787	/* Depth last, allocate resources and update the hardware. */
..	..	@@ -1787,7 +1790,7 @@
1787	1790	BUG_ON(!list_empty(add_list));
1788	1791	tried_times++;
1789	1792
1790		- /* any device complain? */
	1793	+ /* Any device complain? */
1791	1794	if (list_empty(&fail_head))
1792	1795	goto dump;
1793	1796
..	..	@@ -1801,23 +1804,23 @@
1801	1804	goto dump;
1802	1805	}
1803	1806
1804		- dev_printk(KERN_DEBUG, &bus->dev,
1805		- "No. %d try to assign unassigned res\n", tried_times + 1);
	1807	+ dev_info(&bus->dev, "No. %d try to assign unassigned res\n",
	1808	+ tried_times + 1);
1806	1809
1807		- /* third times and later will not check if it is leaf */
	1810	+ /* Third times and later will not check if it is leaf */
1808	1811	if ((tried_times + 1) > 2)
1809	1812	rel_type = whole_subtree;
1810	1813
1811	1814	/*
1812	1815	* Try to release leaf bridge's resources that doesn't fit resource of
1813		- * child device under that bridge
	1816	+ * child device under that bridge.
1814	1817	*/
1815	1818	list_for_each_entry(fail_res, &fail_head, list)
1816	1819	pci_bus_release_bridge_resources(fail_res->dev->bus,
1817	1820	fail_res->flags & PCI_RES_TYPE_MASK,
1818	1821	rel_type);
1819	1822
1820		- /* restore size and flags */
	1823	+ /* Restore size and flags */
1821	1824	list_for_each_entry(fail_res, &fail_head, list) {
1822	1825	struct resource *res = fail_res->res;
1823	1826	int idx;
..	..	@@ -1838,7 +1841,7 @@
1838	1841	goto again;
1839	1842
1840	1843	dump:
1841		- /* dump the resource on buses */
	1844	+ /* Dump the resource on buses */
1842	1845	pci_bus_dump_resources(bus);
1843	1846	}
1844	1847
..	..	@@ -1849,73 +1852,137 @@
1849	1852	list_for_each_entry(root_bus, &pci_root_buses, node) {
1850	1853	pci_assign_unassigned_root_bus_resources(root_bus);
1851	1854
1852		- /* Make sure the root bridge has a companion ACPI device: */
	1855	+ /* Make sure the root bridge has a companion ACPI device */
1853	1856	if (ACPI_HANDLE(root_bus->bridge))
1854	1857	acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));
1855	1858	}
1856	1859	}
1857	1860
1858		-static void extend_bridge_window(struct pci_dev bridge, struct resource res,
1859		- struct list_head *add_list, resource_size_t available)
	1861	+static void adjust_bridge_window(struct pci_dev bridge, struct resource res,
	1862	+ struct list_head *add_list,
	1863	+ resource_size_t new_size)
1860	1864	{
1861		- struct pci_dev_resource *dev_res;
	1865	+ resource_size_t add_size, size = resource_size(res);
1862	1866
1863	1867	if (res->parent)
1864	1868	return;
1865	1869
1866		- if (resource_size(res) >= available)
	1870	+ if (!new_size)
1867	1871	return;
1868	1872
1869		- dev_res = res_to_dev_res(add_list, res);
1870		- if (!dev_res)
	1873	+ if (new_size > size) {
	1874	+ add_size = new_size - size;
	1875	+ pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
	1876	+ &add_size);
	1877	+ } else if (new_size < size) {
	1878	+ add_size = size - new_size;
	1879	+ pci_dbg(bridge, "bridge window %pR shrunken by %pa\n", res,
	1880	+ &add_size);
	1881	+ } else {
1871	1882	return;
	1883	+ }
1872	1884
1873		- /* Is there room to extend the window? */
1874		- if (available - resource_size(res) <= dev_res->add_size)
1875		- return;
1876		-
1877		- dev_res->add_size = available - resource_size(res);
1878		- pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
1879		- &dev_res->add_size);
	1885	+ res->end = res->start + new_size - 1;
	1886	+ remove_from_list(add_list, res);
1880	1887	}
1881	1888
1882		-static void pci_bus_distribute_available_resources(struct pci_bus *bus,
1883		- struct list_head *add_list, resource_size_t available_io,
1884		- resource_size_t available_mmio, resource_size_t available_mmio_pref)
	1889	+static void remove_dev_resource(struct resource avail, struct pci_dev dev,
	1890	+ struct resource *res)
1885	1891	{
1886		- resource_size_t remaining_io, remaining_mmio, remaining_mmio_pref;
	1892	+ resource_size_t size, align, tmp;
	1893	+
	1894	+ size = resource_size(res);
	1895	+ if (!size)
	1896	+ return;
	1897	+
	1898	+ align = pci_resource_alignment(dev, res);
	1899	+ align = align ? ALIGN(avail->start, align) - avail->start : 0;
	1900	+ tmp = align + size;
	1901	+ avail->start = min(avail->start + tmp, avail->end + 1);
	1902	+}
	1903	+
	1904	+static void remove_dev_resources(struct pci_dev dev, struct resource io,
	1905	+ struct resource *mmio,
	1906	+ struct resource *mmio_pref)
	1907	+{
	1908	+ int i;
	1909	+
	1910	+ for (i = 0; i < PCI_NUM_RESOURCES; i++) {
	1911	+ struct resource *res = &dev->resource[i];
	1912	+
	1913	+ if (resource_type(res) == IORESOURCE_IO) {
	1914	+ remove_dev_resource(io, dev, res);
	1915	+ } else if (resource_type(res) == IORESOURCE_MEM) {
	1916	+
	1917	+ /*
	1918	+ * Make sure prefetchable memory is reduced from
	1919	+ * the correct resource. Specifically we put 32-bit
	1920	+ * prefetchable memory in non-prefetchable window
	1921	+ * if there is an 64-bit pretchable window.
	1922	+ *
	1923	+ * See comments in __pci_bus_size_bridges() for
	1924	+ * more information.
	1925	+ */
	1926	+ if ((res->flags & IORESOURCE_PREFETCH) &&
	1927	+ ((res->flags & IORESOURCE_MEM_64) ==
	1928	+ (mmio_pref->flags & IORESOURCE_MEM_64)))
	1929	+ remove_dev_resource(mmio_pref, dev, res);
	1930	+ else
	1931	+ remove_dev_resource(mmio, dev, res);
	1932	+ }
	1933	+ }
	1934	+}
	1935	+
	1936	+/*
	1937	+ * io, mmio and mmio_pref contain the total amount of bridge window space
	1938	+ * available. This includes the minimal space needed to cover all the
	1939	+ * existing devices on the bus and the possible extra space that can be
	1940	+ * shared with the bridges.
	1941	+ */
	1942	+static void pci_bus_distribute_available_resources(struct pci_bus *bus,
	1943	+ struct list_head *add_list,
	1944	+ struct resource io,
	1945	+ struct resource mmio,
	1946	+ struct resource mmio_pref)
	1947	+{
1887	1948	unsigned int normal_bridges = 0, hotplug_bridges = 0;
1888	1949	struct resource io_res, mmio_res, *mmio_pref_res;
1889	1950	struct pci_dev dev, bridge = bus->self;
	1951	+ resource_size_t io_per_b, mmio_per_b, mmio_pref_per_b, align;
1890	1952
1891		- io_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
1892		- mmio_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
1893		- mmio_pref_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
	1953	+ io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];
	1954	+ mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];
	1955	+ mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
1894	1956
1895	1957	/*
1896		- * Update additional resource list (add_list) to fill all the
1897		- * extra resource space available for this port except the space
1898		- * calculated in __pci_bus_size_bridges() which covers all the
1899		- * devices currently connected to the port and below.
	1958	+ * The alignment of this bridge is yet to be considered, hence it must
	1959	+ * be done now before extending its bridge window.
1900	1960	*/
1901		- extend_bridge_window(bridge, io_res, add_list, available_io);
1902		- extend_bridge_window(bridge, mmio_res, add_list, available_mmio);
1903		- extend_bridge_window(bridge, mmio_pref_res, add_list,
1904		- available_mmio_pref);
	1961	+ align = pci_resource_alignment(bridge, io_res);
	1962	+ if (!io_res->parent && align)
	1963	+ io.start = min(ALIGN(io.start, align), io.end + 1);
	1964	+
	1965	+ align = pci_resource_alignment(bridge, mmio_res);
	1966	+ if (!mmio_res->parent && align)
	1967	+ mmio.start = min(ALIGN(mmio.start, align), mmio.end + 1);
	1968	+
	1969	+ align = pci_resource_alignment(bridge, mmio_pref_res);
	1970	+ if (!mmio_pref_res->parent && align)
	1971	+ mmio_pref.start = min(ALIGN(mmio_pref.start, align),
	1972	+ mmio_pref.end + 1);
1905	1973
1906	1974	/*
1907		- * Calculate the total amount of extra resource space we can
1908		- * pass to bridges below this one. This is basically the
1909		- * extra space reduced by the minimal required space for the
1910		- * non-hotplug bridges.
	1975	+ * Now that we have adjusted for alignment, update the bridge window
	1976	+ * resources to fill as much remaining resource space as possible.
1911	1977	*/
1912		- remaining_io = available_io;
1913		- remaining_mmio = available_mmio;
1914		- remaining_mmio_pref = available_mmio_pref;
	1978	+ adjust_bridge_window(bridge, io_res, add_list, resource_size(&io));
	1979	+ adjust_bridge_window(bridge, mmio_res, add_list, resource_size(&mmio));
	1980	+ adjust_bridge_window(bridge, mmio_pref_res, add_list,
	1981	+ resource_size(&mmio_pref));
1915	1982
1916	1983	/*
1917	1984	* Calculate how many hotplug bridges and normal bridges there
1918		- * are on this bus. We will distribute the additional available
	1985	+ * are on this bus. We will distribute the additional available
1919	1986	* resources between hotplug bridges.
1920	1987	*/
1921	1988	for_each_pci_bridge(dev, bus) {
..	..	@@ -1925,110 +1992,116 @@
1925	1992	normal_bridges++;
1926	1993	}
1927	1994
1928		- for_each_pci_bridge(dev, bus) {
1929		- const struct resource *res;
1930		-
1931		- if (dev->is_hotplug_bridge)
1932		- continue;
1933		-
1934		- /*
1935		- * Reduce the available resource space by what the
1936		- * bridge and devices below it occupy.
1937		- */
1938		- res = &dev->resource[PCI_BRIDGE_RESOURCES + 0];
1939		- if (!res->parent && available_io > resource_size(res))
1940		- remaining_io -= resource_size(res);
1941		-
1942		- res = &dev->resource[PCI_BRIDGE_RESOURCES + 1];
1943		- if (!res->parent && available_mmio > resource_size(res))
1944		- remaining_mmio -= resource_size(res);
1945		-
1946		- res = &dev->resource[PCI_BRIDGE_RESOURCES + 2];
1947		- if (!res->parent && available_mmio_pref > resource_size(res))
1948		- remaining_mmio_pref -= resource_size(res);
1949		- }
1950		-
1951		- /*
1952		- * There is only one bridge on the bus so it gets all available
1953		- * resources which it can then distribute to the possible
1954		- * hotplug bridges below.
1955		- */
1956		- if (hotplug_bridges + normal_bridges == 1) {
1957		- dev = list_first_entry(&bus->devices, struct pci_dev, bus_list);
1958		- if (dev->subordinate) {
1959		- pci_bus_distribute_available_resources(dev->subordinate,
1960		- add_list, available_io, available_mmio,
1961		- available_mmio_pref);
1962		- }
	1995	+ if (!(hotplug_bridges + normal_bridges))
1963	1996	return;
	1997	+
	1998	+ /*
	1999	+ * Calculate the amount of space we can forward from "bus" to any
	2000	+ * downstream buses, i.e., the space left over after assigning the
	2001	+ * BARs and windows on "bus".
	2002	+ */
	2003	+ list_for_each_entry(dev, &bus->devices, bus_list) {
	2004	+ if (!dev->is_virtfn)
	2005	+ remove_dev_resources(dev, &io, &mmio, &mmio_pref);
1964	2006	}
1965	2007
1966	2008	/*
1967		- * Go over devices on this bus and distribute the remaining
1968		- * resource space between hotplug bridges.
	2009	+ * If there is at least one hotplug bridge on this bus it gets all
	2010	+ * the extra resource space that was left after the reductions
	2011	+ * above.
	2012	+ *
	2013	+ * If there are no hotplug bridges the extra resource space is
	2014	+ * split between non-hotplug bridges. This is to allow possible
	2015	+ * hotplug bridges below them to get the extra space as well.
1969	2016	*/
	2017	+ if (hotplug_bridges) {
	2018	+ io_per_b = div64_ul(resource_size(&io), hotplug_bridges);
	2019	+ mmio_per_b = div64_ul(resource_size(&mmio), hotplug_bridges);
	2020	+ mmio_pref_per_b = div64_ul(resource_size(&mmio_pref),
	2021	+ hotplug_bridges);
	2022	+ } else {
	2023	+ io_per_b = div64_ul(resource_size(&io), normal_bridges);
	2024	+ mmio_per_b = div64_ul(resource_size(&mmio), normal_bridges);
	2025	+ mmio_pref_per_b = div64_ul(resource_size(&mmio_pref),
	2026	+ normal_bridges);
	2027	+ }
	2028	+
1970	2029	for_each_pci_bridge(dev, bus) {
1971		- resource_size_t align, io, mmio, mmio_pref;
	2030	+ struct resource *res;
1972	2031	struct pci_bus *b;
1973	2032
1974	2033	b = dev->subordinate;
1975		- if (!b \|\| !dev->is_hotplug_bridge)
	2034	+ if (!b)
	2035	+ continue;
	2036	+ if (hotplug_bridges && !dev->is_hotplug_bridge)
1976	2037	continue;
1977	2038
	2039	+ res = &dev->resource[PCI_BRIDGE_IO_WINDOW];
	2040	+
1978	2041	/*
1979		- * Distribute available extra resources equally between
1980		- * hotplug-capable downstream ports taking alignment into
1981		- * account.
1982		- *
1983		- * Here hotplug_bridges is always != 0.
	2042	+ * Make sure the split resource space is properly aligned
	2043	+ * for bridge windows (align it down to avoid going above
	2044	+ * what is available).
1984	2045	*/
1985		- align = pci_resource_alignment(bridge, io_res);
1986		- io = div64_ul(available_io, hotplug_bridges);
1987		- io = min(ALIGN(io, align), remaining_io);
1988		- remaining_io -= io;
	2046	+ align = pci_resource_alignment(dev, res);
	2047	+ io.end = align ? io.start + ALIGN_DOWN(io_per_b, align) - 1
	2048	+ : io.start + io_per_b - 1;
1989	2049
1990		- align = pci_resource_alignment(bridge, mmio_res);
1991		- mmio = div64_ul(available_mmio, hotplug_bridges);
1992		- mmio = min(ALIGN(mmio, align), remaining_mmio);
1993		- remaining_mmio -= mmio;
	2050	+ /*
	2051	+ * The x_per_b holds the extra resource space that can be
	2052	+ * added for each bridge but there is the minimal already
	2053	+ * reserved as well so adjust x.start down accordingly to
	2054	+ * cover the whole space.
	2055	+ */
	2056	+ io.start -= resource_size(res);
1994	2057
1995		- align = pci_resource_alignment(bridge, mmio_pref_res);
1996		- mmio_pref = div64_ul(available_mmio_pref, hotplug_bridges);
1997		- mmio_pref = min(ALIGN(mmio_pref, align), remaining_mmio_pref);
1998		- remaining_mmio_pref -= mmio_pref;
	2058	+ res = &dev->resource[PCI_BRIDGE_MEM_WINDOW];
	2059	+ align = pci_resource_alignment(dev, res);
	2060	+ mmio.end = align ? mmio.start + ALIGN_DOWN(mmio_per_b, align) - 1
	2061	+ : mmio.start + mmio_per_b - 1;
	2062	+ mmio.start -= resource_size(res);
	2063	+
	2064	+ res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
	2065	+ align = pci_resource_alignment(dev, res);
	2066	+ mmio_pref.end = align ? mmio_pref.start +
	2067	+ ALIGN_DOWN(mmio_pref_per_b, align) - 1
	2068	+ : mmio_pref.start + mmio_pref_per_b - 1;
	2069	+ mmio_pref.start -= resource_size(res);
1999	2070
2000	2071	pci_bus_distribute_available_resources(b, add_list, io, mmio,
2001	2072	mmio_pref);
	2073	+
	2074	+ io.start += io.end + 1;
	2075	+ mmio.start += mmio.end + 1;
	2076	+ mmio_pref.start += mmio_pref.end + 1;
2002	2077	}
2003	2078	}
2004	2079
2005		-static void
2006		-pci_bridge_distribute_available_resources(struct pci_dev *bridge,
2007		- struct list_head *add_list)
	2080	+static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
	2081	+ struct list_head *add_list)
2008	2082	{
2009		- resource_size_t available_io, available_mmio, available_mmio_pref;
2010		- const struct resource *res;
	2083	+ struct resource available_io, available_mmio, available_mmio_pref;
2011	2084
2012	2085	if (!bridge->is_hotplug_bridge)
2013	2086	return;
2014	2087
2015	2088	/* Take the initial extra resources from the hotplug port */
2016		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
2017		- available_io = resource_size(res);
2018		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
2019		- available_mmio = resource_size(res);
2020		- res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
2021		- available_mmio_pref = resource_size(res);
	2089	+ available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW];
	2090	+ available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW];
	2091	+ available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
2022	2092
2023	2093	pci_bus_distribute_available_resources(bridge->subordinate,
2024		- add_list, available_io, available_mmio, available_mmio_pref);
	2094	+ add_list, available_io,
	2095	+ available_mmio,
	2096	+ available_mmio_pref);
2025	2097	}
2026	2098
2027	2099	void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
2028	2100	{
2029	2101	struct pci_bus *parent = bridge->subordinate;
2030		- LIST_HEAD(add_list); /* list of resources that
2031		- want additional resources */
	2102	+ /* List of resources that want additional resources */
	2103	+ LIST_HEAD(add_list);
	2104	+
2032	2105	int tried_times = 0;
2033	2106	LIST_HEAD(fail_head);
2034	2107	struct pci_dev_resource *fail_res;
..	..	@@ -2038,9 +2111,9 @@
2038	2111	__pci_bus_size_bridges(parent, &add_list);
2039	2112
2040	2113	/*
2041		- * Distribute remaining resources (if any) equally between
2042		- * hotplug bridges below. This makes it possible to extend the
2043		- * hierarchy later without running out of resources.
	2114	+ * Distribute remaining resources (if any) equally between hotplug
	2115	+ * bridges below. This makes it possible to extend the hierarchy
	2116	+ * later without running out of resources.
2044	2117	*/
2045	2118	pci_bridge_distribute_available_resources(bridge, &add_list);
2046	2119
..	..	@@ -2052,7 +2125,7 @@
2052	2125	goto enable_all;
2053	2126
2054	2127	if (tried_times >= 2) {
2055		- /* still fail, don't need to try more */
	2128	+ /* Still fail, don't need to try more */
2056	2129	free_list(&fail_head);
2057	2130	goto enable_all;
2058	2131	}
..	..	@@ -2061,15 +2134,15 @@
2061	2134	tried_times + 1);
2062	2135
2063	2136	/*
2064		- * Try to release leaf bridge's resources that doesn't fit resource of
2065		- * child device under that bridge
	2137	+ * Try to release leaf bridge's resources that aren't big enough
	2138	+ * to contain child device resources.
2066	2139	*/
2067	2140	list_for_each_entry(fail_res, &fail_head, list)
2068	2141	pci_bus_release_bridge_resources(fail_res->dev->bus,
2069	2142	fail_res->flags & PCI_RES_TYPE_MASK,
2070	2143	whole_subtree);
2071	2144
2072		- /* restore size and flags */
	2145	+ /* Restore size and flags */
2073	2146	list_for_each_entry(fail_res, &fail_head, list) {
2074	2147	struct resource *res = fail_res->res;
2075	2148	int idx;
..	..	@@ -2107,6 +2180,8 @@
2107	2180	unsigned int i;
2108	2181	int ret;
2109	2182
	2183	+ down_read(&pci_bus_sem);
	2184	+
2110	2185	/* Walk to the root hub, releasing bridge BARs when possible */
2111	2186	next = bridge;
2112	2187	do {
..	..	@@ -2141,8 +2216,10 @@
2141	2216	next = bridge->bus ? bridge->bus->self : NULL;
2142	2217	} while (next);
2143	2218
2144		- if (list_empty(&saved))
	2219	+ if (list_empty(&saved)) {
	2220	+ up_read(&pci_bus_sem);
2145	2221	return -ENOENT;
	2222	+ }
2146	2223
2147	2224	__pci_bus_size_bridges(bridge->subordinate, &added);
2148	2225	__pci_bridge_assign_resources(bridge, &added, &failed);
..	..	@@ -2154,7 +2231,7 @@
2154	2231	}
2155	2232
2156	2233	list_for_each_entry(dev_res, &saved, list) {
2157		- /* Skip the bridge we just assigned resources for. */
	2234	+ /* Skip the bridge we just assigned resources for */
2158	2235	if (bridge == dev_res->dev)
2159	2236	continue;
2160	2237
..	..	@@ -2163,10 +2240,11 @@
2163	2240	}
2164	2241
2165	2242	free_list(&saved);
	2243	+ up_read(&pci_bus_sem);
2166	2244	return 0;
2167	2245
2168	2246	cleanup:
2169		- /* restore size and flags */
	2247	+ /* Restore size and flags */
2170	2248	list_for_each_entry(dev_res, &failed, list) {
2171	2249	struct resource *res = dev_res->res;
2172	2250
..	..	@@ -2191,6 +2269,7 @@
2191	2269	pci_setup_bridge(bridge->subordinate);
2192	2270	}
2193	2271	free_list(&saved);
	2272	+ up_read(&pci_bus_sem);
2194	2273
2195	2274	return ret;
2196	2275	}
..	..	@@ -2198,8 +2277,8 @@
2198	2277	void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
2199	2278	{
2200	2279	struct pci_dev *dev;
2201		- LIST_HEAD(add_list); /* list of resources that
2202		- want additional resources */
	2280	+ /* List of resources that want additional resources */
	2281	+ LIST_HEAD(add_list);
2203	2282
2204	2283	down_read(&pci_bus_sem);
2205	2284	for_each_pci_bridge(dev, bus)