forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
....@@ -1,19 +1,9 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*******************************************************************************
23 DWMAC DMA Header file.
34
45 Copyright (C) 2007-2009 STMicroelectronics Ltd
56
6
- This program is free software; you can redistribute it and/or modify it
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- under the terms and conditions of the GNU General Public License,
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- version 2, as published by the Free Software Foundation.
9
-
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- This program is distributed in the hope it will be useful, but WITHOUT
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- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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- more details.
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-
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- The full GNU General Public License is included in this distribution in
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- the file called "COPYING".
177
188 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
199 *******************************************************************************/
....@@ -106,6 +96,8 @@
10696
10797 /* DMA default interrupt mask */
10898 #define DMA_INTR_DEFAULT_MASK (DMA_INTR_NORMAL | DMA_INTR_ABNORMAL)
99
+#define DMA_INTR_DEFAULT_RX (DMA_INTR_ENA_RIE)
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+#define DMA_INTR_DEFAULT_TX (DMA_INTR_ENA_TIE)
109101
110102 /* DMA Status register defines */
111103 #define DMA_STATUS_GLPII 0x40000000 /* GMAC LPI interrupt */
....@@ -138,10 +130,11 @@
138130
139131 #define NUM_DWMAC100_DMA_REGS 9
140132 #define NUM_DWMAC1000_DMA_REGS 23
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+#define NUM_DWMAC4_DMA_REGS 27
141134
142135 void dwmac_enable_dma_transmission(void __iomem *ioaddr);
143
-void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan);
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-void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan);
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+void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
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+void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
145138 void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan);
146139 void dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan);
147140 void dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan);