.. | .. |
---|
191 | 191 | unsigned int tx_full; /* The Tx queue is full. */ |
---|
192 | 192 | u8 host_bridge_rev; |
---|
193 | 193 | u8 chipset_rev; |
---|
| 194 | + /* EEPROM data */ |
---|
| 195 | + int eeprom_size; |
---|
194 | 196 | }; |
---|
195 | 197 | |
---|
196 | 198 | MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); |
---|
.. | .. |
---|
220 | 222 | static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); |
---|
221 | 223 | static void sis900_timer(struct timer_list *t); |
---|
222 | 224 | static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); |
---|
223 | | -static void sis900_tx_timeout(struct net_device *net_dev); |
---|
| 225 | +static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue); |
---|
224 | 226 | static void sis900_init_tx_ring(struct net_device *net_dev); |
---|
225 | 227 | static void sis900_init_rx_ring(struct net_device *net_dev); |
---|
226 | 228 | static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, |
---|
.. | .. |
---|
262 | 264 | /* check to see if we have sane EEPROM */ |
---|
263 | 265 | signature = (u16) read_eeprom(ioaddr, EEPROMSignature); |
---|
264 | 266 | if (signature == 0xffff || signature == 0x0000) { |
---|
265 | | - printk (KERN_WARNING "%s: Error EERPOM read %x\n", |
---|
| 267 | + printk (KERN_WARNING "%s: Error EEPROM read %x\n", |
---|
266 | 268 | pci_name(pci_dev), signature); |
---|
267 | 269 | return 0; |
---|
268 | 270 | } |
---|
.. | .. |
---|
359 | 361 | * |
---|
360 | 362 | * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM |
---|
361 | 363 | * is shared by |
---|
362 | | - * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first |
---|
363 | | - * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access |
---|
364 | | - * by LAN, otherwise is not. After MAC address is read from EEPROM, send |
---|
| 364 | + * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first |
---|
| 365 | + * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed |
---|
| 366 | + * by LAN, otherwise it is not. After MAC address is read from EEPROM, send |
---|
365 | 367 | * EEDONE signal to refuse EEPROM access by LAN. |
---|
366 | 368 | * The EEPROM map of SiS962 or SiS963 is different to SiS900. |
---|
367 | 369 | * The signature field in SiS962 or SiS963 spec is meaningless. |
---|
.. | .. |
---|
444 | 446 | ret = pcim_enable_device(pci_dev); |
---|
445 | 447 | if(ret) return ret; |
---|
446 | 448 | |
---|
447 | | - i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); |
---|
| 449 | + i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); |
---|
448 | 450 | if(i){ |
---|
449 | 451 | printk(KERN_ERR "sis900.c: architecture does not support " |
---|
450 | 452 | "32bit PCI busmaster DMA\n"); |
---|
.. | .. |
---|
475 | 477 | sis_priv->pci_dev = pci_dev; |
---|
476 | 478 | spin_lock_init(&sis_priv->lock); |
---|
477 | 479 | |
---|
| 480 | + sis_priv->eeprom_size = 24; |
---|
| 481 | + |
---|
478 | 482 | pci_set_drvdata(pci_dev, net_dev); |
---|
479 | 483 | |
---|
480 | | - ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); |
---|
| 484 | + ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE, |
---|
| 485 | + &ring_dma, GFP_KERNEL); |
---|
481 | 486 | if (!ring_space) { |
---|
482 | 487 | ret = -ENOMEM; |
---|
483 | 488 | goto err_out_unmap; |
---|
.. | .. |
---|
485 | 490 | sis_priv->tx_ring = ring_space; |
---|
486 | 491 | sis_priv->tx_ring_dma = ring_dma; |
---|
487 | 492 | |
---|
488 | | - ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); |
---|
| 493 | + ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE, |
---|
| 494 | + &ring_dma, GFP_KERNEL); |
---|
489 | 495 | if (!ring_space) { |
---|
490 | 496 | ret = -ENOMEM; |
---|
491 | 497 | goto err_unmap_tx; |
---|
.. | .. |
---|
568 | 574 | return 0; |
---|
569 | 575 | |
---|
570 | 576 | err_unmap_rx: |
---|
571 | | - pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, |
---|
572 | | - sis_priv->rx_ring_dma); |
---|
| 577 | + dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, |
---|
| 578 | + sis_priv->rx_ring_dma); |
---|
573 | 579 | err_unmap_tx: |
---|
574 | | - pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, |
---|
575 | | - sis_priv->tx_ring_dma); |
---|
| 580 | + dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, |
---|
| 581 | + sis_priv->tx_ring_dma); |
---|
576 | 582 | err_out_unmap: |
---|
577 | 583 | pci_iounmap(pci_dev, ioaddr); |
---|
578 | 584 | err_out: |
---|
.. | .. |
---|
728 | 734 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); |
---|
729 | 735 | |
---|
730 | 736 | /* Link ON & Not select default PHY & not ghost PHY */ |
---|
731 | | - if ((status & MII_STAT_LINK) && !default_phy && |
---|
732 | | - (phy->phy_types != UNKNOWN)) |
---|
733 | | - default_phy = phy; |
---|
734 | | - else { |
---|
| 737 | + if ((status & MII_STAT_LINK) && !default_phy && |
---|
| 738 | + (phy->phy_types != UNKNOWN)) { |
---|
| 739 | + default_phy = phy; |
---|
| 740 | + } else { |
---|
735 | 741 | status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); |
---|
736 | 742 | mdio_write(net_dev, phy->phy_addr, MII_CONTROL, |
---|
737 | 743 | status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); |
---|
.. | .. |
---|
739 | 745 | phy_home = phy; |
---|
740 | 746 | else if(phy->phy_types == LAN) |
---|
741 | 747 | phy_lan = phy; |
---|
742 | | - } |
---|
| 748 | + } |
---|
743 | 749 | } |
---|
744 | 750 | |
---|
745 | 751 | if (!default_phy && phy_home) |
---|
.. | .. |
---|
879 | 885 | * mdio_read - read MII PHY register |
---|
880 | 886 | * @net_dev: the net device to read |
---|
881 | 887 | * @phy_id: the phy address to read |
---|
882 | | - * @location: the phy regiester id to read |
---|
| 888 | + * @location: the phy register id to read |
---|
883 | 889 | * |
---|
884 | 890 | * Read MII registers through MDIO and MDC |
---|
885 | 891 | * using MDIO management frame structure and protocol(defined by ISO/IEC). |
---|
.. | .. |
---|
923 | 929 | * mdio_write - write MII PHY register |
---|
924 | 930 | * @net_dev: the net device to write |
---|
925 | 931 | * @phy_id: the phy address to write |
---|
926 | | - * @location: the phy regiester id to write |
---|
| 932 | + * @location: the phy register id to write |
---|
927 | 933 | * @value: the register value to write with |
---|
928 | 934 | * |
---|
929 | 935 | * Write MII registers with @value through MDIO and MDC |
---|
.. | .. |
---|
1054 | 1060 | sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); |
---|
1055 | 1061 | |
---|
1056 | 1062 | /* Enable all known interrupts by setting the interrupt mask. */ |
---|
1057 | | - sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); |
---|
| 1063 | + sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); |
---|
1058 | 1064 | sw32(cr, RxENA | sr32(cr)); |
---|
1059 | 1065 | sw32(ier, IE); |
---|
1060 | 1066 | |
---|
.. | .. |
---|
1098 | 1104 | sw32(rfdr, w); |
---|
1099 | 1105 | |
---|
1100 | 1106 | if (netif_msg_hw(sis_priv)) { |
---|
1101 | | - printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", |
---|
| 1107 | + printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n", |
---|
1102 | 1108 | net_dev->name, i, sr32(rfdr)); |
---|
1103 | 1109 | } |
---|
1104 | 1110 | } |
---|
.. | .. |
---|
1145 | 1151 | * @net_dev: the net device to initialize for |
---|
1146 | 1152 | * |
---|
1147 | 1153 | * Initialize the Rx descriptor ring, |
---|
1148 | | - * and pre-allocate recevie buffers (socket buffer) |
---|
| 1154 | + * and pre-allocate receive buffers (socket buffer) |
---|
1149 | 1155 | */ |
---|
1150 | 1156 | |
---|
1151 | 1157 | static void |
---|
.. | .. |
---|
1181 | 1187 | } |
---|
1182 | 1188 | sis_priv->rx_skbuff[i] = skb; |
---|
1183 | 1189 | sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; |
---|
1184 | | - sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, |
---|
1185 | | - skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
---|
1186 | | - if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, |
---|
1187 | | - sis_priv->rx_ring[i].bufptr))) { |
---|
| 1190 | + sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev, |
---|
| 1191 | + skb->data, |
---|
| 1192 | + RX_BUF_SIZE, |
---|
| 1193 | + DMA_FROM_DEVICE); |
---|
| 1194 | + if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, |
---|
| 1195 | + sis_priv->rx_ring[i].bufptr))) { |
---|
1188 | 1196 | dev_kfree_skb(skb); |
---|
1189 | 1197 | sis_priv->rx_skbuff[i] = NULL; |
---|
1190 | 1198 | break; |
---|
.. | .. |
---|
1291 | 1299 | |
---|
1292 | 1300 | /** |
---|
1293 | 1301 | * sis900_timer - sis900 timer routine |
---|
1294 | | - * @data: pointer to sis900 net device |
---|
| 1302 | + * @t: timer list containing a pointer to sis900 net device |
---|
1295 | 1303 | * |
---|
1296 | 1304 | * On each timer ticks we check two things, |
---|
1297 | 1305 | * link status (ON/OFF) and link mode (10/100/Full/Half) |
---|
.. | .. |
---|
1525 | 1533 | /** |
---|
1526 | 1534 | * sis900_tx_timeout - sis900 transmit timeout routine |
---|
1527 | 1535 | * @net_dev: the net device to transmit |
---|
| 1536 | + * @txqueue: index of hanging queue |
---|
1528 | 1537 | * |
---|
1529 | 1538 | * print transmit timeout status |
---|
1530 | 1539 | * disable interrupts and do some tasks |
---|
1531 | 1540 | */ |
---|
1532 | 1541 | |
---|
1533 | | -static void sis900_tx_timeout(struct net_device *net_dev) |
---|
| 1542 | +static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue) |
---|
1534 | 1543 | { |
---|
1535 | 1544 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
---|
1536 | 1545 | void __iomem *ioaddr = sis_priv->ioaddr; |
---|
.. | .. |
---|
1554 | 1563 | struct sk_buff *skb = sis_priv->tx_skbuff[i]; |
---|
1555 | 1564 | |
---|
1556 | 1565 | if (skb) { |
---|
1557 | | - pci_unmap_single(sis_priv->pci_dev, |
---|
1558 | | - sis_priv->tx_ring[i].bufptr, skb->len, |
---|
1559 | | - PCI_DMA_TODEVICE); |
---|
| 1566 | + dma_unmap_single(&sis_priv->pci_dev->dev, |
---|
| 1567 | + sis_priv->tx_ring[i].bufptr, |
---|
| 1568 | + skb->len, DMA_TO_DEVICE); |
---|
1560 | 1569 | dev_kfree_skb_irq(skb); |
---|
1561 | 1570 | sis_priv->tx_skbuff[i] = NULL; |
---|
1562 | 1571 | sis_priv->tx_ring[i].cmdsts = 0; |
---|
.. | .. |
---|
1575 | 1584 | sw32(txdp, sis_priv->tx_ring_dma); |
---|
1576 | 1585 | |
---|
1577 | 1586 | /* Enable all known interrupts by setting the interrupt mask. */ |
---|
1578 | | - sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); |
---|
| 1587 | + sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); |
---|
1579 | 1588 | } |
---|
1580 | 1589 | |
---|
1581 | 1590 | /** |
---|
.. | .. |
---|
1605 | 1614 | sis_priv->tx_skbuff[entry] = skb; |
---|
1606 | 1615 | |
---|
1607 | 1616 | /* set the transmit buffer descriptor and enable Transmit State Machine */ |
---|
1608 | | - sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, |
---|
1609 | | - skb->data, skb->len, PCI_DMA_TODEVICE); |
---|
1610 | | - if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, |
---|
1611 | | - sis_priv->tx_ring[entry].bufptr))) { |
---|
| 1617 | + sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev, |
---|
| 1618 | + skb->data, skb->len, |
---|
| 1619 | + DMA_TO_DEVICE); |
---|
| 1620 | + if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, |
---|
| 1621 | + sis_priv->tx_ring[entry].bufptr))) { |
---|
1612 | 1622 | dev_kfree_skb_any(skb); |
---|
1613 | 1623 | sis_priv->tx_skbuff[entry] = NULL; |
---|
1614 | 1624 | net_dev->stats.tx_dropped++; |
---|
.. | .. |
---|
1671 | 1681 | do { |
---|
1672 | 1682 | status = sr32(isr); |
---|
1673 | 1683 | |
---|
1674 | | - if ((status & (HIBERR|TxURN|TxERR|TxIDLE|TxDESC|RxORN|RxERR|RxOK)) == 0) |
---|
1675 | | - /* nothing intresting happened */ |
---|
| 1684 | + if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0) |
---|
| 1685 | + /* nothing interesting happened */ |
---|
1676 | 1686 | break; |
---|
1677 | 1687 | handled = 1; |
---|
1678 | 1688 | |
---|
.. | .. |
---|
1681 | 1691 | /* Rx interrupt */ |
---|
1682 | 1692 | sis900_rx(net_dev); |
---|
1683 | 1693 | |
---|
1684 | | - if (status & (TxURN | TxERR | TxIDLE | TxDESC)) |
---|
| 1694 | + if (status & (TxURN | TxERR | TxDESC)) |
---|
1685 | 1695 | /* Tx interrupt */ |
---|
1686 | 1696 | sis900_finish_xmit(net_dev); |
---|
1687 | 1697 | |
---|
.. | .. |
---|
1771 | 1781 | struct sk_buff * skb; |
---|
1772 | 1782 | struct sk_buff * rx_skb; |
---|
1773 | 1783 | |
---|
1774 | | - pci_unmap_single(sis_priv->pci_dev, |
---|
1775 | | - sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, |
---|
1776 | | - PCI_DMA_FROMDEVICE); |
---|
| 1784 | + dma_unmap_single(&sis_priv->pci_dev->dev, |
---|
| 1785 | + sis_priv->rx_ring[entry].bufptr, |
---|
| 1786 | + RX_BUF_SIZE, DMA_FROM_DEVICE); |
---|
1777 | 1787 | |
---|
1778 | 1788 | /* refill the Rx buffer, what if there is not enough |
---|
1779 | 1789 | * memory for new socket buffer ?? */ |
---|
.. | .. |
---|
1819 | 1829 | sis_priv->rx_skbuff[entry] = skb; |
---|
1820 | 1830 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; |
---|
1821 | 1831 | sis_priv->rx_ring[entry].bufptr = |
---|
1822 | | - pci_map_single(sis_priv->pci_dev, skb->data, |
---|
1823 | | - RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
---|
1824 | | - if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, |
---|
1825 | | - sis_priv->rx_ring[entry].bufptr))) { |
---|
| 1832 | + dma_map_single(&sis_priv->pci_dev->dev, |
---|
| 1833 | + skb->data, RX_BUF_SIZE, |
---|
| 1834 | + DMA_FROM_DEVICE); |
---|
| 1835 | + if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, |
---|
| 1836 | + sis_priv->rx_ring[entry].bufptr))) { |
---|
1826 | 1837 | dev_kfree_skb_irq(skb); |
---|
1827 | 1838 | sis_priv->rx_skbuff[entry] = NULL; |
---|
1828 | 1839 | break; |
---|
.. | .. |
---|
1853 | 1864 | sis_priv->rx_skbuff[entry] = skb; |
---|
1854 | 1865 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; |
---|
1855 | 1866 | sis_priv->rx_ring[entry].bufptr = |
---|
1856 | | - pci_map_single(sis_priv->pci_dev, skb->data, |
---|
1857 | | - RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
---|
1858 | | - if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, |
---|
1859 | | - sis_priv->rx_ring[entry].bufptr))) { |
---|
| 1867 | + dma_map_single(&sis_priv->pci_dev->dev, |
---|
| 1868 | + skb->data, RX_BUF_SIZE, |
---|
| 1869 | + DMA_FROM_DEVICE); |
---|
| 1870 | + if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, |
---|
| 1871 | + sis_priv->rx_ring[entry].bufptr))) { |
---|
1860 | 1872 | dev_kfree_skb_irq(skb); |
---|
1861 | 1873 | sis_priv->rx_skbuff[entry] = NULL; |
---|
1862 | 1874 | break; |
---|
.. | .. |
---|
1894 | 1906 | if (tx_status & OWN) { |
---|
1895 | 1907 | /* The packet is not transmitted yet (owned by hardware) ! |
---|
1896 | 1908 | * Note: this is an almost impossible condition |
---|
1897 | | - * in case of TxDESC ('descriptor interrupt') */ |
---|
| 1909 | + * on TxDESC interrupt ('descriptor interrupt') */ |
---|
1898 | 1910 | break; |
---|
1899 | 1911 | } |
---|
1900 | 1912 | |
---|
.. | .. |
---|
1921 | 1933 | } |
---|
1922 | 1934 | /* Free the original skb. */ |
---|
1923 | 1935 | skb = sis_priv->tx_skbuff[entry]; |
---|
1924 | | - pci_unmap_single(sis_priv->pci_dev, |
---|
1925 | | - sis_priv->tx_ring[entry].bufptr, skb->len, |
---|
1926 | | - PCI_DMA_TODEVICE); |
---|
1927 | | - dev_kfree_skb_irq(skb); |
---|
| 1936 | + dma_unmap_single(&sis_priv->pci_dev->dev, |
---|
| 1937 | + sis_priv->tx_ring[entry].bufptr, skb->len, |
---|
| 1938 | + DMA_TO_DEVICE); |
---|
| 1939 | + dev_consume_skb_irq(skb); |
---|
1928 | 1940 | sis_priv->tx_skbuff[entry] = NULL; |
---|
1929 | 1941 | sis_priv->tx_ring[entry].bufptr = 0; |
---|
1930 | 1942 | sis_priv->tx_ring[entry].cmdsts = 0; |
---|
.. | .. |
---|
1972 | 1984 | for (i = 0; i < NUM_RX_DESC; i++) { |
---|
1973 | 1985 | skb = sis_priv->rx_skbuff[i]; |
---|
1974 | 1986 | if (skb) { |
---|
1975 | | - pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr, |
---|
1976 | | - RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
---|
| 1987 | + dma_unmap_single(&pdev->dev, |
---|
| 1988 | + sis_priv->rx_ring[i].bufptr, |
---|
| 1989 | + RX_BUF_SIZE, DMA_FROM_DEVICE); |
---|
1977 | 1990 | dev_kfree_skb(skb); |
---|
1978 | 1991 | sis_priv->rx_skbuff[i] = NULL; |
---|
1979 | 1992 | } |
---|
.. | .. |
---|
1981 | 1994 | for (i = 0; i < NUM_TX_DESC; i++) { |
---|
1982 | 1995 | skb = sis_priv->tx_skbuff[i]; |
---|
1983 | 1996 | if (skb) { |
---|
1984 | | - pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr, |
---|
1985 | | - skb->len, PCI_DMA_TODEVICE); |
---|
| 1997 | + dma_unmap_single(&pdev->dev, |
---|
| 1998 | + sis_priv->tx_ring[i].bufptr, |
---|
| 1999 | + skb->len, DMA_TO_DEVICE); |
---|
1986 | 2000 | dev_kfree_skb(skb); |
---|
1987 | 2001 | sis_priv->tx_skbuff[i] = NULL; |
---|
1988 | 2002 | } |
---|
.. | .. |
---|
2119 | 2133 | wol->supported = (WAKE_PHY | WAKE_MAGIC); |
---|
2120 | 2134 | } |
---|
2121 | 2135 | |
---|
| 2136 | +static int sis900_get_eeprom_len(struct net_device *dev) |
---|
| 2137 | +{ |
---|
| 2138 | + struct sis900_private *sis_priv = netdev_priv(dev); |
---|
| 2139 | + |
---|
| 2140 | + return sis_priv->eeprom_size; |
---|
| 2141 | +} |
---|
| 2142 | + |
---|
| 2143 | +static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf) |
---|
| 2144 | +{ |
---|
| 2145 | + struct sis900_private *sis_priv = netdev_priv(net_dev); |
---|
| 2146 | + void __iomem *ioaddr = sis_priv->ioaddr; |
---|
| 2147 | + int wait, ret = -EAGAIN; |
---|
| 2148 | + u16 signature; |
---|
| 2149 | + u16 *ebuf = (u16 *)buf; |
---|
| 2150 | + int i; |
---|
| 2151 | + |
---|
| 2152 | + if (sis_priv->chipset_rev == SIS96x_900_REV) { |
---|
| 2153 | + sw32(mear, EEREQ); |
---|
| 2154 | + for (wait = 0; wait < 2000; wait++) { |
---|
| 2155 | + if (sr32(mear) & EEGNT) { |
---|
| 2156 | + /* read 16 bits, and index by 16 bits */ |
---|
| 2157 | + for (i = 0; i < sis_priv->eeprom_size / 2; i++) |
---|
| 2158 | + ebuf[i] = (u16)read_eeprom(ioaddr, i); |
---|
| 2159 | + ret = 0; |
---|
| 2160 | + break; |
---|
| 2161 | + } |
---|
| 2162 | + udelay(1); |
---|
| 2163 | + } |
---|
| 2164 | + sw32(mear, EEDONE); |
---|
| 2165 | + } else { |
---|
| 2166 | + signature = (u16)read_eeprom(ioaddr, EEPROMSignature); |
---|
| 2167 | + if (signature != 0xffff && signature != 0x0000) { |
---|
| 2168 | + /* read 16 bits, and index by 16 bits */ |
---|
| 2169 | + for (i = 0; i < sis_priv->eeprom_size / 2; i++) |
---|
| 2170 | + ebuf[i] = (u16)read_eeprom(ioaddr, i); |
---|
| 2171 | + ret = 0; |
---|
| 2172 | + } |
---|
| 2173 | + } |
---|
| 2174 | + return ret; |
---|
| 2175 | +} |
---|
| 2176 | + |
---|
| 2177 | +#define SIS900_EEPROM_MAGIC 0xBABE |
---|
| 2178 | +static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) |
---|
| 2179 | +{ |
---|
| 2180 | + struct sis900_private *sis_priv = netdev_priv(dev); |
---|
| 2181 | + u8 *eebuf; |
---|
| 2182 | + int res; |
---|
| 2183 | + |
---|
| 2184 | + eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL); |
---|
| 2185 | + if (!eebuf) |
---|
| 2186 | + return -ENOMEM; |
---|
| 2187 | + |
---|
| 2188 | + eeprom->magic = SIS900_EEPROM_MAGIC; |
---|
| 2189 | + spin_lock_irq(&sis_priv->lock); |
---|
| 2190 | + res = sis900_read_eeprom(dev, eebuf); |
---|
| 2191 | + spin_unlock_irq(&sis_priv->lock); |
---|
| 2192 | + if (!res) |
---|
| 2193 | + memcpy(data, eebuf + eeprom->offset, eeprom->len); |
---|
| 2194 | + kfree(eebuf); |
---|
| 2195 | + return res; |
---|
| 2196 | +} |
---|
| 2197 | + |
---|
2122 | 2198 | static const struct ethtool_ops sis900_ethtool_ops = { |
---|
2123 | 2199 | .get_drvinfo = sis900_get_drvinfo, |
---|
2124 | 2200 | .get_msglevel = sis900_get_msglevel, |
---|
.. | .. |
---|
2129 | 2205 | .set_wol = sis900_set_wol, |
---|
2130 | 2206 | .get_link_ksettings = sis900_get_link_ksettings, |
---|
2131 | 2207 | .set_link_ksettings = sis900_set_link_ksettings, |
---|
| 2208 | + .get_eeprom_len = sis900_get_eeprom_len, |
---|
| 2209 | + .get_eeprom = sis900_get_eeprom, |
---|
2132 | 2210 | }; |
---|
2133 | 2211 | |
---|
2134 | 2212 | /** |
---|
.. | .. |
---|
2148 | 2226 | switch(cmd) { |
---|
2149 | 2227 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ |
---|
2150 | 2228 | data->phy_id = sis_priv->mii->phy_addr; |
---|
2151 | | - /* Fall Through */ |
---|
| 2229 | + fallthrough; |
---|
2152 | 2230 | |
---|
2153 | 2231 | case SIOCGMIIREG: /* Read MII PHY register. */ |
---|
2154 | 2232 | data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); |
---|
.. | .. |
---|
2413 | 2491 | kfree(phy); |
---|
2414 | 2492 | } |
---|
2415 | 2493 | |
---|
2416 | | - pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, |
---|
2417 | | - sis_priv->rx_ring_dma); |
---|
2418 | | - pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, |
---|
2419 | | - sis_priv->tx_ring_dma); |
---|
| 2494 | + dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, |
---|
| 2495 | + sis_priv->rx_ring_dma); |
---|
| 2496 | + dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, |
---|
| 2497 | + sis_priv->tx_ring_dma); |
---|
2420 | 2498 | pci_iounmap(pci_dev, sis_priv->ioaddr); |
---|
2421 | 2499 | free_netdev(net_dev); |
---|
2422 | 2500 | } |
---|
2423 | 2501 | |
---|
2424 | | -#ifdef CONFIG_PM |
---|
2425 | | - |
---|
2426 | | -static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) |
---|
| 2502 | +static int __maybe_unused sis900_suspend(struct device *dev) |
---|
2427 | 2503 | { |
---|
2428 | | - struct net_device *net_dev = pci_get_drvdata(pci_dev); |
---|
| 2504 | + struct net_device *net_dev = dev_get_drvdata(dev); |
---|
2429 | 2505 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
---|
2430 | 2506 | void __iomem *ioaddr = sis_priv->ioaddr; |
---|
2431 | 2507 | |
---|
.. | .. |
---|
2438 | 2514 | /* Stop the chip's Tx and Rx Status Machine */ |
---|
2439 | 2515 | sw32(cr, RxDIS | TxDIS | sr32(cr)); |
---|
2440 | 2516 | |
---|
2441 | | - pci_set_power_state(pci_dev, PCI_D3hot); |
---|
2442 | | - pci_save_state(pci_dev); |
---|
2443 | | - |
---|
2444 | 2517 | return 0; |
---|
2445 | 2518 | } |
---|
2446 | 2519 | |
---|
2447 | | -static int sis900_resume(struct pci_dev *pci_dev) |
---|
| 2520 | +static int __maybe_unused sis900_resume(struct device *dev) |
---|
2448 | 2521 | { |
---|
2449 | | - struct net_device *net_dev = pci_get_drvdata(pci_dev); |
---|
| 2522 | + struct net_device *net_dev = dev_get_drvdata(dev); |
---|
2450 | 2523 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
---|
2451 | 2524 | void __iomem *ioaddr = sis_priv->ioaddr; |
---|
2452 | 2525 | |
---|
2453 | 2526 | if(!netif_running(net_dev)) |
---|
2454 | 2527 | return 0; |
---|
2455 | | - pci_restore_state(pci_dev); |
---|
2456 | | - pci_set_power_state(pci_dev, PCI_D0); |
---|
2457 | 2528 | |
---|
2458 | 2529 | sis900_init_rxfilter(net_dev); |
---|
2459 | 2530 | |
---|
.. | .. |
---|
2469 | 2540 | sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); |
---|
2470 | 2541 | |
---|
2471 | 2542 | /* Enable all known interrupts by setting the interrupt mask. */ |
---|
2472 | | - sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE | TxDESC); |
---|
| 2543 | + sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); |
---|
2473 | 2544 | sw32(cr, RxENA | sr32(cr)); |
---|
2474 | 2545 | sw32(ier, IE); |
---|
2475 | 2546 | |
---|
.. | .. |
---|
2477 | 2548 | |
---|
2478 | 2549 | return 0; |
---|
2479 | 2550 | } |
---|
2480 | | -#endif /* CONFIG_PM */ |
---|
| 2551 | + |
---|
| 2552 | +static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume); |
---|
2481 | 2553 | |
---|
2482 | 2554 | static struct pci_driver sis900_pci_driver = { |
---|
2483 | 2555 | .name = SIS900_MODULE_NAME, |
---|
2484 | 2556 | .id_table = sis900_pci_tbl, |
---|
2485 | 2557 | .probe = sis900_probe, |
---|
2486 | 2558 | .remove = sis900_remove, |
---|
2487 | | -#ifdef CONFIG_PM |
---|
2488 | | - .suspend = sis900_suspend, |
---|
2489 | | - .resume = sis900_resume, |
---|
2490 | | -#endif /* CONFIG_PM */ |
---|
| 2559 | + .driver.pm = &sis900_pm_ops, |
---|
2491 | 2560 | }; |
---|
2492 | 2561 | |
---|
2493 | 2562 | static int __init sis900_init_module(void) |
---|