forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29
kernel/drivers/net/ethernet/qlogic/qed/qed_roce.c
....@@ -1,34 +1,9 @@
1
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 /* QLogic qed NIC Driver
23 * Copyright (c) 2015-2017 QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
5
- * licenses. You may choose to be licensed under the terms of the GNU
6
- * General Public License (GPL) Version 2, available from the file
7
- * COPYING in the main directory of this source tree, or the
8
- * OpenIB.org BSD license below:
9
- *
10
- * Redistribution and use in source and binary forms, with or
11
- * without modification, are permitted provided that the following
12
- * conditions are met:
13
- *
14
- * - Redistributions of source code must retain the above
15
- * copyright notice, this list of conditions and the following
16
- * disclaimer.
17
- *
18
- * - Redistributions in binary form must reproduce the above
19
- * copyright notice, this list of conditions and the following
20
- * disclaimer in the documentation and /or other materials
21
- * provided with the distribution.
22
- *
23
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30
- * SOFTWARE.
4
+ * Copyright (c) 2019-2020 Marvell International Ltd.
315 */
6
+
327 #include <linux/types.h>
338 #include <asm/byteorder.h>
349 #include <linux/bitops.h>
....@@ -62,35 +37,30 @@
6237
6338 static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid);
6439
65
-static int
66
-qed_roce_async_event(struct qed_hwfn *p_hwfn,
67
- u8 fw_event_code,
68
- u16 echo, union event_ring_data *data, u8 fw_return_code)
40
+static int qed_roce_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
41
+ __le16 echo, union event_ring_data *data,
42
+ u8 fw_return_code)
6943 {
7044 struct qed_rdma_events events = p_hwfn->p_rdma_info->events;
45
+ union rdma_eqe_data *rdata = &data->rdma_data;
7146
7247 if (fw_event_code == ROCE_ASYNC_EVENT_DESTROY_QP_DONE) {
73
- u16 icid =
74
- (u16)le32_to_cpu(data->rdma_data.rdma_destroy_qp_data.cid);
48
+ u16 icid = (u16)le32_to_cpu(rdata->rdma_destroy_qp_data.cid);
7549
7650 /* icid release in this async event can occur only if the icid
7751 * was offloaded to the FW. In case it wasn't offloaded this is
7852 * handled in qed_roce_sp_destroy_qp.
7953 */
8054 qed_roce_free_real_icid(p_hwfn, icid);
55
+ } else if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY ||
56
+ fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) {
57
+ u16 srq_id = (u16)le32_to_cpu(rdata->async_handle.lo);
58
+
59
+ events.affiliated_event(events.context, fw_event_code,
60
+ &srq_id);
8161 } else {
82
- if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY ||
83
- fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) {
84
- u16 srq_id = (u16)data->rdma_data.async_handle.lo;
85
-
86
- events.affiliated_event(events.context, fw_event_code,
87
- &srq_id);
88
- } else {
89
- union rdma_eqe_data rdata = data->rdma_data;
90
-
91
- events.affiliated_event(events.context, fw_event_code,
92
- (void *)&rdata.async_handle);
93
- }
62
+ events.affiliated_event(events.context, fw_event_code,
63
+ (void *)&rdata->async_handle);
9464 }
9565
9666 return 0;
....@@ -107,13 +77,20 @@
10777 * Beyond the added delay we clear the bitmap anyway.
10878 */
10979 while (bitmap_weight(rcid_map->bitmap, rcid_map->max_count)) {
80
+ /* If the HW device is during recovery, all resources are
81
+ * immediately reset without receiving a per-cid indication
82
+ * from HW. In this case we don't expect the cid bitmap to be
83
+ * cleared.
84
+ */
85
+ if (p_hwfn->cdev->recov_in_prog)
86
+ return;
87
+
11088 msleep(100);
11189 if (wait_count++ > 20) {
11290 DP_NOTICE(p_hwfn, "cid bitmap wait timed out\n");
11391 break;
11492 }
11593 }
116
- qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_ROCE);
11794 }
11895
11996 static void qed_rdma_copy_gids(struct qed_rdma_qp *qp, __le32 *src_gid,
....@@ -248,11 +225,14 @@
248225 struct roce_create_qp_resp_ramrod_data *p_ramrod;
249226 u16 regular_latency_queue, low_latency_queue;
250227 struct qed_sp_init_data init_data;
251
- enum roce_flavor roce_flavor;
252228 struct qed_spq_entry *p_ent;
253229 enum protocol_type proto;
230
+ u32 flags = 0;
254231 int rc;
255232 u8 tc;
233
+
234
+ if (!qp->has_resp)
235
+ return 0;
256236
257237 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
258238
....@@ -280,41 +260,34 @@
280260 if (rc)
281261 goto err;
282262
283
- p_ramrod = &p_ent->ramrod.roce_create_qp_resp;
263
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR,
264
+ qed_roce_mode_to_flavor(qp->roce_mode));
284265
285
- p_ramrod->flags = 0;
286
-
287
- roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode);
288
- SET_FIELD(p_ramrod->flags,
289
- ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR, roce_flavor);
290
-
291
- SET_FIELD(p_ramrod->flags,
292
- ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
266
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
293267 qp->incoming_rdma_read_en);
294268
295
- SET_FIELD(p_ramrod->flags,
296
- ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
269
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
297270 qp->incoming_rdma_write_en);
298271
299
- SET_FIELD(p_ramrod->flags,
300
- ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN,
272
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN,
301273 qp->incoming_atomic_en);
302274
303
- SET_FIELD(p_ramrod->flags,
304
- ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
275
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
305276 qp->e2e_flow_control_en);
306277
307
- SET_FIELD(p_ramrod->flags,
308
- ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq);
278
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq);
309279
310
- SET_FIELD(p_ramrod->flags,
311
- ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN,
280
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN,
312281 qp->fmr_and_reserved_lkey);
313282
314
- SET_FIELD(p_ramrod->flags,
315
- ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
283
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
316284 qp->min_rnr_nak_timer);
317285
286
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_XRC_FLAG,
287
+ qed_rdma_is_xrc_qp(qp));
288
+
289
+ p_ramrod = &p_ent->ramrod.roce_create_qp_resp;
290
+ p_ramrod->flags = cpu_to_le32(flags);
318291 p_ramrod->max_ird = qp->max_rd_atomic_resp;
319292 p_ramrod->traffic_class = qp->traffic_class_tos;
320293 p_ramrod->hop_limit = qp->hop_limit_ttl;
....@@ -329,12 +302,13 @@
329302 DMA_REGPAIR_LE(p_ramrod->rq_pbl_addr, qp->rq_pbl_ptr);
330303 DMA_REGPAIR_LE(p_ramrod->irq_pbl_addr, qp->irq_phys_addr);
331304 qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
332
- p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi);
333
- p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo);
334
- p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);
335
- p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
305
+ p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi;
306
+ p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo;
307
+ p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi;
308
+ p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo;
336309 p_ramrod->cq_cid = cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) |
337310 qp->rq_cq_id);
311
+ p_ramrod->xrc_domain = cpu_to_le16(qp->xrcd_id);
338312
339313 tc = qed_roce_get_qp_tc(p_hwfn, qp);
340314 regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc);
....@@ -353,7 +327,7 @@
353327 qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
354328 qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
355329
356
- p_ramrod->udp_src_port = qp->udp_src_port;
330
+ p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port);
357331 p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
358332 p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id);
359333 p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid);
....@@ -389,11 +363,14 @@
389363 struct roce_create_qp_req_ramrod_data *p_ramrod;
390364 u16 regular_latency_queue, low_latency_queue;
391365 struct qed_sp_init_data init_data;
392
- enum roce_flavor roce_flavor;
393366 struct qed_spq_entry *p_ent;
394367 enum protocol_type proto;
368
+ u16 flags = 0;
395369 int rc;
396370 u8 tc;
371
+
372
+ if (!qp->has_req)
373
+ return 0;
397374
398375 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
399376
....@@ -422,27 +399,29 @@
422399 if (rc)
423400 goto err;
424401
425
- p_ramrod = &p_ent->ramrod.roce_create_qp_req;
402
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR,
403
+ qed_roce_mode_to_flavor(qp->roce_mode));
426404
427
- p_ramrod->flags = 0;
428
-
429
- roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode);
430
- SET_FIELD(p_ramrod->flags,
431
- ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR, roce_flavor);
432
-
433
- SET_FIELD(p_ramrod->flags,
434
- ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN,
405
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN,
435406 qp->fmr_and_reserved_lkey);
436407
437
- SET_FIELD(p_ramrod->flags,
438
- ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP, qp->signal_all);
408
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP,
409
+ qp->signal_all);
439410
440
- SET_FIELD(p_ramrod->flags,
441
- ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt);
411
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT,
412
+ qp->retry_cnt);
442413
443
- SET_FIELD(p_ramrod->flags,
444
- ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
414
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
445415 qp->rnr_retry_cnt);
416
+
417
+ SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_XRC_FLAG,
418
+ qed_rdma_is_xrc_qp(qp));
419
+
420
+ p_ramrod = &p_ent->ramrod.roce_create_qp_req;
421
+ p_ramrod->flags = cpu_to_le16(flags);
422
+
423
+ SET_FIELD(p_ramrod->flags2, ROCE_CREATE_QP_REQ_RAMROD_DATA_EDPM_MODE,
424
+ qp->edpm_mode);
446425
447426 p_ramrod->max_ord = qp->max_rd_atomic_req;
448427 p_ramrod->traffic_class = qp->traffic_class_tos;
....@@ -459,10 +438,10 @@
459438 DMA_REGPAIR_LE(p_ramrod->sq_pbl_addr, qp->sq_pbl_ptr);
460439 DMA_REGPAIR_LE(p_ramrod->orq_pbl_addr, qp->orq_phys_addr);
461440 qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
462
- p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi);
463
- p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo);
464
- p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);
465
- p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
441
+ p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi;
442
+ p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo;
443
+ p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi;
444
+ p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo;
466445 p_ramrod->cq_cid =
467446 cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | qp->sq_cq_id);
468447
....@@ -483,7 +462,7 @@
483462 qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
484463 qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
485464
486
- p_ramrod->udp_src_port = qp->udp_src_port;
465
+ p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port);
487466 p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
488467 p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) +
489468 qp->stats_queue;
....@@ -515,7 +494,11 @@
515494 struct roce_modify_qp_resp_ramrod_data *p_ramrod;
516495 struct qed_sp_init_data init_data;
517496 struct qed_spq_entry *p_ent;
497
+ u16 flags = 0;
518498 int rc;
499
+
500
+ if (!qp->has_resp)
501
+ return 0;
519502
520503 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
521504
....@@ -536,52 +519,42 @@
536519 return rc;
537520 }
538521
539
- p_ramrod = &p_ent->ramrod.roce_modify_qp_resp;
522
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG,
523
+ !!move_to_err);
540524
541
- p_ramrod->flags = 0;
542
-
543
- SET_FIELD(p_ramrod->flags,
544
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err);
545
-
546
- SET_FIELD(p_ramrod->flags,
547
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
525
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
548526 qp->incoming_rdma_read_en);
549527
550
- SET_FIELD(p_ramrod->flags,
551
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
528
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
552529 qp->incoming_rdma_write_en);
553530
554
- SET_FIELD(p_ramrod->flags,
555
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN,
531
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN,
556532 qp->incoming_atomic_en);
557533
558
- SET_FIELD(p_ramrod->flags,
559
- ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
534
+ SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
560535 qp->e2e_flow_control_en);
561536
562
- SET_FIELD(p_ramrod->flags,
563
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG,
537
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG,
564538 GET_FIELD(modify_flags,
565539 QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN));
566540
567
- SET_FIELD(p_ramrod->flags,
568
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG,
541
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG,
569542 GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
570543
571
- SET_FIELD(p_ramrod->flags,
572
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG,
544
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG,
573545 GET_FIELD(modify_flags,
574546 QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
575547
576
- SET_FIELD(p_ramrod->flags,
577
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG,
548
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG,
578549 GET_FIELD(modify_flags,
579550 QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP));
580551
581
- SET_FIELD(p_ramrod->flags,
582
- ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG,
552
+ SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG,
583553 GET_FIELD(modify_flags,
584554 QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER));
555
+
556
+ p_ramrod = &p_ent->ramrod.roce_modify_qp_resp;
557
+ p_ramrod->flags = cpu_to_le16(flags);
585558
586559 p_ramrod->fields = 0;
587560 SET_FIELD(p_ramrod->fields,
....@@ -609,7 +582,11 @@
609582 struct roce_modify_qp_req_ramrod_data *p_ramrod;
610583 struct qed_sp_init_data init_data;
611584 struct qed_spq_entry *p_ent;
585
+ u16 flags = 0;
612586 int rc;
587
+
588
+ if (!qp->has_req)
589
+ return 0;
613590
614591 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
615592
....@@ -630,54 +607,44 @@
630607 return rc;
631608 }
632609
633
- p_ramrod = &p_ent->ramrod.roce_modify_qp_req;
610
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG,
611
+ !!move_to_err);
634612
635
- p_ramrod->flags = 0;
613
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG,
614
+ !!move_to_sqd);
636615
637
- SET_FIELD(p_ramrod->flags,
638
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err);
639
-
640
- SET_FIELD(p_ramrod->flags,
641
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG, move_to_sqd);
642
-
643
- SET_FIELD(p_ramrod->flags,
644
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY,
616
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY,
645617 qp->sqd_async);
646618
647
- SET_FIELD(p_ramrod->flags,
648
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG,
619
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG,
649620 GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
650621
651
- SET_FIELD(p_ramrod->flags,
652
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG,
622
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG,
653623 GET_FIELD(modify_flags,
654624 QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
655625
656
- SET_FIELD(p_ramrod->flags,
657
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG,
626
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG,
658627 GET_FIELD(modify_flags,
659628 QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ));
660629
661
- SET_FIELD(p_ramrod->flags,
662
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG,
630
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG,
663631 GET_FIELD(modify_flags,
664632 QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT));
665633
666
- SET_FIELD(p_ramrod->flags,
667
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG,
634
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG,
668635 GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT));
669636
670
- SET_FIELD(p_ramrod->flags,
671
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG,
637
+ SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG,
672638 GET_FIELD(modify_flags,
673639 QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT));
640
+
641
+ p_ramrod = &p_ent->ramrod.roce_modify_qp_req;
642
+ p_ramrod->flags = cpu_to_le16(flags);
674643
675644 p_ramrod->fields = 0;
676645 SET_FIELD(p_ramrod->fields,
677646 ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt);
678
-
679
- SET_FIELD(p_ramrod->fields,
680
- ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
647
+ SET_FIELD(p_ramrod->fields, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
681648 qp->rnr_retry_cnt);
682649
683650 p_ramrod->max_ord = qp->max_rd_atomic_req;
....@@ -704,6 +671,11 @@
704671 struct qed_spq_entry *p_ent;
705672 dma_addr_t ramrod_res_phys;
706673 int rc;
674
+
675
+ if (!qp->has_resp) {
676
+ *cq_prod = 0;
677
+ return 0;
678
+ }
707679
708680 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
709681 *cq_prod = qp->cq_prod;
....@@ -736,9 +708,9 @@
736708
737709 p_ramrod = &p_ent->ramrod.roce_destroy_qp_resp;
738710
739
- p_ramrod_res = (struct roce_destroy_qp_resp_output_params *)
740
- dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_ramrod_res),
741
- &ramrod_res_phys, GFP_KERNEL);
711
+ p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
712
+ sizeof(*p_ramrod_res),
713
+ &ramrod_res_phys, GFP_KERNEL);
742714
743715 if (!p_ramrod_res) {
744716 rc = -ENOMEM;
....@@ -785,13 +757,15 @@
785757 dma_addr_t ramrod_res_phys;
786758 int rc = -ENOMEM;
787759
760
+ if (!qp->has_req)
761
+ return 0;
762
+
788763 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
789764
790765 if (!qp->req_offloaded)
791766 return 0;
792767
793
- p_ramrod_res = (struct roce_destroy_qp_req_output_params *)
794
- dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
768
+ p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
795769 sizeof(*p_ramrod_res),
796770 &ramrod_res_phys, GFP_KERNEL);
797771 if (!p_ramrod_res) {
....@@ -872,10 +846,10 @@
872846 }
873847
874848 /* Send a query responder ramrod to FW to get RQ-PSN and state */
875
- p_resp_ramrod_res = (struct roce_query_qp_resp_output_params *)
876
- dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
877
- sizeof(*p_resp_ramrod_res),
878
- &resp_ramrod_res_phys, GFP_KERNEL);
849
+ p_resp_ramrod_res =
850
+ dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
851
+ sizeof(*p_resp_ramrod_res),
852
+ &resp_ramrod_res_phys, GFP_KERNEL);
879853 if (!p_resp_ramrod_res) {
880854 DP_NOTICE(p_hwfn,
881855 "qed query qp failed: cannot allocate memory (ramrod)\n");
....@@ -900,7 +874,7 @@
900874 goto err_resp;
901875
902876 out_params->rq_psn = le32_to_cpu(p_resp_ramrod_res->psn);
903
- rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->err_flag),
877
+ rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->flags),
904878 ROCE_QUERY_QP_RESP_OUTPUT_PARAMS_ERROR_FLG);
905879
906880 dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res),
....@@ -920,8 +894,7 @@
920894 }
921895
922896 /* Send a query requester ramrod to FW to get SQ-PSN and state */
923
- p_req_ramrod_res = (struct roce_query_qp_req_output_params *)
924
- dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
897
+ p_req_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
925898 sizeof(*p_req_ramrod_res),
926899 &req_ramrod_res_phys,
927900 GFP_KERNEL);