add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/drivers/net/ethernet/qlogic/qed/qed_rdma.h
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@@ -1,34 +1,9 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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 /* QLogic qed NIC Driver
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  * Copyright (c) 2015-2017  QLogic Corporation
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- *
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- * This software is available to you under a choice of one of two
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- * licenses.  You may choose to be licensed under the terms of the GNU
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- * General Public License (GPL) Version 2, available from the file
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- * COPYING in the main directory of this source tree, or the
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- * OpenIB.org BSD license below:
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- *
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- *     Redistribution and use in source and binary forms, with or
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- *     without modification, are permitted provided that the following
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- *     conditions are met:
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- *
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- *      - Redistributions of source code must retain the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer.
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- *
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- *      - Redistributions in binary form must reproduce the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer in the documentation and /or other materials
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- *        provided with the distribution.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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- * SOFTWARE.
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+ * Copyright (c) 2019-2020 Marvell International Ltd.
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  */
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+
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 #ifndef _QED_RDMA_H
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 #define _QED_RDMA_H
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 #include <linux/types.h>
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@@ -45,7 +20,6 @@
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 #include "qed_iwarp.h"
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 #include "qed_roce.h"
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22
 
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-#define QED_RDMA_MAX_FMR                    (RDMA_MAX_TIDS)
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 #define QED_RDMA_MAX_P_KEY                  (1)
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 #define QED_RDMA_MAX_WQE                    (0x7FFF)
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 #define QED_RDMA_MAX_SRQ_WQE_ELEM           (0x7FFF)
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@@ -62,6 +36,11 @@
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36
 
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 #define QED_RDMA_MAX_CQE_32_BIT             (0x7FFFFFFF - 1)
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 #define QED_RDMA_MAX_CQE_16_BIT             (0x7FFF - 1)
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+
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+/* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC
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+ * SRQs is much smaller so there's no need to have that many domains.
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+ */
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+#define QED_RDMA_MAX_XRCDS      (roundup_pow_of_two(RDMA_MAX_XRC_SRQS))
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 enum qed_rdma_toggle_bit {
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 	QED_RDMA_TOGGLE_BIT_CLEAR = 0,
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@@ -81,9 +60,11 @@
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 	struct qed_bmap cq_map;
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 	struct qed_bmap pd_map;
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+	struct qed_bmap xrcd_map;
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 	struct qed_bmap tid_map;
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 	struct qed_bmap qp_map;
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 	struct qed_bmap srq_map;
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+	struct qed_bmap xrc_srq_map;
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 	struct qed_bmap cid_map;
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 	struct qed_bmap tcp_cid_map;
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 	struct qed_bmap real_cid_map;
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@@ -111,6 +92,7 @@
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 	u32 qpid;
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 	u16 icid;
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 	enum qed_roce_qp_state cur_state;
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+	enum qed_rdma_qp_type qp_type;
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 	enum qed_iwarp_qp_state iwarp_state;
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 	bool use_srq;
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 	bool signal_all;
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@@ -153,18 +135,21 @@
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 	dma_addr_t orq_phys_addr;
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 	u8 orq_num_pages;
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 	bool req_offloaded;
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+	bool has_req;
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 	/* responder */
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 	u8 max_rd_atomic_resp;
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 	u32 rq_psn;
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 	u16 rq_cq_id;
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 	u16 rq_num_pages;
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+	u16 xrcd_id;
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 	dma_addr_t rq_pbl_ptr;
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 	void *irq;
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 	dma_addr_t irq_phys_addr;
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 	u8 irq_num_pages;
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 	bool resp_offloaded;
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 	u32 cq_prod;
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+	bool has_resp;
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 	u8 remote_mac_addr[6];
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 	u8 local_mac_addr[6];
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@@ -172,8 +157,17 @@
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 	void *shared_queue;
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 	dma_addr_t shared_queue_phys_addr;
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 	struct qed_iwarp_ep *ep;
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+	u8 edpm_mode;
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 };
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+static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp)
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+{
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+	if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT ||
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+	    qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI)
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+		return true;
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+
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+	return false;
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+}
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 #if IS_ENABLED(CONFIG_QED_RDMA)
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 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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@@ -207,7 +201,7 @@
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 int
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 qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);
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-void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac);
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+void qed_rdma_set_fw_mac(__le16 *p_fw_mac, const u8 *p_qed_mac);
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 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn);
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 #endif