add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h
..
..
@@ -37,8 +37,65 @@
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 #include <linux/skbuff.h>
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 #include <linux/netdevice.h>
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 #include "en_accel/ipsec_rxtx.h"
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+#include "en_accel/tls.h"
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 #include "en_accel/tls_rxtx.h"
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 #include "en.h"
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+#include "en/txrx.h"
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+
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+#if IS_ENABLED(CONFIG_GENEVE)
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+#include <net/geneve.h>
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+
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+static inline bool mlx5_geneve_tx_allowed(struct mlx5_core_dev *mdev)
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+{
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+	return mlx5_tx_swp_supported(mdev);
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+}
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+
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+static inline void
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+mlx5e_tx_tunnel_accel(struct sk_buff *skb, struct mlx5_wqe_eth_seg *eseg, u16 ihs)
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+{
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+	struct mlx5e_swp_spec swp_spec = {};
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+	unsigned int offset = 0;
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+	__be16 l3_proto;
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+	u8 l4_proto;
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+
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+	l3_proto = vlan_get_protocol(skb);
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+	switch (l3_proto) {
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+	case htons(ETH_P_IP):
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+		l4_proto = ip_hdr(skb)->protocol;
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+		break;
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+	case htons(ETH_P_IPV6):
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+		l4_proto = ipv6_find_hdr(skb, &offset, -1, NULL, NULL);
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+		break;
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+	default:
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+		return;
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+	}
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+
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+	if (l4_proto != IPPROTO_UDP ||
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+	    udp_hdr(skb)->dest != cpu_to_be16(GENEVE_UDP_PORT))
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+		return;
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+	swp_spec.l3_proto = l3_proto;
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+	swp_spec.l4_proto = l4_proto;
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+	swp_spec.is_tun = true;
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+	if (inner_ip_hdr(skb)->version == 6) {
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+		swp_spec.tun_l3_proto = htons(ETH_P_IPV6);
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+		swp_spec.tun_l4_proto = inner_ipv6_hdr(skb)->nexthdr;
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+	} else {
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+		swp_spec.tun_l3_proto = htons(ETH_P_IP);
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+		swp_spec.tun_l4_proto = inner_ip_hdr(skb)->protocol;
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+	}
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+
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+	mlx5e_set_eseg_swp(skb, eseg, &swp_spec);
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+	if (skb_vlan_tag_present(skb) &&  ihs)
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+		mlx5e_eseg_swp_offsets_add_vlan(eseg);
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+}
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+
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+#else
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+static inline bool mlx5_geneve_tx_allowed(struct mlx5_core_dev *mdev)
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+{
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+	return false;
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+}
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+
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+#endif /* CONFIG_GENEVE */
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99
 
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 static inline void
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 mlx5e_udp_gso_handle_tx_skb(struct sk_buff *skb)
..
..
@@ -48,33 +105,104 @@
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 	udp_hdr(skb)->len = htons(payload_len);
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 }
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107
 
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-static inline struct sk_buff *
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-mlx5e_accel_handle_tx(struct sk_buff *skb,
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-		      struct mlx5e_txqsq *sq,
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-		      struct net_device *dev,
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-		      struct mlx5e_tx_wqe **wqe,
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-		      u16 *pi)
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+struct mlx5e_accel_tx_state {
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+#ifdef CONFIG_MLX5_EN_TLS
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+	struct mlx5e_accel_tx_tls_state tls;
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+#endif
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+#ifdef CONFIG_MLX5_EN_IPSEC
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+	struct mlx5e_accel_tx_ipsec_state ipsec;
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+#endif
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+};
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+
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+static inline bool mlx5e_accel_tx_begin(struct net_device *dev,
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+					struct mlx5e_txqsq *sq,
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+					struct sk_buff *skb,
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+					struct mlx5e_accel_tx_state *state)
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 {
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+	if (skb_is_gso(skb) && skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4)
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+		mlx5e_udp_gso_handle_tx_skb(skb);
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+
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 #ifdef CONFIG_MLX5_EN_TLS
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 	if (test_bit(MLX5E_SQ_STATE_TLS, &sq->state)) {
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-		skb = mlx5e_tls_handle_tx_skb(dev, sq, skb, wqe, pi);
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-		if (unlikely(!skb))
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-			return NULL;
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+		/* May send SKBs and WQEs. */
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+		if (unlikely(!mlx5e_tls_handle_tx_skb(dev, sq, skb, &state->tls)))
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+			return false;
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 	}
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 #endif
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132
 
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 #ifdef CONFIG_MLX5_EN_IPSEC
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-	if (test_bit(MLX5E_SQ_STATE_IPSEC, &sq->state)) {
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-		skb = mlx5e_ipsec_handle_tx_skb(dev, *wqe, skb);
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-		if (unlikely(!skb))
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-			return NULL;
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+	if (test_bit(MLX5E_SQ_STATE_IPSEC, &sq->state) && xfrm_offload(skb)) {
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+		if (unlikely(!mlx5e_ipsec_handle_tx_skb(dev, skb, &state->ipsec)))
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+			return false;
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 	}
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 #endif
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139
 
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-	if (skb_is_gso(skb) && skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4)
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-		mlx5e_udp_gso_handle_tx_skb(skb);
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-
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-	return skb;
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+	return true;
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 }
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+static inline bool mlx5e_accel_tx_is_ipsec_flow(struct mlx5e_accel_tx_state *state)
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+{
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+#ifdef CONFIG_MLX5_EN_IPSEC
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+	return mlx5e_ipsec_is_tx_flow(&state->ipsec);
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+#endif
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+
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+	return false;
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+}
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+
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+static inline unsigned int mlx5e_accel_tx_ids_len(struct mlx5e_txqsq *sq,
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+						  struct mlx5e_accel_tx_state *state)
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+{
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+#ifdef CONFIG_MLX5_EN_IPSEC
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+	if (test_bit(MLX5E_SQ_STATE_IPSEC, &sq->state))
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+		return mlx5e_ipsec_tx_ids_len(&state->ipsec);
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+#endif
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+
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+	return 0;
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+}
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+
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+/* Part of the eseg touched by TX offloads */
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+#define MLX5E_ACCEL_ESEG_LEN offsetof(struct mlx5_wqe_eth_seg, mss)
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+
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+static inline bool mlx5e_accel_tx_eseg(struct mlx5e_priv *priv,
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+				       struct sk_buff *skb,
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+				       struct mlx5_wqe_eth_seg *eseg, u16 ihs)
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+{
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+#ifdef CONFIG_MLX5_EN_IPSEC
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+	if (xfrm_offload(skb))
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+		mlx5e_ipsec_tx_build_eseg(priv, skb, eseg);
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+#endif
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+
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+#if IS_ENABLED(CONFIG_GENEVE)
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+	if (skb->encapsulation && skb->ip_summed == CHECKSUM_PARTIAL)
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+		mlx5e_tx_tunnel_accel(skb, eseg, ihs);
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+#endif
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+
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+	return true;
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+}
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+
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+static inline void mlx5e_accel_tx_finish(struct mlx5e_txqsq *sq,
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+					 struct mlx5e_tx_wqe *wqe,
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+					 struct mlx5e_accel_tx_state *state,
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+					 struct mlx5_wqe_inline_seg *inlseg)
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+{
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+#ifdef CONFIG_MLX5_EN_TLS
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+	mlx5e_tls_handle_tx_wqe(sq, &wqe->ctrl, &state->tls);
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+#endif
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+
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+#ifdef CONFIG_MLX5_EN_IPSEC
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+	if (test_bit(MLX5E_SQ_STATE_IPSEC, &sq->state) &&
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+	    state->ipsec.xo && state->ipsec.tailen)
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+		mlx5e_ipsec_handle_tx_wqe(wqe, &state->ipsec, inlseg);
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+#endif
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+}
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+
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+static inline int mlx5e_accel_init_rx(struct mlx5e_priv *priv)
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+{
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+	return mlx5e_ktls_init_rx(priv);
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+}
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+
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+static inline void mlx5e_accel_cleanup_rx(struct mlx5e_priv *priv)
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+{
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+	mlx5e_ktls_cleanup_rx(priv);
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+}
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 #endif /* __MLX5E_EN_ACCEL_H__ */