add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
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@@ -1140,6 +1140,11 @@
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 };
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+struct extended_dev_info_shared_cfg {
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+	u32 reserved[18];
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+	u32 mbi_version;
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+	u32 mbi_date;
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+};
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 #if !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN)
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 	#error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition."
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@@ -3019,7 +3024,8 @@
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 #define BCM_5710_FW_MAJOR_VERSION			7
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 #define BCM_5710_FW_MINOR_VERSION			13
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-#define BCM_5710_FW_REVISION_VERSION		1
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+#define BCM_5710_FW_REVISION_VERSION		21
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+#define BCM_5710_FW_REVISION_VERSION_V15	15
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 #define BCM_5710_FW_ENGINEERING_VERSION		0
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 #define BCM_5710_FW_COMPILE_FLAGS			1
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..
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@@ -3634,8 +3640,10 @@
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 #define CLIENT_INIT_RX_DATA_TPA_EN_IPV6_SHIFT 1
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 #define CLIENT_INIT_RX_DATA_TPA_MODE (0x1<<2)
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 #define CLIENT_INIT_RX_DATA_TPA_MODE_SHIFT 2
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-#define CLIENT_INIT_RX_DATA_RESERVED5 (0x1F<<3)
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-#define CLIENT_INIT_RX_DATA_RESERVED5_SHIFT 3
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+#define CLIENT_INIT_RX_DATA_TPA_OVER_VLAN_DISABLE (0x1<<3)
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+#define CLIENT_INIT_RX_DATA_TPA_OVER_VLAN_DISABLE_SHIFT 3
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+#define CLIENT_INIT_RX_DATA_RESERVED5 (0xF<<4)
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+#define CLIENT_INIT_RX_DATA_RESERVED5_SHIFT 4
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 	u8 vmqueue_mode_en_flg;
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 	u8 extra_data_over_sgl_en_flg;
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 	u8 cache_line_alignment_log_size;
..
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@@ -3826,7 +3834,7 @@
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  */
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 struct eth_classify_header {
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 	u8 rule_cnt;
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-	u8 reserved0;
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+	u8 warning_on_error;
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 	__le16 reserved1;
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 	__le32 echo;
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 };
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@@ -4747,6 +4755,8 @@
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 	__le32 sge_page_base_hi;
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 	__le16 sge_pause_thr_low;
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 	__le16 sge_pause_thr_high;
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+	u8 tpa_over_vlan_disable;
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+	u8 reserved[7];
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 };
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@@ -4941,7 +4951,7 @@
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 	u32 upper_bound;
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 	u32 fair_threshold;
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 	u32 fairness_timeout;
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-	u32 reserved0;
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+	u32 size_thr;
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 };
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 /*
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@@ -5410,7 +5420,9 @@
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 	u8 sd_vlan_force_pri_val;
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 	u8 c2s_pri_tt_valid;
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 	u8 c2s_pri_default;
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-	u8 reserved2[6];
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+	u8 tx_vlan_filtering_enable;
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+	u8 tx_vlan_filtering_use_pvid;
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+	u8 reserved2[4];
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 	struct c2s_pri_trans_table_entry c2s_pri_trans_table;
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 };
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@@ -5443,7 +5455,8 @@
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 	u8 reserved1;
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 	__le16 sd_vlan_tag;
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 	__le16 sd_vlan_eth_type;
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-	__le16 reserved0;
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+	u8 tx_vlan_filtering_pvid_change_flg;
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+	u8 reserved0;
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 	__le32 reserved2;
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 };
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