add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/drivers/media/platform/rockchip/isp/capture_v1x.c
..
..
@@ -15,9 +15,315 @@
15
15
 
16
16
 #define CIF_ISP_REQ_BUFS_MIN			0
17
17
 
18
-static int mi_frame_end(struct rkisp_stream *stream);
18
+static int mi_frame_end(struct rkisp_stream *stream, u32 state);
19
19
 static void rkisp_buf_queue(struct vb2_buffer *vb);
20
20
 static int rkisp_create_dummy_buf(struct rkisp_stream *stream);
21
+
22
+static const struct capture_fmt mp_fmts[] = {
23
+	/* yuv422 */
24
+	{
25
+		.fourcc = V4L2_PIX_FMT_YUYV,
26
+		.fmt_type = FMT_YUV,
27
+		.bpp = { 16 },
28
+		.cplanes = 1,
29
+		.mplanes = 1,
30
+		.uv_swap = 0,
31
+		.write_format = MI_CTRL_MP_WRITE_YUVINT,
32
+	}, {
33
+		.fourcc = V4L2_PIX_FMT_YUV422P,
34
+		.fmt_type = FMT_YUV,
35
+		.bpp = { 8, 4, 4 },
36
+		.cplanes = 3,
37
+		.mplanes = 1,
38
+		.uv_swap = 0,
39
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
40
+	}, {
41
+		.fourcc = V4L2_PIX_FMT_NV16,
42
+		.fmt_type = FMT_YUV,
43
+		.bpp = { 8, 16 },
44
+		.cplanes = 2,
45
+		.mplanes = 1,
46
+		.uv_swap = 0,
47
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
48
+	}, {
49
+		.fourcc = V4L2_PIX_FMT_NV61,
50
+		.fmt_type = FMT_YUV,
51
+		.bpp = { 8, 16 },
52
+		.cplanes = 2,
53
+		.mplanes = 1,
54
+		.uv_swap = 1,
55
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
56
+	}, {
57
+		.fourcc = V4L2_PIX_FMT_YUV422M,
58
+		.fmt_type = FMT_YUV,
59
+		.bpp = { 8, 8, 8 },
60
+		.cplanes = 3,
61
+		.mplanes = 3,
62
+		.uv_swap = 0,
63
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
64
+	},
65
+	/* yuv420 */
66
+	{
67
+		.fourcc = V4L2_PIX_FMT_NV21,
68
+		.fmt_type = FMT_YUV,
69
+		.bpp = { 8, 16 },
70
+		.cplanes = 2,
71
+		.mplanes = 1,
72
+		.uv_swap = 1,
73
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
74
+	}, {
75
+		.fourcc = V4L2_PIX_FMT_NV12,
76
+		.fmt_type = FMT_YUV,
77
+		.bpp = { 8, 16 },
78
+		.cplanes = 2,
79
+		.mplanes = 1,
80
+		.uv_swap = 0,
81
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
82
+	}, {
83
+		.fourcc = V4L2_PIX_FMT_NV21M,
84
+		.fmt_type = FMT_YUV,
85
+		.bpp = { 8, 16 },
86
+		.cplanes = 2,
87
+		.mplanes = 2,
88
+		.uv_swap = 1,
89
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
90
+	}, {
91
+		.fourcc = V4L2_PIX_FMT_NV12M,
92
+		.fmt_type = FMT_YUV,
93
+		.bpp = { 8, 16 },
94
+		.cplanes = 2,
95
+		.mplanes = 2,
96
+		.uv_swap = 0,
97
+		.write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
98
+	}, {
99
+		.fourcc = V4L2_PIX_FMT_YUV420,
100
+		.fmt_type = FMT_YUV,
101
+		.bpp = { 8, 8, 8 },
102
+		.cplanes = 3,
103
+		.mplanes = 1,
104
+		.uv_swap = 0,
105
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
106
+	},
107
+	/* yuv444 */
108
+	{
109
+		.fourcc = V4L2_PIX_FMT_YUV444M,
110
+		.fmt_type = FMT_YUV,
111
+		.bpp = { 8, 8, 8 },
112
+		.cplanes = 3,
113
+		.mplanes = 3,
114
+		.uv_swap = 0,
115
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
116
+	},
117
+	/* raw */
118
+	{
119
+		.fourcc = V4L2_PIX_FMT_SRGGB8,
120
+		.fmt_type = FMT_BAYER,
121
+		.bpp = { 8 },
122
+		.mplanes = 1,
123
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
124
+	}, {
125
+		.fourcc = V4L2_PIX_FMT_SGRBG8,
126
+		.fmt_type = FMT_BAYER,
127
+		.bpp = { 8 },
128
+		.mplanes = 1,
129
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
130
+	}, {
131
+		.fourcc = V4L2_PIX_FMT_SGBRG8,
132
+		.fmt_type = FMT_BAYER,
133
+		.bpp = { 8 },
134
+		.mplanes = 1,
135
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
136
+	}, {
137
+		.fourcc = V4L2_PIX_FMT_SBGGR8,
138
+		.fmt_type = FMT_BAYER,
139
+		.bpp = { 8 },
140
+		.mplanes = 1,
141
+		.write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
142
+	}, {
143
+		.fourcc = V4L2_PIX_FMT_SRGGB10,
144
+		.fmt_type = FMT_BAYER,
145
+		.bpp = { 10 },
146
+		.mplanes = 1,
147
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
148
+	}, {
149
+		.fourcc = V4L2_PIX_FMT_SGRBG10,
150
+		.fmt_type = FMT_BAYER,
151
+		.bpp = { 10 },
152
+		.mplanes = 1,
153
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
154
+	}, {
155
+		.fourcc = V4L2_PIX_FMT_SGBRG10,
156
+		.fmt_type = FMT_BAYER,
157
+		.bpp = { 10 },
158
+		.mplanes = 1,
159
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
160
+	}, {
161
+		.fourcc = V4L2_PIX_FMT_SBGGR10,
162
+		.fmt_type = FMT_BAYER,
163
+		.bpp = { 10 },
164
+		.mplanes = 1,
165
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
166
+	}, {
167
+		.fourcc = V4L2_PIX_FMT_SRGGB12,
168
+		.fmt_type = FMT_BAYER,
169
+		.bpp = { 12 },
170
+		.mplanes = 1,
171
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
172
+	}, {
173
+		.fourcc = V4L2_PIX_FMT_SGRBG12,
174
+		.fmt_type = FMT_BAYER,
175
+		.bpp = { 12 },
176
+		.mplanes = 1,
177
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
178
+	}, {
179
+		.fourcc = V4L2_PIX_FMT_SGBRG12,
180
+		.fmt_type = FMT_BAYER,
181
+		.bpp = { 12 },
182
+		.mplanes = 1,
183
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
184
+	}, {
185
+		.fourcc = V4L2_PIX_FMT_SBGGR12,
186
+		.fmt_type = FMT_BAYER,
187
+		.bpp = { 12 },
188
+		.mplanes = 1,
189
+		.write_format = MI_CTRL_MP_WRITE_RAW12,
190
+	},
191
+};
192
+
193
+static const struct capture_fmt sp_fmts[] = {
194
+	/* yuv422 */
195
+	{
196
+		.fourcc = V4L2_PIX_FMT_YUYV,
197
+		.fmt_type = FMT_YUV,
198
+		.bpp = { 16 },
199
+		.cplanes = 1,
200
+		.mplanes = 1,
201
+		.uv_swap = 0,
202
+		.write_format = MI_CTRL_SP_WRITE_INT,
203
+		.output_format = MI_CTRL_SP_OUTPUT_YUV422,
204
+	}, {
205
+		.fourcc = V4L2_PIX_FMT_YUV422P,
206
+		.fmt_type = FMT_YUV,
207
+		.bpp = { 8, 8, 8 },
208
+		.cplanes = 3,
209
+		.mplanes = 1,
210
+		.uv_swap = 0,
211
+		.write_format = MI_CTRL_SP_WRITE_PLA,
212
+		.output_format = MI_CTRL_SP_OUTPUT_YUV422,
213
+	}, {
214
+		.fourcc = V4L2_PIX_FMT_NV16,
215
+		.fmt_type = FMT_YUV,
216
+		.bpp = { 8, 16 },
217
+		.cplanes = 2,
218
+		.mplanes = 1,
219
+		.uv_swap = 0,
220
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
221
+		.output_format = MI_CTRL_SP_OUTPUT_YUV422,
222
+	}, {
223
+		.fourcc = V4L2_PIX_FMT_NV61,
224
+		.fmt_type = FMT_YUV,
225
+		.bpp = { 8, 16 },
226
+		.cplanes = 2,
227
+		.mplanes = 1,
228
+		.uv_swap = 1,
229
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
230
+		.output_format = MI_CTRL_SP_OUTPUT_YUV422,
231
+	}, {
232
+		.fourcc = V4L2_PIX_FMT_YUV422M,
233
+		.fmt_type = FMT_YUV,
234
+		.bpp = { 8, 8, 8 },
235
+		.cplanes = 3,
236
+		.mplanes = 3,
237
+		.uv_swap = 0,
238
+		.write_format = MI_CTRL_SP_WRITE_PLA,
239
+		.output_format = MI_CTRL_SP_OUTPUT_YUV422,
240
+	},
241
+	/* yuv420 */
242
+	{
243
+		.fourcc = V4L2_PIX_FMT_NV21,
244
+		.fmt_type = FMT_YUV,
245
+		.bpp = { 8, 16 },
246
+		.cplanes = 2,
247
+		.mplanes = 1,
248
+		.uv_swap = 1,
249
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
250
+		.output_format = MI_CTRL_SP_OUTPUT_YUV420,
251
+	}, {
252
+		.fourcc = V4L2_PIX_FMT_NV12,
253
+		.fmt_type = FMT_YUV,
254
+		.bpp = { 8, 16 },
255
+		.cplanes = 2,
256
+		.mplanes = 1,
257
+		.uv_swap = 0,
258
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
259
+		.output_format = MI_CTRL_SP_OUTPUT_YUV420,
260
+	}, {
261
+		.fourcc = V4L2_PIX_FMT_NV21M,
262
+		.fmt_type = FMT_YUV,
263
+		.bpp = { 8, 16 },
264
+		.cplanes = 2,
265
+		.mplanes = 2,
266
+		.uv_swap = 1,
267
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
268
+		.output_format = MI_CTRL_SP_OUTPUT_YUV420,
269
+	}, {
270
+		.fourcc = V4L2_PIX_FMT_NV12M,
271
+		.fmt_type = FMT_YUV,
272
+		.bpp = { 8, 16 },
273
+		.cplanes = 2,
274
+		.mplanes = 2,
275
+		.uv_swap = 0,
276
+		.write_format = MI_CTRL_SP_WRITE_SPLA,
277
+		.output_format = MI_CTRL_SP_OUTPUT_YUV420,
278
+	}, {
279
+		.fourcc = V4L2_PIX_FMT_YUV420,
280
+		.fmt_type = FMT_YUV,
281
+		.bpp = { 8, 8, 8 },
282
+		.cplanes = 3,
283
+		.mplanes = 1,
284
+		.uv_swap = 0,
285
+		.write_format = MI_CTRL_SP_WRITE_PLA,
286
+		.output_format = MI_CTRL_SP_OUTPUT_YUV420,
287
+	},
288
+	/* yuv444 */
289
+	{
290
+		.fourcc = V4L2_PIX_FMT_YUV444M,
291
+		.fmt_type = FMT_YUV,
292
+		.bpp = { 8, 8, 8 },
293
+		.cplanes = 3,
294
+		.mplanes = 3,
295
+		.uv_swap = 0,
296
+		.write_format = MI_CTRL_SP_WRITE_PLA,
297
+		.output_format = MI_CTRL_SP_OUTPUT_YUV444,
298
+	},
299
+	/* yuv400 */
300
+	{
301
+		.fourcc = V4L2_PIX_FMT_GREY,
302
+		.fmt_type = FMT_YUV,
303
+		.bpp = { 8 },
304
+		.cplanes = 1,
305
+		.mplanes = 1,
306
+		.uv_swap = 0,
307
+		.write_format = MI_CTRL_SP_WRITE_PLA,
308
+		.output_format = MI_CTRL_SP_OUTPUT_YUV400,
309
+	},
310
+	/* rgb */
311
+	{
312
+		.fourcc = V4L2_PIX_FMT_XBGR32,
313
+		.fmt_type = FMT_RGB,
314
+		.bpp = { 32 },
315
+		.mplanes = 1,
316
+		.write_format = MI_CTRL_SP_WRITE_PLA,
317
+		.output_format = MI_CTRL_SP_OUTPUT_RGB888,
318
+	}, {
319
+		.fourcc = V4L2_PIX_FMT_RGB565,
320
+		.fmt_type = FMT_RGB,
321
+		.bpp = { 16 },
322
+		.mplanes = 1,
323
+		.write_format = MI_CTRL_SP_WRITE_PLA,
324
+		.output_format = MI_CTRL_SP_OUTPUT_RGB565,
325
+	}
326
+};
21
327
 
22
328
 /* configure dual-crop unit */
23
329
 static int rkisp_stream_config_dcrop(struct rkisp_stream *stream, bool async)
..
..
@@ -211,7 +517,7 @@
211
517
 	mp_mi_ctrl_autoupdate_en(base);
212
518
 
213
519
 	/* set up first buffer */
214
-	mi_frame_end(stream);
520
+	mi_frame_end(stream, FRAME_INIT);
215
521
 	return 0;
216
522
 }
217
523
 
..
..
@@ -288,7 +594,7 @@
288
594
 	sp_mi_ctrl_autoupdate_en(base);
289
595
 
290
596
 	/* set up first buffer */
291
-	mi_frame_end(stream);
597
+	mi_frame_end(stream, FRAME_INIT);
292
598
 	return 0;
293
599
 }
294
600
 
..
..
@@ -380,7 +686,7 @@
380
686
 	.enable_mi = mp_enable_mi,
381
687
 	.disable_mi = mp_disable_mi,
382
688
 	.stop_mi = mp_stop_mi,
383
-	.set_data_path = mp_set_data_path,
689
+	.set_data_path = stream_data_path,
384
690
 	.is_stream_stopped = mp_is_stream_stopped,
385
691
 	.update_mi = update_mi,
386
692
 	.frame_end = mi_frame_end,
..
..
@@ -391,7 +697,7 @@
391
697
 	.enable_mi = sp_enable_mi,
392
698
 	.disable_mi = sp_disable_mi,
393
699
 	.stop_mi = sp_stop_mi,
394
-	.set_data_path = sp_set_data_path,
700
+	.set_data_path = stream_data_path,
395
701
 	.is_stream_stopped = sp_is_stream_stopped,
396
702
 	.update_mi = update_mi,
397
703
 	.frame_end = mi_frame_end,
..
..
@@ -402,7 +708,7 @@
402
708
  * is processing and we should set up buffer for next-next frame,
403
709
  * otherwise it will overflow.
404
710
  */
405
-static int mi_frame_end(struct rkisp_stream *stream)
711
+static int mi_frame_end(struct rkisp_stream *stream, u32 state)
406
712
 {
407
713
 	struct rkisp_device *dev = stream->ispdev;
408
714
 	struct capture_fmt *isp_fmt = &stream->out_isp_fmt;
..
..
@@ -424,8 +730,7 @@
424
730
 		}
425
731
 		stream->curr_buf->vb.sequence = atomic_read(&dev->isp_sdev.frm_sync_seq) - 1;
426
732
 		stream->curr_buf->vb.vb2_buf.timestamp = ns;
427
-		vb2_buffer_done(&stream->curr_buf->vb.vb2_buf,
428
-				VB2_BUF_STATE_DONE);
733
+		rkisp_stream_buf_done(stream, stream->curr_buf);
429
734
 		stream->curr_buf = NULL;
430
735
 	}
431
736
 
..
..
@@ -485,7 +790,8 @@
485
790
 	stream->stopping = true;
486
791
 	stream->ops->stop_mi(stream);
487
792
 	if ((dev->isp_state & ISP_START) &&
488
-	    dev->isp_inp != INP_DMARX_ISP) {
793
+	    dev->isp_inp != INP_DMARX_ISP &&
794
+	    !dev->hw_dev->is_shutdown) {
489
795
 		ret = wait_event_timeout(stream->done,
490
796
 					 !stream->streaming,
491
797
 					 msecs_to_jiffies(1000));
..
..
@@ -517,11 +823,10 @@
517
823
  */
518
824
 static int rkisp_start(struct rkisp_stream *stream)
519
825
 {
520
-	void __iomem *base = stream->ispdev->base_addr;
521
826
 	int ret;
522
827
 
523
828
 	if (stream->ops->set_data_path)
524
-		stream->ops->set_data_path(base);
829
+		stream->ops->set_data_path(stream);
525
830
 	ret = stream->ops->config_mi(stream);
526
831
 	if (ret)
527
832
 		return ret;
..
..
@@ -685,6 +990,7 @@
685
990
 		v4l2_err(v4l2_dev, "pipeline close failed error:%d\n", ret);
686
991
 	rkisp_destroy_dummy_buf(stream);
687
992
 	atomic_dec(&dev->cap_dev.refcnt);
993
+	tasklet_disable(&stream->buf_done_tasklet);
688
994
 }
689
995
 
690
996
 static int rkisp_stream_start(struct rkisp_stream *stream)
..
..
@@ -789,7 +1095,7 @@
789
1095
 			 "start pipeline failed %d\n", ret);
790
1096
 		goto pipe_stream_off;
791
1097
 	}
792
-
1098
+	tasklet_enable(&stream->buf_done_tasklet);
793
1099
 	return 0;
794
1100
 
795
1101
 pipe_stream_off:
..
..
@@ -854,19 +1160,23 @@
854
1160
 	init_waitqueue_head(&stream->done);
855
1161
 	spin_lock_init(&stream->vbq_lock);
856
1162
 
857
-	stream->linked = MEDIA_LNK_FL_ENABLED;
1163
+	stream->linked = true;
858
1164
 	switch (id) {
859
1165
 	case RKISP_STREAM_SP:
860
1166
 		strlcpy(vdev->name, SP_VDEV_NAME,
861
1167
 			sizeof(vdev->name));
862
1168
 		stream->ops = &rkisp_sp_streams_ops;
863
1169
 		stream->config = &rkisp_sp_stream_config;
1170
+		stream->config->fmts = sp_fmts;
1171
+		stream->config->fmt_size = ARRAY_SIZE(sp_fmts);
864
1172
 		break;
865
1173
 	default:
866
1174
 		strlcpy(vdev->name, MP_VDEV_NAME,
867
1175
 			sizeof(vdev->name));
868
1176
 		stream->ops = &rkisp_mp_streams_ops;
869
1177
 		stream->config = &rkisp_mp_stream_config;
1178
+		stream->config->fmts = mp_fmts;
1179
+		stream->config->fmt_size = ARRAY_SIZE(mp_fmts);
870
1180
 	}
871
1181
 
872
1182
 	node = vdev_to_node(vdev);
..
..
@@ -946,13 +1256,13 @@
946
1256
 			 * frame end that sync the configurations to shadow
947
1257
 			 * regs.
948
1258
 			 */
949
-			if (stream->ops->is_stream_stopped(dev->base_addr)) {
1259
+			if (stream->ops->is_stream_stopped(stream)) {
950
1260
 				stream->stopping = false;
951
1261
 				stream->streaming = false;
952
1262
 				wake_up(&stream->done);
953
1263
 			}
954
1264
 		} else {
955
-			mi_frame_end(stream);
1265
+			mi_frame_end(stream, FRAME_IRQ);
956
1266
 		}
957
1267
 	}
958
1268
 }