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2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29 
 kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
....@@ -1,13 +1,5 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
2
- *
3
- * This program is free software; you can redistribute it and/or modify
4
- * it under the terms of the GNU General Public License version 2 and
5
- * only version 2 as published by the Free Software Foundation.
6
- *
7
- * This program is distributed in the hope that it will be useful,
8
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
9
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10
- * GNU General Public License for more details.
113  */
124 
135 #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
....@@ -99,27 +91,6 @@
9991 			__entry->vbif_idx)
10092 )
10193 
102
-TRACE_EVENT(dpu_perf_update_bus,
103
-	TP_PROTO(int client, unsigned long long ab_quota,
104
-	unsigned long long ib_quota),
105
-	TP_ARGS(client, ab_quota, ib_quota),
106
-	TP_STRUCT__entry(
107
-			__field(int, client)
108
-			__field(u64, ab_quota)
109
-			__field(u64, ib_quota)
110
-	),
111
-	TP_fast_assign(
112
-			__entry->client = client;
113
-			__entry->ab_quota = ab_quota;
114
-			__entry->ib_quota = ib_quota;
115
-	),
116
-	TP_printk("Request client:%d ab=%llu ib=%llu",
117
-			__entry->client,
118
-			__entry->ab_quota,
119
-			__entry->ib_quota)
120
-)
121
-
122
-
12394 TRACE_EVENT(dpu_cmd_release_bw,
12495 	TP_PROTO(u32 crtc_id),
12596 	TP_ARGS(crtc_id),
....@@ -167,16 +138,12 @@
167138 )
168139 
169140 TRACE_EVENT(dpu_perf_crtc_update,
170
-	TP_PROTO(u32 crtc, u64 bw_ctl_mnoc, u64 bw_ctl_llcc,
171
-			u64 bw_ctl_ebi, u32 core_clk_rate,
172
-			bool stop_req, u32 update_bus, u32 update_clk),
173
-	TP_ARGS(crtc, bw_ctl_mnoc, bw_ctl_llcc, bw_ctl_ebi, core_clk_rate,
174
-		stop_req, update_bus, update_clk),
141
+	TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate,
142
+			bool stop_req, bool update_bus, bool update_clk),
143
+	TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk),
175144 	TP_STRUCT__entry(
176145 			__field(u32, crtc)
177
-			__field(u64, bw_ctl_mnoc)
178
-			__field(u64, bw_ctl_llcc)
179
-			__field(u64, bw_ctl_ebi)
146
+			__field(u64, bw_ctl)
180147 			__field(u32, core_clk_rate)
181148 			__field(bool, stop_req)
182149 			__field(u32, update_bus)
....@@ -184,20 +151,16 @@
184151 	),
185152 	TP_fast_assign(
186153 			__entry->crtc = crtc;
187
-			__entry->bw_ctl_mnoc = bw_ctl_mnoc;
188
-			__entry->bw_ctl_llcc = bw_ctl_llcc;
189
-			__entry->bw_ctl_ebi = bw_ctl_ebi;
154
+			__entry->bw_ctl = bw_ctl;
190155 			__entry->core_clk_rate = core_clk_rate;
191156 			__entry->stop_req = stop_req;
192157 			__entry->update_bus = update_bus;
193158 			__entry->update_clk = update_clk;
194159 	),
195160 	 TP_printk(
196
-		"crtc=%d bw_mnoc=%llu bw_llcc=%llu bw_ebi=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
161
+		"crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
197162 			__entry->crtc,
198
-			__entry->bw_ctl_mnoc,
199
-			__entry->bw_ctl_llcc,
200
-			__entry->bw_ctl_ebi,
163
+			__entry->bw_ctl,
201164 			__entry->core_clk_rate,
202165 			__entry->stop_req,
203166 			__entry->update_bus,
....@@ -319,6 +282,10 @@
319282 	TP_PROTO(uint32_t drm_id),
320283 	TP_ARGS(drm_id)
321284 );
285
+DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume,
286
+	TP_PROTO(uint32_t drm_id),
287
+	TP_ARGS(drm_id)
288
+);
322289 
323290 TRACE_EVENT(dpu_enc_enable,
324291 	TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
....@@ -360,20 +327,18 @@
360327 );
361328 
362329 TRACE_EVENT(dpu_enc_atomic_check_flags,
363
-	TP_PROTO(uint32_t drm_id, unsigned int flags, int private_flags),
364
-	TP_ARGS(drm_id, flags, private_flags),
330
+	TP_PROTO(uint32_t drm_id, unsigned int flags),
331
+	TP_ARGS(drm_id, flags),
365332 	TP_STRUCT__entry(
366333 		__field(	uint32_t,		drm_id		)
367334 		__field(	unsigned int,		flags		)
368
-		__field(	int,			private_flags	)
369335 	),
370336 	TP_fast_assign(
371337 		__entry->drm_id = drm_id;
372338 		__entry->flags = flags;
373
-		__entry->private_flags = private_flags;
374339 	),
375
-	TP_printk("id=%u, flags=%u, private_flags=%d",
376
-		  __entry->drm_id, __entry->flags, __entry->private_flags)
340
+	TP_printk("id=%u, flags=%u",
341
+		  __entry->drm_id, __entry->flags)
377342 );
378343 
379344 DECLARE_EVENT_CLASS(dpu_enc_id_enable_template,
....@@ -425,7 +390,7 @@
425390 		__entry->rc_state = rc_state;
426391 		__assign_str(stage_str, stage);
427392 	),
428
-	TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d\n",
393
+	TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d",
429394 		  __get_str(stage_str), __entry->drm_id, __entry->sw_event,
430395 		  __entry->idle_pc_supported ? "true" : "false",
431396 		  __entry->rc_state)
....@@ -468,14 +433,16 @@
468433 
469434 TRACE_EVENT(dpu_enc_trigger_flush,
470435 	TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
471
-		 int pending_kickoff_cnt, int ctl_idx, u32 pending_flush_ret),
436
+		 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
437
+		 u32 pending_flush_ret),
472438 	TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
473
-		pending_flush_ret),
439
+		extra_flush_bits, pending_flush_ret),
474440 	TP_STRUCT__entry(
475441 		__field(	uint32_t,	drm_id			)
476442 		__field(	enum dpu_intf,	intf_idx		)
477443 		__field(	int,		pending_kickoff_cnt	)
478444 		__field(	int,		ctl_idx			)
445
+		__field(	u32,		extra_flush_bits	)
479446 		__field(	u32,		pending_flush_ret	)
480447 	),
481448 	TP_fast_assign(
....@@ -483,12 +450,14 @@
483450 		__entry->intf_idx = intf_idx;
484451 		__entry->pending_kickoff_cnt = pending_kickoff_cnt;
485452 		__entry->ctl_idx = ctl_idx;
453
+		__entry->extra_flush_bits = extra_flush_bits;
486454 		__entry->pending_flush_ret = pending_flush_ret;
487455 	),
488456 	TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
489
-		  "pending_flush_ret=%u", __entry->drm_id,
490
-		  __entry->intf_idx, __entry->pending_kickoff_cnt,
491
-		  __entry->ctl_idx, __entry->pending_flush_ret)
457
+		  "extra_flush_bits=0x%x pending_flush_ret=0x%x",
458
+		  __entry->drm_id, __entry->intf_idx,
459
+		  __entry->pending_kickoff_cnt, __entry->ctl_idx,
460
+		  __entry->extra_flush_bits, __entry->pending_flush_ret)
492461 );
493462 
494463 DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
....@@ -532,10 +501,6 @@
532501 	TP_ARGS(drm_id, event)
533502 );
534503 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
535
-	TP_PROTO(uint32_t drm_id, u32 event),
536
-	TP_ARGS(drm_id, event)
537
-);
538
-DEFINE_EVENT(dpu_id_event_template, dpu_crtc_handle_power_event,
539504 	TP_PROTO(uint32_t drm_id, u32 event),
540505 	TP_ARGS(drm_id, event)
541506 );
....@@ -682,37 +647,41 @@
682647 	TP_STRUCT__entry(
683648 		__field(	uint32_t,		crtc_id		)
684649 		__field(	uint32_t,		plane_id	)
685
-		__field(	struct drm_plane_state*,state		)
686
-		__field(	struct dpu_plane_state*,pstate		)
650
+		__field(	uint32_t,		fb_id		)
651
+		__field_struct(	struct drm_rect,	src_rect	)
652
+		__field_struct(	struct drm_rect,	dst_rect	)
687653 		__field(	uint32_t,		stage_idx	)
654
+		__field(	enum dpu_stage,		stage		)
688655 		__field(	enum dpu_sspp,		sspp		)
656
+		__field(	uint32_t,		multirect_idx	)
657
+		__field(	uint32_t,		multirect_mode	)
689658 		__field(	uint32_t,		pixel_format	)
690659 		__field(	uint64_t,		modifier	)
691660 	),
692661 	TP_fast_assign(
693662 		__entry->crtc_id = crtc_id;
694663 		__entry->plane_id = plane_id;
695
-		__entry->state = state;
696
-		__entry->pstate = pstate;
664
+		__entry->fb_id = state ? state->fb->base.id : 0;
665
+		__entry->src_rect = drm_plane_state_src(state);
666
+		__entry->dst_rect = drm_plane_state_dest(state);
697667 		__entry->stage_idx = stage_idx;
668
+		__entry->stage = pstate->stage;
698669 		__entry->sspp = sspp;
670
+		__entry->multirect_idx = pstate->multirect_index;
671
+		__entry->multirect_mode = pstate->multirect_mode;
699672 		__entry->pixel_format = pixel_format;
700673 		__entry->modifier = modifier;
701674 	),
702
-	TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:{%ux%u+%ux%u} "
703
-		  "dst:{%ux%u+%ux%u} stage_idx:%u stage:%d, sspp:%d "
675
+	TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT
676
+		  " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d "
704677 		  "multirect_index:%d multirect_mode:%u pix_format:%u "
705678 		  "modifier:%llu",
706
-		  __entry->crtc_id, __entry->plane_id,
707
-		  __entry->state->fb ? __entry->state->fb->base.id : -1,
708
-		  __entry->state->src_w >> 16,  __entry->state->src_h >> 16,
709
-		  __entry->state->src_x >> 16,  __entry->state->src_y >> 16,
710
-		  __entry->state->crtc_w,  __entry->state->crtc_h,
711
-		  __entry->state->crtc_x,  __entry->state->crtc_y,
712
-		  __entry->stage_idx, __entry->pstate->stage, __entry->sspp,
713
-		  __entry->pstate->multirect_index,
714
-		  __entry->pstate->multirect_mode, __entry->pixel_format,
715
-		  __entry->modifier)
679
+		  __entry->crtc_id, __entry->plane_id, __entry->fb_id,
680
+		  DRM_RECT_FP_ARG(&__entry->src_rect),
681
+		  DRM_RECT_ARG(&__entry->dst_rect),
682
+		  __entry->stage_idx, __entry->stage, __entry->sspp,
683
+		  __entry->multirect_idx, __entry->multirect_mode,
684
+		  __entry->pixel_format, __entry->modifier)
716685 );
717686 
718687 TRACE_EVENT(dpu_crtc_setup_lm_bounds,
....@@ -721,15 +690,15 @@
721690 	TP_STRUCT__entry(
722691 		__field(	uint32_t,		drm_id	)
723692 		__field(	int,			mixer	)
724
-		__field(	struct drm_rect *,	bounds	)
693
+		__field_struct(	struct drm_rect,	bounds	)
725694 	),
726695 	TP_fast_assign(
727696 		__entry->drm_id = drm_id;
728697 		__entry->mixer = mixer;
729
-		__entry->bounds = bounds;
698
+		__entry->bounds = *bounds;
730699 	),
731700 	TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id,
732
-		  __entry->mixer, DRM_RECT_ARG(__entry->bounds))
701
+		  __entry->mixer, DRM_RECT_ARG(&__entry->bounds))
733702 );
734703 
735704 TRACE_EVENT(dpu_crtc_vblank_enable,
....@@ -740,21 +709,18 @@
740709 		__field(	uint32_t,		drm_id	)
741710 		__field(	uint32_t,		enc_id	)
742711 		__field(	bool,			enable	)
743
-		__field(	struct dpu_crtc *,	crtc	)
712
+		__field(	bool,			enabled )
744713 	),
745714 	TP_fast_assign(
746715 		__entry->drm_id = drm_id;
747716 		__entry->enc_id = enc_id;
748717 		__entry->enable = enable;
749
-		__entry->crtc = crtc;
718
+		__entry->enabled = crtc->enabled;
750719 	),
751
-	TP_printk("id:%u encoder:%u enable:%s state{enabled:%s suspend:%s "
752
-		  "vblank_req:%s}",
720
+	TP_printk("id:%u encoder:%u enable:%s state{enabled:%s}",
753721 		  __entry->drm_id, __entry->enc_id,
754722 		  __entry->enable ? "true" : "false",
755
-		  __entry->crtc->enabled ? "true" : "false",
756
-		  __entry->crtc->suspend ? "true" : "false",
757
-		  __entry->crtc->vblank_requested ? "true" : "false")
723
+		  __entry->enabled ? "true" : "false")
758724 );
759725 
760726 DECLARE_EVENT_CLASS(dpu_crtc_enable_template,
....@@ -763,22 +729,16 @@
763729 	TP_STRUCT__entry(
764730 		__field(	uint32_t,		drm_id	)
765731 		__field(	bool,			enable	)
766
-		__field(	struct dpu_crtc *,	crtc	)
732
+		__field(	bool,			enabled )
767733 	),
768734 	TP_fast_assign(
769735 		__entry->drm_id = drm_id;
770736 		__entry->enable = enable;
771
-		__entry->crtc = crtc;
737
+		__entry->enabled = crtc->enabled;
772738 	),
773
-	TP_printk("id:%u enable:%s state{enabled:%s suspend:%s vblank_req:%s}",
739
+	TP_printk("id:%u enable:%s state{enabled:%s}",
774740 		  __entry->drm_id, __entry->enable ? "true" : "false",
775
-		  __entry->crtc->enabled ? "true" : "false",
776
-		  __entry->crtc->suspend ? "true" : "false",
777
-		  __entry->crtc->vblank_requested ? "true" : "false")
778
-);
779
-DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_set_suspend,
780
-	TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
781
-	TP_ARGS(drm_id, enable, crtc)
741
+		  __entry->enabled ? "true" : "false")
782742 );
783743 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
784744 	TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
....@@ -814,24 +774,24 @@
814774 	TP_ARGS(index, layout, multirect_index),
815775 	TP_STRUCT__entry(
816776 		__field(	enum dpu_sspp,			index	)
817
-		__field(	struct dpu_hw_fmt_layout*,	layout	)
777
+		__field_struct(	struct dpu_hw_fmt_layout,	layout	)
818778 		__field(	enum dpu_sspp_multirect_index,	multirect_index)
819779 	),
820780 	TP_fast_assign(
821781 		__entry->index = index;
822
-		__entry->layout = layout;
782
+		__entry->layout = *layout;
823783 		__entry->multirect_index = multirect_index;
824784 	),
825785 	TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} "
826
-		  "multirect_index:%d", __entry->index, __entry->layout->width,
827
-		  __entry->layout->height, __entry->layout->plane_addr[0],
828
-		  __entry->layout->plane_size[0],
829
-		  __entry->layout->plane_addr[1],
830
-		  __entry->layout->plane_size[1],
831
-		  __entry->layout->plane_addr[2],
832
-		  __entry->layout->plane_size[2],
833
-		  __entry->layout->plane_addr[3],
834
-		  __entry->layout->plane_size[3], __entry->multirect_index)
786
+		  "multirect_index:%d", __entry->index, __entry->layout.width,
787
+		  __entry->layout.height, __entry->layout.plane_addr[0],
788
+		  __entry->layout.plane_size[0],
789
+		  __entry->layout.plane_addr[1],
790
+		  __entry->layout.plane_size[1],
791
+		  __entry->layout.plane_addr[2],
792
+		  __entry->layout.plane_size[2],
793
+		  __entry->layout.plane_addr[3],
794
+		  __entry->layout.plane_size[3], __entry->multirect_index)
835795 );
836796 
837797 TRACE_EVENT(dpu_plane_disable,
....@@ -853,52 +813,42 @@
853813 );
854814 
855815 DECLARE_EVENT_CLASS(dpu_rm_iter_template,
856
-	TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
857
-	TP_ARGS(id, type, enc_id),
816
+	TP_PROTO(uint32_t id, uint32_t enc_id),
817
+	TP_ARGS(id, enc_id),
858818 	TP_STRUCT__entry(
859819 		__field(	uint32_t,		id	)
860
-		__field(	enum dpu_hw_blk_type,	type	)
861820 		__field(	uint32_t,		enc_id	)
862821 	),
863822 	TP_fast_assign(
864823 		__entry->id = id;
865
-		__entry->type = type;
866824 		__entry->enc_id = enc_id;
867825 	),
868
-	TP_printk("id:%d type:%d enc_id:%u", __entry->id, __entry->type,
869
-		  __entry->enc_id)
870
-);
871
-DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_cdm,
872
-	TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
873
-	TP_ARGS(id, type, enc_id)
826
+	TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id)
874827 );
875828 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
876
-	TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
877
-	TP_ARGS(id, type, enc_id)
829
+	TP_PROTO(uint32_t id, uint32_t enc_id),
830
+	TP_ARGS(id, enc_id)
878831 );
879832 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
880
-	TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
881
-	TP_ARGS(id, type, enc_id)
833
+	TP_PROTO(uint32_t id, uint32_t enc_id),
834
+	TP_ARGS(id, enc_id)
882835 );
883836 
884837 TRACE_EVENT(dpu_rm_reserve_lms,
885
-	TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id,
886
-		 uint32_t pp_id),
887
-	TP_ARGS(id, type, enc_id, pp_id),
838
+	TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id),
839
+	TP_ARGS(id, enc_id, pp_id),
888840 	TP_STRUCT__entry(
889841 		__field(	uint32_t,		id	)
890
-		__field(	enum dpu_hw_blk_type,	type	)
891842 		__field(	uint32_t,		enc_id	)
892843 		__field(	uint32_t,		pp_id	)
893844 	),
894845 	TP_fast_assign(
895846 		__entry->id = id;
896
-		__entry->type = type;
897847 		__entry->enc_id = enc_id;
898848 		__entry->pp_id = pp_id;
899849 	),
900
-	TP_printk("id:%d type:%d enc_id:%u pp_id:%u", __entry->id,
901
-		  __entry->type, __entry->enc_id, __entry->pp_id)
850
+	TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id,
851
+		  __entry->enc_id, __entry->pp_id)
902852 );
903853 
904854 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
....@@ -979,19 +929,66 @@
979929 	TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate),
980930 	TP_ARGS(dev, stop_req, clk_rate),
981931 	TP_STRUCT__entry(
982
-		__field(	struct drm_device *,	dev		)
932
+		__string(	dev_name,		dev->unique	)
983933 		__field(	bool,			stop_req	)
984934 		__field(	u64,			clk_rate	)
985935 	),
986936 	TP_fast_assign(
987
-		__entry->dev = dev;
937
+		__assign_str(dev_name, dev->unique);
988938 		__entry->stop_req = stop_req;
989939 		__entry->clk_rate = clk_rate;
990940 	),
991
-	TP_printk("dev:%s stop_req:%s clk_rate:%llu", __entry->dev->unique,
941
+	TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name),
992942 		  __entry->stop_req ? "true" : "false", __entry->clk_rate)
993943 );
994944 
945
+TRACE_EVENT(dpu_hw_ctl_update_pending_flush,
946
+	TP_PROTO(u32 new_bits, u32 pending_mask),
947
+	TP_ARGS(new_bits, pending_mask),
948
+	TP_STRUCT__entry(
949
+		__field(	u32,			new_bits	)
950
+		__field(	u32,			pending_mask	)
951
+	),
952
+	TP_fast_assign(
953
+		__entry->new_bits = new_bits;
954
+		__entry->pending_mask = pending_mask;
955
+	),
956
+	TP_printk("new=%x existing=%x", __entry->new_bits,
957
+		  __entry->pending_mask)
958
+);
959
+
960
+DECLARE_EVENT_CLASS(dpu_hw_ctl_pending_flush_template,
961
+	TP_PROTO(u32 pending_mask, u32 ctl_flush),
962
+	TP_ARGS(pending_mask, ctl_flush),
963
+	TP_STRUCT__entry(
964
+		__field(	u32,			pending_mask	)
965
+		__field(	u32,			ctl_flush	)
966
+	),
967
+	TP_fast_assign(
968
+		__entry->pending_mask = pending_mask;
969
+		__entry->ctl_flush = ctl_flush;
970
+	),
971
+	TP_printk("pending_mask=%x CTL_FLUSH=%x", __entry->pending_mask,
972
+		  __entry->ctl_flush)
973
+);
974
+DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush,
975
+	TP_PROTO(u32 pending_mask, u32 ctl_flush),
976
+	TP_ARGS(pending_mask, ctl_flush)
977
+);
978
+DEFINE_EVENT(dpu_hw_ctl_pending_flush_template,
979
+	     dpu_hw_ctl_trigger_pending_flush,
980
+	TP_PROTO(u32 pending_mask, u32 ctl_flush),
981
+	TP_ARGS(pending_mask, ctl_flush)
982
+);
983
+DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare,
984
+	TP_PROTO(u32 pending_mask, u32 ctl_flush),
985
+	TP_ARGS(pending_mask, ctl_flush)
986
+);
987
+DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start,
988
+	TP_PROTO(u32 pending_mask, u32 ctl_flush),
989
+	TP_ARGS(pending_mask, ctl_flush)
990
+);
991
+
995992 #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)
996993 #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)
997994 #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__)