add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/arch/x86/platform/uv/uv_irq.c
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@@ -90,15 +90,15 @@
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 	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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 	if (ret >= 0) {
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-		if (info->uv_limit == UV_AFFINITY_CPU)
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+		if (info->uv.limit == UV_AFFINITY_CPU)
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 			irq_set_status_flags(virq, IRQ_NO_BALANCING);
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 		else
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 			irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);
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-		chip_data->pnode = uv_blade_to_pnode(info->uv_blade);
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-		chip_data->offset = info->uv_offset;
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+		chip_data->pnode = uv_blade_to_pnode(info->uv.blade);
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+		chip_data->offset = info->uv.offset;
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 		irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data,
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-				    handle_percpu_irq, NULL, info->uv_name);
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+				    handle_percpu_irq, NULL, info->uv.name);
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 	} else {
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 		kfree(chip_data);
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 	}
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@@ -193,10 +193,10 @@
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 	init_irq_alloc_info(&info, cpumask_of(cpu));
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 	info.type = X86_IRQ_ALLOC_TYPE_UV;
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-	info.uv_limit = limit;
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-	info.uv_blade = mmr_blade;
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-	info.uv_offset = mmr_offset;
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-	info.uv_name = irq_name;
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+	info.uv.limit = limit;
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+	info.uv.blade = mmr_blade;
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+	info.uv.offset = mmr_offset;
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+	info.uv.name = irq_name;
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 	return irq_domain_alloc_irqs(domain, 1,
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 				     uv_blade_to_memory_nid(mmr_blade), &info);