add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/arch/x86/include/uapi/asm/bootparam.h
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@@ -2,7 +2,7 @@
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 #ifndef _ASM_X86_BOOTPARAM_H
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 #define _ASM_X86_BOOTPARAM_H
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-/* setup_data types */
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+/* setup_data/setup_indirect types */
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 #define SETUP_NONE			0
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 #define SETUP_E820_EXT			1
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 #define SETUP_DTB			2
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@@ -10,6 +10,11 @@
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 #define SETUP_EFI			4
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 #define SETUP_APPLE_PROPERTIES		5
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 #define SETUP_JAILHOUSE			6
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+
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+#define SETUP_INDIRECT			(1<<31)
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+
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+/* SETUP_INDIRECT | max(SETUP_*) */
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+#define SETUP_TYPE_MAX			(SETUP_INDIRECT | SETUP_JAILHOUSE)
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 /* ram_size flags */
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 #define RAMDISK_IMAGE_START_MASK	0x07FF
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@@ -29,6 +34,8 @@
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 #define XLF_EFI_HANDOVER_32		(1<<2)
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 #define XLF_EFI_HANDOVER_64		(1<<3)
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 #define XLF_EFI_KEXEC			(1<<4)
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+#define XLF_5LEVEL			(1<<5)
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+#define XLF_5LEVEL_ENABLED		(1<<6)
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 #ifndef __ASSEMBLY__
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@@ -45,6 +52,14 @@
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 	__u32 type;
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 	__u32 len;
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 	__u8 data[0];
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+};
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+
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+/* extensible setup indirect data node */
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+struct setup_indirect {
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+	__u32 type;
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+	__u32 reserved;  /* Reserved, must be set to zero. */
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+	__u64 len;
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+	__u64 addr;
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 };
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 struct setup_header {
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@@ -86,6 +101,7 @@
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 	__u64	pref_address;
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 	__u32	init_size;
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 	__u32	handover_offset;
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+	__u32	kernel_info_offset;
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 } __attribute__((packed));
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 struct sys_desc_table {
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@@ -137,15 +153,22 @@
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  * setup data structure.
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  */
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 struct jailhouse_setup_data {
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-	__u16	version;
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-	__u16	compatible_version;
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-	__u16	pm_timer_address;
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-	__u16	num_cpus;
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-	__u64	pci_mmconfig_base;
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-	__u32	tsc_khz;
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-	__u32	apic_khz;
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-	__u8	standard_ioapic;
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-	__u8	cpu_ids[255];
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+	struct {
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+		__u16	version;
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+		__u16	compatible_version;
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+	} __attribute__((packed)) hdr;
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+	struct {
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+		__u16	pm_timer_address;
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+		__u16	num_cpus;
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+		__u64	pci_mmconfig_base;
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+		__u32	tsc_khz;
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+		__u32	apic_khz;
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+		__u8	standard_ioapic;
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+		__u8	cpu_ids[255];
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+	} __attribute__((packed)) v1;
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+	struct {
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+		__u32	flags;
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+	} __attribute__((packed)) v2;
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 } __attribute__((packed));
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 /* The so-called "zeropage" */
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@@ -155,7 +178,8 @@
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 	__u8  _pad2[4];					/* 0x054 */
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 	__u64  tboot_addr;				/* 0x058 */
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 	struct ist_info ist_info;			/* 0x060 */
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-	__u8  _pad3[16];				/* 0x070 */
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+	__u64 acpi_rsdp_addr;				/* 0x070 */
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+	__u8  _pad3[8];					/* 0x078 */
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 	__u8  hd0_info[16];	/* obsolete! */		/* 0x080 */
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 	__u8  hd1_info[16];	/* obsolete! */		/* 0x090 */
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 	struct sys_desc_table sys_desc_table; /* obsolete! */	/* 0x0a0 */
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@@ -231,7 +255,7 @@
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  * 	currently supportd through this PV boot path.
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  * @X86_SUBARCH_INTEL_MID: Used for Intel MID (Mobile Internet Device) platform
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  *	systems which do not have the PCI legacy interfaces.
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- * @X86_SUBARCH_CE4100: Used for Intel CE media processor (CE4100) SoC for
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+ * @X86_SUBARCH_CE4100: Used for Intel CE media processor (CE4100) SoC
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  * 	for settop boxes and media devices, the use of a subarch for CE4100
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  * 	is more of a hack...
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  */