add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/arch/sh/mm/cache-sh4.c
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@@ -16,7 +16,6 @@
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 #include <linux/mutex.h>
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 #include <linux/fs.h>
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 #include <linux/highmem.h>
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-#include <asm/pgtable.h>
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 #include <asm/mmu_context.h>
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 #include <asm/cache_insns.h>
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 #include <asm/cacheflush.h>
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@@ -183,7 +182,7 @@
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  * accessed with (hence cache set) is in accord with the physical
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  * address (i.e. tag).  It's no different here.
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  *
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- * Caller takes mm->mmap_sem.
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+ * Caller takes mm->mmap_lock.
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  */
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 static void sh4_flush_cache_mm(void *arg)
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 {
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@@ -208,8 +207,6 @@
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 	struct page *page;
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 	unsigned long address, pfn, phys;
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 	int map_coherent = 0;
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-	pgd_t *pgd;
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-	pud_t *pud;
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 	pmd_t *pmd;
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 	pte_t *pte;
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 	void *vaddr;
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@@ -223,9 +220,7 @@
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 	if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
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 		return;
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-	pgd = pgd_offset(vma->vm_mm, address);
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-	pud = pud_offset(pgd, address);
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-	pmd = pmd_offset(pud, address);
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+	pmd = pmd_off(vma->vm_mm, address);
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 	pte = pte_offset_kernel(pmd, address);
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 	/* If the page isn't present, there is nothing to do here. */