kernel/arch/sh/include/asm/smc37c93x.h
.. .. @@ -112,8 +112,8 @@ 112 112 #define FCR_RFRES 0x0200 /* Receiver FIFO reset */ 113 113 #define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ 114 114 #define FCR_DMA 0x0800 /* DMA mode select */ 115 -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */116 -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */115 +#define FCR_RTL 0x4000 /* Receiver trigger (LSB) */116 +#define FCR_RTM 0x8000 /* Receiver trigger (MSB) */117 117 118 118 /* Line Control Register */ 119 119