kernel/arch/mips/include/asm/octeon/cvmx-ipd.h
.. .. @@ -36,6 +36,7 @@ 36 36 #include <asm/octeon/octeon-feature.h> 37 37 38 38 #include <asm/octeon/cvmx-ipd-defs.h> 39 +#include <asm/octeon/cvmx-pip-defs.h>39 40 40 41 enum cvmx_ipd_mode { 41 42 CVMX_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */