add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/arch/arm64/include/asm/fpsimd.h
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@@ -1,17 +1,6 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (C) 2012 ARM Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #ifndef __ASM_FP_H
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 #define __ASM_FP_H
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@@ -24,12 +13,15 @@
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13
 
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 #ifndef __ASSEMBLY__
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15
 
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+#include <linux/bitmap.h>
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 #include <linux/build_bug.h>
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+#include <linux/bug.h>
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 #include <linux/cache.h>
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 #include <linux/init.h>
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 #include <linux/stddef.h>
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+#include <linux/types.h>
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23
 
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-#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
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+#ifdef CONFIG_COMPAT
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 /* Masks for extracting the FPSR and FPCR from the FPSCR */
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 #define VFP_FPSCR_STAT_MASK	0xf800009f
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 #define VFP_FPSCR_CTRL_MASK	0x07f79f00
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@@ -45,8 +37,6 @@
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 extern void fpsimd_save_state(struct user_fpsimd_state *state);
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 extern void fpsimd_load_state(struct user_fpsimd_state *state);
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-extern void fpsimd_save(void);
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-
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 extern void fpsimd_thread_switch(struct task_struct *next);
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 extern void fpsimd_flush_thread(void);
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@@ -56,11 +46,11 @@
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 extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);
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 extern void fpsimd_bind_task_to_cpu(void);
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-extern void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *state);
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+extern void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *state,
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+				     void *sve_state, unsigned int sve_vl);
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 extern void fpsimd_flush_task_state(struct task_struct *target);
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-extern void fpsimd_flush_cpu_state(void);
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-extern void sve_flush_cpu_state(void);
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+extern void fpsimd_save_and_flush_cpu_state(void);
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 /* Maximum VL that SVE VL-agnostic software can transparently support */
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 #define SVE_VL_ARCH_MAX 0x100
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@@ -79,6 +69,9 @@
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 extern void sve_save_state(void *state, u32 *pfpsr);
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 extern void sve_load_state(void const *state, u32 const *pfpsr,
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 			   unsigned long vq_minus_1);
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+extern void sve_flush_live(void);
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+extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state,
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+				       unsigned long vq_minus_1);
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 extern unsigned int sve_get_vl(void);
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 struct arm64_cpu_capabilities;
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@@ -87,6 +80,29 @@
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 extern u64 read_zcr_features(void);
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 extern int __ro_after_init sve_max_vl;
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+extern int __ro_after_init sve_max_virtualisable_vl;
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+extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
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+
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+/*
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+ * Helpers to translate bit indices in sve_vq_map to VQ values (and
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+ * vice versa).  This allows find_next_bit() to be used to find the
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+ * _maximum_ VQ not exceeding a certain value.
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+ */
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+static inline unsigned int __vq_to_bit(unsigned int vq)
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+{
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+	return SVE_VQ_MAX - vq;
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+}
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+
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+static inline unsigned int __bit_to_vq(unsigned int bit)
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+{
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+	return SVE_VQ_MAX - bit;
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+}
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+
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+/* Ensure vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX before calling this function */
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+static inline bool sve_vq_available(unsigned int vq)
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+{
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+	return test_bit(__vq_to_bit(vq), sve_vq_map);
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+}
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 #ifdef CONFIG_ARM64_SVE
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@@ -114,6 +130,15 @@
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 	sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN);
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 }
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+#define sve_cond_update_zcr_vq(val, reg)		\
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+	do {						\
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+		u64 __zcr = read_sysreg_s((reg));	\
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+		u64 __new = __zcr & ~ZCR_ELx_LEN_MASK;	\
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+		__new |= (val) & ZCR_ELx_LEN_MASK;	\
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+		if (__zcr != __new)			\
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+			write_sysreg_s(__new, (reg));	\
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+	} while (0)
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+
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 /*
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  * Probing and setup functions.
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  * Calls to these functions must be serialised with one another.