add ax88772_rst

hc

2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29

 kernel/arch/arm/boot/dts/stm32f429.dtsi
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@@ -45,12 +45,14 @@
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  *     OTHER DEALINGS IN THE SOFTWARE.
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  */
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-#include "skeleton.dtsi"
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 #include "armv7-m.dtsi"
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 #include <dt-bindings/clock/stm32fx-clock.h>
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 #include <dt-bindings/mfd/stm32f4-rcc.h>
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 / {
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+	#address-cells = <1>;
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+	#size-cells = <1>;
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+
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 	clocks {
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 		clk_hse: clk-hse {
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 			#clock-cells = <0>;
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@@ -58,7 +60,7 @@
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 			clock-frequency = <0>;
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 		};
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-		clk-lse {
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+		clk_lse: clk-lse {
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 			#clock-cells = <0>;
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 			compatible = "fixed-clock";
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 			clock-frequency = <32768>;
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@@ -78,6 +80,19 @@
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 	};
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 	soc {
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+		romem: efuse@1fff7800 {
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+			compatible = "st,stm32f4-otp";
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+			reg = <0x1fff7800 0x400>;
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+			ts_cal1: calib@22c {
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+				reg = <0x22c 0x2>;
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+			};
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+			ts_cal2: calib@22e {
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+				reg = <0x22e 0x2>;
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+			};
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+		};
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+
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 		timer2: timer@40000000 {
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 			compatible = "st,stm32-timer";
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 			reg = <0x40000000 0x400>;
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@@ -97,6 +112,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -126,6 +142,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -155,6 +172,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -183,6 +201,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -252,6 +271,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -271,6 +291,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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 		};
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@@ -284,6 +305,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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 		};
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@@ -292,12 +314,10 @@
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 			compatible = "st,stm32-rtc";
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 			reg = <0x40002800 0x400>;
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 			clocks = <&rcc 1 CLK_RTC>;
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-			clock-names = "ck_rtc";
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 			assigned-clocks = <&rcc 1 CLK_RTC>;
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 			assigned-clock-parents = <&rcc 1 CLK_LSE>;
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 			interrupt-parent = <&exti>;
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 			interrupts = <17 1>;
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-			interrupt-names = "alarm";
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 			st,syscfg = <&pwrcfg 0x00 0x100>;
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 			status = "disabled";
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 		};
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@@ -307,6 +327,26 @@
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 			reg = <0x40003000 0x400>;
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 			clocks = <&clk_lsi>;
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 			clock-names = "lsi";
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+			status = "disabled";
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+		};
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+
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+		spi2: spi@40003800 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40003800 0x400>;
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+			interrupts = <36>;
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+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI2)>;
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+			status = "disabled";
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+		};
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+
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+		spi3: spi@40003c00 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40003c00 0x400>;
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+			interrupts = <51>;
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+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI3)>;
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 			status = "disabled";
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 		};
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@@ -357,6 +397,18 @@
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 			status = "disabled";
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 		};
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+		i2c3: i2c@40005c00 {
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+			compatible = "st,stm32f4-i2c";
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+			reg = <0x40005c00 0x400>;
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+			interrupts = <72>,
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+				     <73>;
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+			resets = <&rcc STM32F4_APB1_RESET(I2C3)>;
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+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>;
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			status = "disabled";
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+		};
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+
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 		dac: dac@40007400 {
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 			compatible = "st,stm32f4-dac-core";
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 			reg = <0x40007400 0x400>;
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@@ -369,14 +421,14 @@
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 			dac1: dac@1 {
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 				compatible = "st,stm32-dac";
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-				#io-channels-cells = <1>;
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+				#io-channel-cells = <1>;
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 				reg = <1>;
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 				status = "disabled";
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 			};
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 			dac2: dac@2 {
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 				compatible = "st,stm32-dac";
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-				#io-channels-cells = <1>;
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+				#io-channel-cells = <1>;
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 				reg = <2>;
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 				status = "disabled";
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 			};
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@@ -409,6 +461,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -430,6 +483,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -519,8 +573,28 @@
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 			status = "disabled";
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 		};
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-		syscfg: system-config@40013800 {
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-			compatible = "syscon";
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+		spi1: spi@40013000 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40013000 0x400>;
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+			interrupts = <35>;
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+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI1)>;
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+			status = "disabled";
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+		};
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+
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+		spi4: spi@40013400 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40013400 0x400>;
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+			interrupts = <84>;
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+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI4)>;
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+			status = "disabled";
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+		};
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+
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+		syscfg: syscon@40013800 {
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+			compatible = "st,stm32-syscfg", "syscon";
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 			reg = <0x40013800 0x400>;
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 		};
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@@ -543,6 +617,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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@@ -562,6 +637,7 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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 		};
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@@ -575,12 +651,36 @@
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 			pwm {
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 				compatible = "st,stm32-pwm";
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+				#pwm-cells = <3>;
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 				status = "disabled";
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 			};
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 		};
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+		spi5: spi@40015000 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40015000 0x400>;
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+			interrupts = <85>;
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+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
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+			dmas = <&dma2 3 2 0x400 0x0>,
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+				<&dma2 4 2 0x400 0x0>;
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+			dma-names = "rx", "tx";
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+			status = "disabled";
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+		};
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+
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+		spi6: spi@40015400 {
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			compatible = "st,stm32f4-spi";
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+			reg = <0x40015400 0x400>;
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+			interrupts = <86>;
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+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI6)>;
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+			status = "disabled";
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+		};
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+
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 		pwrcfg: power-config@40007000 {
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-			compatible = "syscon";
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+			compatible = "st,stm32-power-config", "syscon";
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 			reg = <0x40007000 0x400>;
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 		};
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@@ -694,7 +794,6 @@
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 		rng: rng@50060800 {
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 			compatible = "st,stm32-rng";
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 			reg = <0x50060800 0x400>;
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-			interrupts = <80>;
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 			clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
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 		};