forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29
kernel/arch/arm/boot/dts/qcom-msm8960.dtsi
....@@ -1,14 +1,14 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /dts-v1/;
33
4
-/include/ "skeleton.dtsi"
5
-
64 #include <dt-bindings/interrupt-controller/arm-gic.h>
75 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
86 #include <dt-bindings/mfd/qcom-rpm.h>
97 #include <dt-bindings/soc/qcom,gsbi.h>
108
119 / {
10
+ #address-cells = <1>;
11
+ #size-cells = <1>;
1212 model = "Qualcomm MSM8960";
1313 compatible = "qcom,msm8960";
1414 interrupt-parent = <&intc>;
....@@ -42,6 +42,11 @@
4242 compatible = "cache";
4343 cache-level = <2>;
4444 };
45
+ };
46
+
47
+ memory {
48
+ device_type = "memory";
49
+ reg = <0x0 0x0>;
4550 };
4651
4752 cpu-pmu {
....@@ -102,6 +107,7 @@
102107 msmgpio: pinctrl@800000 {
103108 compatible = "qcom,msm8960-pinctrl";
104109 gpio-controller;
110
+ gpio-ranges = <&msmgpio 0 0 152>;
105111 #gpio-cells = <2>;
106112 interrupts = <0 16 0x4>;
107113 interrupt-controller;
....@@ -140,7 +146,9 @@
140146 reg = <0x108000 0x1000>;
141147 qcom,ipc = <&l2cc 0x8 2>;
142148
143
- interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
149
+ interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
150
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
151
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
144152 interrupt-names = "ack", "err", "wakeup";
145153
146154 regulators {
....@@ -186,7 +194,7 @@
186194 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
187195 reg = <0x16440000 0x1000>,
188196 <0x16400000 0x1000>;
189
- interrupts = <0 154 0x0>;
197
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
190198 clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
191199 clock-names = "core", "iface";
192200 status = "disabled";
....@@ -312,7 +320,7 @@
312320 #address-cells = <1>;
313321 #size-cells = <0>;
314322 reg = <0x16080000 0x1000>;
315
- interrupts = <0 147 0>;
323
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
316324 spi-max-frequency = <24000000>;
317325 cs-gpios = <&msmgpio 8 0>;
318326