forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 9999e48639b3cecb08ffb37358bcba3b48161b29
kernel/arch/arm/boot/dts/exynos5260.dtsi
....@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /*
3
- * SAMSUNG EXYNOS5260 SoC device tree source
3
+ * Samsung Exynos5260 SoC device tree source
44 *
55 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
66 * http://www.samsung.com
....@@ -17,6 +17,10 @@
1717 #size-cells = <1>;
1818
1919 aliases {
20
+ i2c0 = &hsi2c_0;
21
+ i2c1 = &hsi2c_1;
22
+ i2c2 = &hsi2c_2;
23
+ i2c3 = &hsi2c_3;
2024 pinctrl0 = &pinctrl_0;
2125 pinctrl1 = &pinctrl_1;
2226 pinctrl2 = &pinctrl_2;
....@@ -158,10 +162,8 @@
158162 };
159163
160164 gic: interrupt-controller@10481000 {
161
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
165
+ compatible = "arm,gic-400", "arm,cortex-a15-gic";
162166 #interrupt-cells = <3>;
163
- #address-cells = <0>;
164
- #size-cells = <0>;
165167 interrupt-controller;
166168 reg = <0x10481000 0x1000>,
167169 <0x10482000 0x2000>,
....@@ -176,7 +178,7 @@
176178 reg = <0x10000000 0x100>;
177179 };
178180
179
- mct: mct@100b0000 {
181
+ mct: timer@100b0000 {
180182 compatible = "samsung,exynos4210-mct";
181183 reg = <0x100B0000 0x1000>;
182184 clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
....@@ -288,6 +290,14 @@
288290 #size-cells = <0>;
289291 clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>;
290292 clock-names = "biu", "ciu";
293
+ assigned-clocks =
294
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>,
295
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B>,
296
+ <&clock_top TOP_SCLK_MMC0>;
297
+ assigned-clock-parents =
298
+ <&clock_top TOP_MOUT_BUSTOP_PLL_USER>,
299
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>;
300
+ assigned-clock-rates = <0>, <0>, <800000000>;
291301 fifo-depth = <64>;
292302 status = "disabled";
293303 };
....@@ -300,6 +310,14 @@
300310 #size-cells = <0>;
301311 clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>;
302312 clock-names = "biu", "ciu";
313
+ assigned-clocks =
314
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>,
315
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B>,
316
+ <&clock_top TOP_SCLK_MMC1>;
317
+ assigned-clock-parents =
318
+ <&clock_top TOP_MOUT_BUSTOP_PLL_USER>,
319
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>;
320
+ assigned-clock-rates = <0>, <0>, <800000000>;
303321 fifo-depth = <64>;
304322 status = "disabled";
305323 };
....@@ -312,9 +330,69 @@
312330 #size-cells = <0>;
313331 clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>;
314332 clock-names = "biu", "ciu";
333
+ assigned-clocks =
334
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>,
335
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B>,
336
+ <&clock_top TOP_SCLK_MMC2>;
337
+ assigned-clock-parents =
338
+ <&clock_top TOP_MOUT_BUSTOP_PLL_USER>,
339
+ <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>;
340
+ assigned-clock-rates = <0>, <0>, <800000000>;
315341 fifo-depth = <64>;
316342 status = "disabled";
317343 };
344
+
345
+ hsi2c_0: hsi2c@12da0000 {
346
+ compatible = "samsung,exynos5260-hsi2c";
347
+ reg = <0x12DA0000 0x1000>;
348
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
349
+ #address-cells = <1>;
350
+ #size-cells = <0>;
351
+ pinctrl-names = "default";
352
+ pinctrl-0 = <&i2c0_hs_bus>;
353
+ clocks = <&clock_peri PERI_CLK_HSIC0>;
354
+ clock-names = "hsi2c";
355
+ status = "disabled";
356
+ };
357
+
358
+ hsi2c_1: hsi2c@12db0000 {
359
+ compatible = "samsung,exynos5260-hsi2c";
360
+ reg = <0x12DB0000 0x1000>;
361
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
362
+ #address-cells = <1>;
363
+ #size-cells = <0>;
364
+ pinctrl-names = "default";
365
+ pinctrl-0 = <&i2c1_hs_bus>;
366
+ clocks = <&clock_peri PERI_CLK_HSIC1>;
367
+ clock-names = "hsi2c";
368
+ status = "disabled";
369
+ };
370
+
371
+ hsi2c_2: hsi2c@12dc0000 {
372
+ compatible = "samsung,exynos5260-hsi2c";
373
+ reg = <0x12DC0000 0x1000>;
374
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
375
+ #address-cells = <1>;
376
+ #size-cells = <0>;
377
+ pinctrl-names = "default";
378
+ pinctrl-0 = <&i2c2_hs_bus>;
379
+ clocks = <&clock_peri PERI_CLK_HSIC2>;
380
+ clock-names = "hsi2c";
381
+ status = "disabled";
382
+ };
383
+
384
+ hsi2c_3: hsi2c@12dd0000 {
385
+ compatible = "samsung,exynos5260-hsi2c";
386
+ reg = <0x12DD0000 0x1000>;
387
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
388
+ #address-cells = <1>;
389
+ #size-cells = <0>;
390
+ pinctrl-names = "default";
391
+ pinctrl-0 = <&i2c3_hs_bus>;
392
+ clocks = <&clock_peri PERI_CLK_HSIC3>;
393
+ clock-names = "hsi2c";
394
+ status = "disabled";
395
+ };
318396 };
319397 };
320398