| .. | .. |
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| 1 | | -// SPDX-License-Identifier: GPL-2.0+ |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0+ */ |
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| 2 | 2 | /* |
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| 3 | 3 | * Driver for 8250/16550-type serial ports |
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| 4 | 4 | * |
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| .. | .. |
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| 10 | 10 | #include <linux/serial_8250.h> |
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| 11 | 11 | #include <linux/serial_reg.h> |
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| 12 | 12 | #include <linux/dmaengine.h> |
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| 13 | + |
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| 14 | +#include "../serial_mctrl_gpio.h" |
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| 13 | 15 | |
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| 14 | 16 | struct uart_8250_dma { |
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| 15 | 17 | int (*tx_dma)(struct uart_8250_port *p); |
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| .. | .. |
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| 46 | 48 | unsigned char tx_running; |
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| 47 | 49 | unsigned char tx_err; |
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| 48 | 50 | unsigned char rx_running; |
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| 49 | | -#ifdef CONFIG_ARCH_ROCKCHIP |
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| 51 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 50 | 52 | size_t rx_index; |
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| 51 | 53 | #endif |
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| 52 | 54 | }; |
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| .. | .. |
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| 89 | 91 | #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */ |
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| 90 | 92 | #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */ |
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| 91 | 93 | #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */ |
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| 94 | +#define UART_BUG_TXRACE (1 << 5) /* UART Tx fails to set remote DR */ |
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| 92 | 95 | |
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| 93 | 96 | |
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| 94 | 97 | #ifdef CONFIG_SERIAL_8250_SHARE_IRQ |
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| .. | .. |
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| 119 | 122 | up->port.serial_out(&up->port, offset, value); |
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| 120 | 123 | } |
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| 121 | 124 | |
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| 125 | +/* |
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| 126 | + * For the 16C950 |
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| 127 | + */ |
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| 128 | +static void serial_icr_write(struct uart_8250_port *up, int offset, int value) |
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| 129 | +{ |
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| 130 | + serial_out(up, UART_SCR, offset); |
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| 131 | + serial_out(up, UART_ICR, value); |
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| 132 | +} |
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| 133 | + |
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| 134 | +static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up, |
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| 135 | + int offset) |
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| 136 | +{ |
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| 137 | + unsigned int value; |
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| 138 | + |
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| 139 | + serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); |
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| 140 | + serial_out(up, UART_SCR, offset); |
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| 141 | + value = serial_in(up, UART_ICR); |
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| 142 | + serial_icr_write(up, UART_ACR, up->acr); |
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| 143 | + |
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| 144 | + return value; |
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| 145 | +} |
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| 146 | + |
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| 122 | 147 | void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); |
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| 123 | 148 | |
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| 124 | 149 | static inline int serial_dl_read(struct uart_8250_port *up) |
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| .. | .. |
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| 131 | 156 | up->dl_write(up, value); |
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| 132 | 157 | } |
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| 133 | 158 | |
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| 159 | +static inline void serial8250_set_IER(struct uart_8250_port *up, |
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| 160 | + unsigned char ier) |
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| 161 | +{ |
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| 162 | + struct uart_port *port = &up->port; |
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| 163 | + unsigned int flags; |
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| 164 | + bool is_console; |
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| 165 | + |
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| 166 | + is_console = uart_console(port); |
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| 167 | + |
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| 168 | + if (is_console) |
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| 169 | + console_atomic_lock(&flags); |
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| 170 | + |
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| 171 | + serial_out(up, UART_IER, ier); |
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| 172 | + |
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| 173 | + if (is_console) |
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| 174 | + console_atomic_unlock(flags); |
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| 175 | +} |
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| 176 | + |
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| 177 | +static inline unsigned char serial8250_clear_IER(struct uart_8250_port *up) |
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| 178 | +{ |
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| 179 | + struct uart_port *port = &up->port; |
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| 180 | + unsigned int clearval = 0; |
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| 181 | + unsigned int prior; |
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| 182 | + unsigned int flags; |
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| 183 | + bool is_console; |
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| 184 | + |
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| 185 | + is_console = uart_console(port); |
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| 186 | + |
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| 187 | + if (up->capabilities & UART_CAP_UUE) |
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| 188 | + clearval = UART_IER_UUE; |
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| 189 | + |
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| 190 | + if (is_console) |
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| 191 | + console_atomic_lock(&flags); |
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| 192 | + |
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| 193 | + prior = serial_port_in(port, UART_IER); |
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| 194 | + serial_port_out(port, UART_IER, clearval); |
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| 195 | + |
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| 196 | + if (is_console) |
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| 197 | + console_atomic_unlock(flags); |
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| 198 | + |
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| 199 | + return prior; |
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| 200 | +} |
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| 201 | + |
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| 202 | +static inline bool serial8250_set_THRI(struct uart_8250_port *up) |
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| 203 | +{ |
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| 204 | + if (up->ier & UART_IER_THRI) |
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| 205 | + return false; |
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| 206 | + up->ier |= UART_IER_THRI; |
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| 207 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 208 | + up->ier |= UART_IER_PTIME; |
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| 209 | +#endif |
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| 210 | + serial8250_set_IER(up, up->ier); |
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| 211 | + return true; |
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| 212 | +} |
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| 213 | + |
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| 214 | +static inline bool serial8250_clear_THRI(struct uart_8250_port *up) |
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| 215 | +{ |
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| 216 | + if (!(up->ier & UART_IER_THRI)) |
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| 217 | + return false; |
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| 218 | + up->ier &= ~UART_IER_THRI; |
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| 219 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 220 | + up->ier &= ~UART_IER_PTIME; |
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| 221 | +#endif |
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| 222 | + serial8250_set_IER(up, up->ier); |
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| 223 | + return true; |
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| 224 | +} |
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| 225 | + |
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| 134 | 226 | struct uart_8250_port *serial8250_get_port(int line); |
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| 135 | 227 | |
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| 136 | 228 | void serial8250_rpm_get(struct uart_8250_port *p); |
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| .. | .. |
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| 139 | 231 | void serial8250_rpm_get_tx(struct uart_8250_port *p); |
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| 140 | 232 | void serial8250_rpm_put_tx(struct uart_8250_port *p); |
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| 141 | 233 | |
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| 142 | | -int serial8250_em485_init(struct uart_8250_port *p); |
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| 234 | +int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485); |
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| 235 | +void serial8250_em485_start_tx(struct uart_8250_port *p); |
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| 236 | +void serial8250_em485_stop_tx(struct uart_8250_port *p); |
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| 143 | 237 | void serial8250_em485_destroy(struct uart_8250_port *p); |
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| 238 | + |
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| 239 | +/* MCR <-> TIOCM conversion */ |
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| 240 | +static inline int serial8250_TIOCM_to_MCR(int tiocm) |
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| 241 | +{ |
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| 242 | + int mcr = 0; |
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| 243 | + |
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| 244 | + if (tiocm & TIOCM_RTS) |
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| 245 | + mcr |= UART_MCR_RTS; |
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| 246 | + if (tiocm & TIOCM_DTR) |
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| 247 | + mcr |= UART_MCR_DTR; |
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| 248 | + if (tiocm & TIOCM_OUT1) |
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| 249 | + mcr |= UART_MCR_OUT1; |
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| 250 | + if (tiocm & TIOCM_OUT2) |
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| 251 | + mcr |= UART_MCR_OUT2; |
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| 252 | + if (tiocm & TIOCM_LOOP) |
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| 253 | + mcr |= UART_MCR_LOOP; |
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| 254 | + |
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| 255 | + return mcr; |
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| 256 | +} |
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| 257 | + |
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| 258 | +static inline int serial8250_MCR_to_TIOCM(int mcr) |
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| 259 | +{ |
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| 260 | + int tiocm = 0; |
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| 261 | + |
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| 262 | + if (mcr & UART_MCR_RTS) |
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| 263 | + tiocm |= TIOCM_RTS; |
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| 264 | + if (mcr & UART_MCR_DTR) |
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| 265 | + tiocm |= TIOCM_DTR; |
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| 266 | + if (mcr & UART_MCR_OUT1) |
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| 267 | + tiocm |= TIOCM_OUT1; |
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| 268 | + if (mcr & UART_MCR_OUT2) |
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| 269 | + tiocm |= TIOCM_OUT2; |
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| 270 | + if (mcr & UART_MCR_LOOP) |
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| 271 | + tiocm |= TIOCM_LOOP; |
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| 272 | + |
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| 273 | + return tiocm; |
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| 274 | +} |
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| 275 | + |
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| 276 | +/* MSR <-> TIOCM conversion */ |
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| 277 | +static inline int serial8250_MSR_to_TIOCM(int msr) |
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| 278 | +{ |
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| 279 | + int tiocm = 0; |
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| 280 | + |
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| 281 | + if (msr & UART_MSR_DCD) |
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| 282 | + tiocm |= TIOCM_CAR; |
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| 283 | + if (msr & UART_MSR_RI) |
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| 284 | + tiocm |= TIOCM_RNG; |
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| 285 | + if (msr & UART_MSR_DSR) |
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| 286 | + tiocm |= TIOCM_DSR; |
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| 287 | + if (msr & UART_MSR_CTS) |
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| 288 | + tiocm |= TIOCM_CTS; |
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| 289 | + |
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| 290 | + return tiocm; |
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| 291 | +} |
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| 144 | 292 | |
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| 145 | 293 | static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) |
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| 146 | 294 | { |
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| 147 | 295 | serial_out(up, UART_MCR, value); |
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| 296 | + |
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| 297 | + if (up->gpios) |
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| 298 | + mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value)); |
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| 148 | 299 | } |
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| 149 | 300 | |
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| 150 | 301 | static inline int serial8250_in_MCR(struct uart_8250_port *up) |
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| 151 | 302 | { |
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| 152 | | - return serial_in(up, UART_MCR); |
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| 303 | + int mctrl; |
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| 304 | + |
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| 305 | + mctrl = serial_in(up, UART_MCR); |
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| 306 | + |
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| 307 | + if (up->gpios) { |
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| 308 | + unsigned int mctrl_gpio = 0; |
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| 309 | + |
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| 310 | + mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio); |
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| 311 | + mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio); |
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| 312 | + } |
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| 313 | + |
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| 314 | + return mctrl; |
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| 153 | 315 | } |
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| 154 | 316 | |
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| 155 | 317 | #if defined(__alpha__) && !defined(CONFIG_PCI) |
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| .. | .. |
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| 217 | 379 | #ifdef CONFIG_SERIAL_8250_DMA |
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| 218 | 380 | extern int serial8250_tx_dma(struct uart_8250_port *); |
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| 219 | 381 | extern int serial8250_rx_dma(struct uart_8250_port *); |
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| 382 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 383 | +extern int serial8250_start_rx_dma(struct uart_8250_port *); |
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| 384 | +#endif |
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| 220 | 385 | extern void serial8250_rx_dma_flush(struct uart_8250_port *); |
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| 221 | 386 | extern int serial8250_request_dma(struct uart_8250_port *); |
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| 222 | 387 | extern void serial8250_release_dma(struct uart_8250_port *); |
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| .. | .. |
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| 229 | 394 | { |
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| 230 | 395 | return -1; |
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| 231 | 396 | } |
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| 397 | +#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI) |
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| 398 | +static inline int serial8250_start_rx_dma(struct uart_8250_port *p) |
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| 399 | +{ |
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| 400 | + return -1; |
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| 401 | +} |
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| 402 | +#endif |
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| 232 | 403 | static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } |
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| 233 | 404 | static inline int serial8250_request_dma(struct uart_8250_port *p) |
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| 234 | 405 | { |
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