disable cpu isolcpus

hc

2023-12-09 958e46acc8e900e8569dd467c1af9b8d2d019394

 kernel/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
..
..
@@ -2,7 +2,9 @@
2
2
 // Copyright (c) 2016-2017 Hisilicon Limited.
3
3
 
4
4
 #include "hclge_main.h"
5
+#include "hclge_dcb.h"
5
6
 #include "hclge_tm.h"
7
+#include "hclge_dcb.h"
6
8
 #include "hnae3.h"
7
9
 
8
10
 #define BW_PERCENT	100
..
..
@@ -35,7 +37,9 @@
35
37
 		}
36
38
 	}
37
39
 
38
-	return hclge_tm_prio_tc_info_update(hdev, ets->prio_tc);
40
+	hclge_tm_prio_tc_info_update(hdev, ets->prio_tc);
41
+
42
+	return 0;
39
43
 }
40
44
 
41
45
 static void hclge_tm_info_to_ieee_ets(struct hclge_dev *hdev,
..
..
@@ -70,25 +74,59 @@
70
74
 	return 0;
71
75
 }
72
76
 
77
+static int hclge_dcb_common_validate(struct hclge_dev *hdev, u8 num_tc,
78
+				     u8 *prio_tc)
79
+{
80
+	int i;
81
+
82
+	if (num_tc > hdev->tc_max) {
83
+		dev_err(&hdev->pdev->dev,
84
+			"tc num checking failed, %u > tc_max(%u)\n",
85
+			num_tc, hdev->tc_max);
86
+		return -EINVAL;
87
+	}
88
+
89
+	for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
90
+		if (prio_tc[i] >= num_tc) {
91
+			dev_err(&hdev->pdev->dev,
92
+				"prio_tc[%d] checking failed, %u >= num_tc(%u)\n",
93
+				i, prio_tc[i], num_tc);
94
+			return -EINVAL;
95
+		}
96
+	}
97
+
98
+	if (num_tc > hdev->vport[0].alloc_tqps) {
99
+		dev_err(&hdev->pdev->dev,
100
+			"allocated tqp checking failed, %u > tqp(%u)\n",
101
+			num_tc, hdev->vport[0].alloc_tqps);
102
+		return -EINVAL;
103
+	}
104
+
105
+	return 0;
106
+}
107
+
73
108
 static int hclge_ets_validate(struct hclge_dev *hdev, struct ieee_ets *ets,
74
109
 			      u8 *tc, bool *changed)
75
110
 {
76
111
 	bool has_ets_tc = false;
77
112
 	u32 total_ets_bw = 0;
78
113
 	u8 max_tc = 0;
114
+	int ret;
79
115
 	u8 i;
80
116
 
81
-	for (i = 0; i < HNAE3_MAX_TC; i++) {
82
-		if (ets->prio_tc[i] >= hdev->tc_max ||
83
-		    i >= hdev->tc_max)
84
-			return -EINVAL;
85
-
117
+	for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
86
118
 		if (ets->prio_tc[i] != hdev->tm_info.prio_tc[i])
87
119
 			*changed = true;
88
120
 
89
121
 		if (ets->prio_tc[i] > max_tc)
90
122
 			max_tc = ets->prio_tc[i];
123
+	}
91
124
 
125
+	ret = hclge_dcb_common_validate(hdev, max_tc + 1, ets->prio_tc);
126
+	if (ret)
127
+		return ret;
128
+
129
+	for (i = 0; i < HNAE3_MAX_TC; i++) {
92
130
 		switch (ets->tc_tsa[i]) {
93
131
 		case IEEE_8021QAZ_TSA_STRICT:
94
132
 			if (hdev->tm_info.tc_info[i].tc_sch_mode !=
..
..
@@ -127,21 +165,15 @@
127
165
 	return 0;
128
166
 }
129
167
 
130
-static int hclge_map_update(struct hnae3_handle *h)
168
+static int hclge_map_update(struct hclge_dev *hdev)
131
169
 {
132
-	struct hclge_vport *vport = hclge_get_vport(h);
133
-	struct hclge_dev *hdev = vport->back;
134
170
 	int ret;
135
171
 
136
-	ret = hclge_tm_map_cfg(hdev);
172
+	ret = hclge_tm_schd_setup_hw(hdev);
137
173
 	if (ret)
138
174
 		return ret;
139
175
 
140
-	ret = hclge_tm_schd_mode_hw(hdev);
141
-	if (ret)
142
-		return ret;
143
-
144
-	ret = hclge_pause_setup_hw(hdev);
176
+	ret = hclge_pause_setup_hw(hdev, false);
145
177
 	if (ret)
146
178
 		return ret;
147
179
 
..
..
@@ -177,9 +209,32 @@
177
209
 	return 0;
178
210
 }
179
211
 
212
+static int hclge_notify_down_uinit(struct hclge_dev *hdev)
213
+{
214
+	int ret;
215
+
216
+	ret = hclge_notify_client(hdev, HNAE3_DOWN_CLIENT);
217
+	if (ret)
218
+		return ret;
219
+
220
+	return hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT);
221
+}
222
+
223
+static int hclge_notify_init_up(struct hclge_dev *hdev)
224
+{
225
+	int ret;
226
+
227
+	ret = hclge_notify_client(hdev, HNAE3_INIT_CLIENT);
228
+	if (ret)
229
+		return ret;
230
+
231
+	return hclge_notify_client(hdev, HNAE3_UP_CLIENT);
232
+}
233
+
180
234
 static int hclge_ieee_setets(struct hnae3_handle *h, struct ieee_ets *ets)
181
235
 {
182
236
 	struct hclge_vport *vport = hclge_get_vport(h);
237
+	struct net_device *netdev = h->kinfo.netdev;
183
238
 	struct hclge_dev *hdev = vport->back;
184
239
 	bool map_changed = false;
185
240
 	u8 num_tc = 0;
..
..
@@ -193,19 +248,47 @@
193
248
 	if (ret)
194
249
 		return ret;
195
250
 
251
+	if (map_changed) {
252
+		netif_dbg(h, drv, netdev, "set ets\n");
253
+
254
+		ret = hclge_notify_down_uinit(hdev);
255
+		if (ret)
256
+			return ret;
257
+	}
258
+
196
259
 	hclge_tm_schd_info_update(hdev, num_tc);
260
+	if (num_tc > 1)
261
+		hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
262
+	else
263
+		hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
197
264
 
198
265
 	ret = hclge_ieee_ets_to_tm_info(hdev, ets);
199
266
 	if (ret)
200
-		return ret;
267
+		goto err_out;
201
268
 
202
269
 	if (map_changed) {
270
+		ret = hclge_map_update(hdev);
271
+		if (ret)
272
+			goto err_out;
273
+
203
274
 		ret = hclge_client_setup_tc(hdev);
275
+		if (ret)
276
+			goto err_out;
277
+
278
+		ret = hclge_notify_init_up(hdev);
204
279
 		if (ret)
205
280
 			return ret;
206
281
 	}
207
282
 
208
283
 	return hclge_tm_dwrr_cfg(hdev);
284
+
285
+err_out:
286
+	if (!map_changed)
287
+		return ret;
288
+
289
+	hclge_notify_init_up(hdev);
290
+
291
+	return ret;
209
292
 }
210
293
 
211
294
 static int hclge_ieee_getpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
..
..
@@ -238,11 +321,12 @@
238
321
 static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
239
322
 {
240
323
 	struct hclge_vport *vport = hclge_get_vport(h);
324
+	struct net_device *netdev = h->kinfo.netdev;
241
325
 	struct hclge_dev *hdev = vport->back;
242
326
 	u8 i, j, pfc_map, *prio_tc;
327
+	int ret;
243
328
 
244
-	if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
245
-	    hdev->flag & HCLGE_FLAG_MQPRIO_ENABLE)
329
+	if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
246
330
 		return -EINVAL;
247
331
 
248
332
 	if (pfc->pfc_en == hdev->tm_info.pfc_en)
..
..
@@ -263,7 +347,27 @@
263
347
 	hdev->tm_info.hw_pfc_map = pfc_map;
264
348
 	hdev->tm_info.pfc_en = pfc->pfc_en;
265
349
 
266
-	return hclge_pause_setup_hw(hdev);
350
+	netif_dbg(h, drv, netdev,
351
+		  "set pfc: pfc_en=%x, pfc_map=%x, num_tc=%u\n",
352
+		  pfc->pfc_en, pfc_map, hdev->tm_info.num_tc);
353
+
354
+	hclge_tm_pfc_info_update(hdev);
355
+
356
+	ret = hclge_pause_setup_hw(hdev, false);
357
+	if (ret)
358
+		return ret;
359
+
360
+	ret = hclge_notify_client(hdev, HNAE3_DOWN_CLIENT);
361
+	if (ret)
362
+		return ret;
363
+
364
+	ret = hclge_buffer_alloc(hdev);
365
+	if (ret) {
366
+		hclge_notify_client(hdev, HNAE3_UP_CLIENT);
367
+		return ret;
368
+	}
369
+
370
+	return hclge_notify_client(hdev, HNAE3_UP_CLIENT);
267
371
 }
268
372
 
269
373
 /* DCBX configuration */
..
..
@@ -281,7 +385,10 @@
281
385
 static u8 hclge_setdcbx(struct hnae3_handle *h, u8 mode)
282
386
 {
283
387
 	struct hclge_vport *vport = hclge_get_vport(h);
388
+	struct net_device *netdev = h->kinfo.netdev;
284
389
 	struct hclge_dev *hdev = vport->back;
390
+
391
+	netif_dbg(h, drv, netdev, "set dcbx: mode=%u\n", mode);
285
392
 
286
393
 	/* No support for LLD_MANAGED modes or CEE */
287
394
 	if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
..
..
@@ -304,22 +411,24 @@
304
411
 	if (hdev->flag & HCLGE_FLAG_DCB_ENABLE)
305
412
 		return -EINVAL;
306
413
 
307
-	if (tc > hdev->tc_max) {
308
-		dev_err(&hdev->pdev->dev,
309
-			"setup tc failed, tc(%u) > tc_max(%u)\n",
310
-			tc, hdev->tc_max);
414
+	ret = hclge_dcb_common_validate(hdev, tc, prio_tc);
415
+	if (ret)
311
416
 		return -EINVAL;
312
-	}
417
+
418
+	ret = hclge_notify_down_uinit(hdev);
419
+	if (ret)
420
+		return ret;
313
421
 
314
422
 	hclge_tm_schd_info_update(hdev, tc);
423
+	hclge_tm_prio_tc_info_update(hdev, prio_tc);
315
424
 
316
-	ret = hclge_tm_prio_tc_info_update(hdev, prio_tc);
425
+	ret = hclge_tm_init_hw(hdev, false);
317
426
 	if (ret)
318
-		return ret;
427
+		goto err_out;
319
428
 
320
-	ret = hclge_tm_init_hw(hdev);
429
+	ret = hclge_client_setup_tc(hdev);
321
430
 	if (ret)
322
-		return ret;
431
+		goto err_out;
323
432
 
324
433
 	hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
325
434
 
..
..
@@ -328,7 +437,12 @@
328
437
 	else
329
438
 		hdev->flag &= ~HCLGE_FLAG_MQPRIO_ENABLE;
330
439
 
331
-	return 0;
440
+	return hclge_notify_init_up(hdev);
441
+
442
+err_out:
443
+	hclge_notify_init_up(hdev);
444
+
445
+	return ret;
332
446
 }
333
447
 
334
448
 static const struct hnae3_dcb_ops hns3_dcb_ops = {
..
..
@@ -338,7 +452,6 @@
338
452
 	.ieee_setpfc	= hclge_ieee_setpfc,
339
453
 	.getdcbx	= hclge_getdcbx,
340
454
 	.setdcbx	= hclge_setdcbx,
341
-	.map_update	= hclge_map_update,
342
455
 	.setup_tc	= hclge_setup_tc,
343
456
 };
344
457