disable cpu isolcpus

hc

2023-12-09 958e46acc8e900e8569dd467c1af9b8d2d019394

 kernel/arch/sparc/include/asm/atomic_64.h
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@@ -12,7 +12,6 @@
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 #include <asm/cmpxchg.h>
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 #include <asm/barrier.h>
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-#define ATOMIC_INIT(i)		{ (i) }
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 #define ATOMIC64_INIT(i)	{ (i) }
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 #define atomic_read(v)		READ_ONCE((v)->counter)
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@@ -23,15 +22,15 @@
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 #define ATOMIC_OP(op)							\
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 void atomic_##op(int, atomic_t *);					\
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-void atomic64_##op(long, atomic64_t *);
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+void atomic64_##op(s64, atomic64_t *);
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 #define ATOMIC_OP_RETURN(op)						\
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 int atomic_##op##_return(int, atomic_t *);				\
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-long atomic64_##op##_return(long, atomic64_t *);
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+s64 atomic64_##op##_return(s64, atomic64_t *);
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 #define ATOMIC_FETCH_OP(op)						\
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 int atomic_fetch_##op(int, atomic_t *);					\
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-long atomic64_fetch_##op(long, atomic64_t *);
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+s64 atomic64_fetch_##op(s64, atomic64_t *);
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 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
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@@ -61,7 +60,7 @@
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 	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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-long atomic64_dec_if_positive(atomic64_t *v);
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+s64 atomic64_dec_if_positive(atomic64_t *v);
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 #define atomic64_dec_if_positive atomic64_dec_if_positive
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 #endif /* !(__ARCH_SPARC64_ATOMIC__) */