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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Corenet based SoC DS Setup |
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| 3 | 4 | * |
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| 4 | 5 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) |
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| 5 | 6 | * |
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| 6 | 7 | * Copyright 2009-2011 Freescale Semiconductor Inc. |
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| 7 | | - * |
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| 8 | | - * This program is free software; you can redistribute it and/or modify it |
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| 9 | | - * under the terms of the GNU General Public License as published by the |
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| 10 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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| 11 | | - * option) any later version. |
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| 12 | 8 | */ |
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| 13 | 9 | |
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| 14 | 10 | #include <linux/kernel.h> |
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| .. | .. |
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| 16 | 12 | #include <linux/kdev_t.h> |
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| 17 | 13 | #include <linux/delay.h> |
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| 18 | 14 | #include <linux/interrupt.h> |
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| 15 | +#include <linux/pgtable.h> |
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| 19 | 16 | |
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| 20 | 17 | #include <asm/time.h> |
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| 21 | 18 | #include <asm/machdep.h> |
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| 22 | 19 | #include <asm/pci-bridge.h> |
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| 23 | | -#include <asm/pgtable.h> |
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| 24 | 20 | #include <asm/ppc-pci.h> |
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| 25 | 21 | #include <mm/mmu_decl.h> |
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| 26 | 22 | #include <asm/prom.h> |
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| 27 | 23 | #include <asm/udbg.h> |
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| 28 | 24 | #include <asm/mpic.h> |
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| 29 | 25 | #include <asm/ehv_pic.h> |
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| 30 | | -#include <soc/fsl/qe/qe_ic.h> |
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| 26 | +#include <asm/swiotlb.h> |
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| 31 | 27 | |
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| 32 | 28 | #include <linux/of_platform.h> |
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| 33 | 29 | #include <sysdev/fsl_soc.h> |
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| .. | .. |
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| 41 | 37 | unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | |
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| 42 | 38 | MPIC_NO_RESET; |
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| 43 | 39 | |
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| 44 | | - struct device_node *np; |
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| 45 | | - |
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| 46 | 40 | if (ppc_md.get_irq == mpic_get_coreint_irq) |
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| 47 | 41 | flags |= MPIC_ENABLE_COREINT; |
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| 48 | 42 | |
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| .. | .. |
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| 50 | 44 | BUG_ON(mpic == NULL); |
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| 51 | 45 | |
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| 52 | 46 | mpic_init(mpic); |
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| 53 | | - |
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| 54 | | - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); |
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| 55 | | - if (np) { |
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| 56 | | - qe_ic_init(np, 0, qe_ic_cascade_low_mpic, |
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| 57 | | - qe_ic_cascade_high_mpic); |
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| 58 | | - of_node_put(np); |
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| 59 | | - } |
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| 60 | 47 | } |
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| 61 | 48 | |
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| 62 | 49 | /* |
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| .. | .. |
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| 68 | 55 | |
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| 69 | 56 | swiotlb_detect_4g(); |
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| 70 | 57 | |
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| 71 | | -#if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32) |
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| 72 | | - /* |
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| 73 | | - * Inbound windows don't cover the full lower 4 GiB |
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| 74 | | - * due to conflicts with PCICSRBAR and outbound windows, |
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| 75 | | - * so limit the DMA32 zone to 2 GiB, to allow consistent |
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| 76 | | - * allocations to succeed. |
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| 77 | | - */ |
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| 78 | | - limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT)); |
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| 79 | | -#endif |
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| 80 | | - |
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| 81 | 58 | pr_info("%s board\n", ppc_md.name); |
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| 82 | | - |
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| 83 | | - mpc85xx_qe_init(); |
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| 84 | 59 | } |
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| 85 | 60 | |
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| 86 | 61 | static const struct of_device_id of_device_ids[] = { |
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| .. | .. |
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| 233 | 208 | }; |
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| 234 | 209 | |
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| 235 | 210 | machine_arch_initcall(corenet_generic, corenet_gen_publish_devices); |
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| 236 | | - |
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| 237 | | -#ifdef CONFIG_SWIOTLB |
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| 238 | | -machine_arch_initcall(corenet_generic, swiotlb_setup_bus_notifier); |
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| 239 | | -#endif |
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