forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87
kernel/drivers/tty/serial/pch_uart.c
....@@ -2,9 +2,6 @@
22 /*
33 *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
44 */
5
-#if defined(CONFIG_SERIAL_PCH_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
6
-#define SUPPORT_SYSRQ
7
-#endif
85 #include <linux/kernel.h>
96 #include <linux/serial_reg.h>
107 #include <linux/slab.h>
....@@ -313,32 +310,32 @@
313310 if (!buf)
314311 return 0;
315312
316
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
313
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
317314 "PCH EG20T port[%d] regs:\n", priv->port.line);
318315
319
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
316
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
320317 "=================================\n");
321
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
318
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
322319 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
323
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
320
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
324321 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
325
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
322
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
326323 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
327
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
324
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
328325 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
329
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
326
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
330327 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
331
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
328
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
332329 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
333
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
330
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
334331 "BRCSR: \t0x%02x\n",
335332 ioread8(priv->membase + PCH_UART_BRCSR));
336333
337334 lcr = ioread8(priv->membase + UART_LCR);
338335 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
339
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
336
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
340337 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL));
341
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
338
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
342339 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM));
343340 iowrite8(lcr, priv->membase + UART_LCR);
344341
....@@ -587,12 +584,8 @@
587584 if (uart_handle_break(port))
588585 continue;
589586 }
590
-#ifdef SUPPORT_SYSRQ
591
- if (port->sysrq) {
592
- if (uart_handle_sysrq_char(port, rbr))
593
- continue;
594
- }
595
-#endif
587
+ if (uart_handle_sysrq_char(port, rbr))
588
+ continue;
596589
597590 buf[i++] = rbr;
598591 }
....@@ -633,22 +626,6 @@
633626 tty_flip_buffer_push(tport);
634627
635628 return 0;
636
-}
637
-
638
-static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf)
639
-{
640
- int ret = 0;
641
- struct uart_port *port = &priv->port;
642
-
643
- if (port->x_char) {
644
- dev_dbg(priv->port.dev, "%s:X character send %02x (%lu)\n",
645
- __func__, port->x_char, jiffies);
646
- buf[0] = port->x_char;
647
- port->x_char = 0;
648
- ret = 1;
649
- }
650
-
651
- return ret;
652629 }
653630
654631 static int dma_push_rx(struct eg20t_port *priv, int size)
....@@ -900,9 +877,10 @@
900877
901878 fifo_size = max(priv->fifo_size, 1);
902879 tx_empty = 1;
903
- if (pop_tx_x(priv, xmit->buf)) {
904
- pch_uart_hal_write(priv, xmit->buf, 1);
880
+ if (port->x_char) {
881
+ pch_uart_hal_write(priv, &port->x_char, 1);
905882 port->icount.tx++;
883
+ port->x_char = 0;
906884 tx_empty = 0;
907885 fifo_size--;
908886 }
....@@ -933,7 +911,6 @@
933911 struct scatterlist *sg;
934912 int nent;
935913 int fifo_size;
936
- int tx_empty;
937914 struct dma_async_tx_descriptor *desc;
938915 int num;
939916 int i;
....@@ -958,11 +935,11 @@
958935 }
959936
960937 fifo_size = max(priv->fifo_size, 1);
961
- tx_empty = 1;
962
- if (pop_tx_x(priv, xmit->buf)) {
963
- pch_uart_hal_write(priv, xmit->buf, 1);
938
+
939
+ if (port->x_char) {
940
+ pch_uart_hal_write(priv, &port->x_char, 1);
964941 port->icount.tx++;
965
- tx_empty = 0;
942
+ port->x_char = 0;
966943 fifo_size--;
967944 }
968945
....@@ -991,7 +968,7 @@
991968
992969 priv->tx_dma_use = 1;
993970
994
- priv->sg_tx_p = kcalloc(num, sizeof(struct scatterlist), GFP_ATOMIC);
971
+ priv->sg_tx_p = kmalloc_array(num, sizeof(struct scatterlist), GFP_ATOMIC);
995972 if (!priv->sg_tx_p) {
996973 dev_err(priv->port.dev, "%s:kzalloc Failed\n", __func__);
997974 return 0;
....@@ -1799,6 +1776,7 @@
17991776 priv->port.flags = UPF_BOOT_AUTOCONF;
18001777 priv->port.fifosize = fifosize;
18011778 priv->port.line = board->line_no;
1779
+ priv->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PCH_UART_CONSOLE);
18021780 priv->trigger = PCH_UART_HAL_TRIGGER_M;
18031781
18041782 snprintf(priv->irq_name, IRQ_NAME_SIZE,
....@@ -1866,41 +1844,24 @@
18661844 kfree(priv);
18671845 return;
18681846 }
1869
-#ifdef CONFIG_PM
1870
-static int pch_uart_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1847
+
1848
+static int __maybe_unused pch_uart_pci_suspend(struct device *dev)
18711849 {
1872
- struct eg20t_port *priv = pci_get_drvdata(pdev);
1850
+ struct eg20t_port *priv = dev_get_drvdata(dev);
18731851
18741852 uart_suspend_port(&pch_uart_driver, &priv->port);
18751853
1876
- pci_save_state(pdev);
1877
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
18781854 return 0;
18791855 }
18801856
1881
-static int pch_uart_pci_resume(struct pci_dev *pdev)
1857
+static int __maybe_unused pch_uart_pci_resume(struct device *dev)
18821858 {
1883
- struct eg20t_port *priv = pci_get_drvdata(pdev);
1884
- int ret;
1885
-
1886
- pci_set_power_state(pdev, PCI_D0);
1887
- pci_restore_state(pdev);
1888
-
1889
- ret = pci_enable_device(pdev);
1890
- if (ret) {
1891
- dev_err(&pdev->dev,
1892
- "%s-pci_enable_device failed(ret=%d) ", __func__, ret);
1893
- return ret;
1894
- }
1859
+ struct eg20t_port *priv = dev_get_drvdata(dev);
18951860
18961861 uart_resume_port(&pch_uart_driver, &priv->port);
18971862
18981863 return 0;
18991864 }
1900
-#else
1901
-#define pch_uart_pci_suspend NULL
1902
-#define pch_uart_pci_resume NULL
1903
-#endif
19041865
19051866 static const struct pci_device_id pch_uart_pci_id[] = {
19061867 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8811),
....@@ -1954,13 +1915,16 @@
19541915 return ret;
19551916 }
19561917
1918
+static SIMPLE_DEV_PM_OPS(pch_uart_pci_pm_ops,
1919
+ pch_uart_pci_suspend,
1920
+ pch_uart_pci_resume);
1921
+
19571922 static struct pci_driver pch_uart_pci_driver = {
19581923 .name = "pch_uart",
19591924 .id_table = pch_uart_pci_id,
19601925 .probe = pch_uart_pci_probe,
19611926 .remove = pch_uart_pci_remove,
1962
- .suspend = pch_uart_pci_suspend,
1963
- .resume = pch_uart_pci_resume,
1927
+ .driver.pm = &pch_uart_pci_pm_ops,
19641928 };
19651929
19661930 static int __init pch_uart_module_init(void)