forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/drivers/tty/serial/8250/8250_port.c
....@@ -11,15 +11,12 @@
1111  *  membase is an 'ioremapped' cookie.
1212  */
1313 
14
-#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15
-#define SUPPORT_SYSRQ
16
-#endif
17
-
1814 #include <linux/module.h>
1915 #include <linux/moduleparam.h>
2016 #include <linux/ioport.h>
2117 #include <linux/init.h>
2218 #include <linux/console.h>
19
+#include <linux/gpio/consumer.h>
2320 #include <linux/sysrq.h>
2421 #include <linux/delay.h>
2522 #include <linux/platform_device.h>
....@@ -31,7 +28,6 @@
3128 #include <linux/nmi.h>
3229 #include <linux/mutex.h>
3330 #include <linux/slab.h>
34
-#include <linux/kdb.h>
3531 #include <linux/uaccess.h>
3632 #include <linux/pm_runtime.h>
3733 #include <linux/ktime.h>
....@@ -40,13 +36,6 @@
4036 #include <asm/irq.h>
4137 
4238 #include "8250.h"
43
-
44
-/*
45
- * These are definitions for the Exar XR17V35X and XR17(C|D)15X
46
- */
47
-#define UART_EXAR_INT0		0x80
48
-#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
49
-#define UART_EXAR_DVID		0x8d	/* Device identification */
5039 
5140 /* Nuvoton NPCM timeout register */
5241 #define UART_NPCM_TOR          7
....@@ -67,6 +56,7 @@
6756  * Here we define the default xmit fifo size used for each type of UART.
6857  */
6958 static const struct serial8250_config uart_config[] = {
59
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
7060 	[PORT_UNKNOWN] = {
7161 		.name		= "unknown",
7262 		.fifo_size	= 1,
....@@ -87,6 +77,7 @@
8777 		.fifo_size	= 1,
8878 		.tx_loadsz	= 1,
8979 	},
80
+#endif
9081 	[PORT_16550A] = {
9182 		.name		= "16550A",
9283 		.fifo_size	= 16,
....@@ -95,6 +86,7 @@
9586 		.rxtrig_bytes	= {1, 4, 8, 14},
9687 		.flags		= UART_CAP_FIFO,
9788 	},
89
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
9890 	[PORT_CIRRUS] = {
9991 		.name		= "Cirrus",
10092 		.fifo_size	= 1,
....@@ -310,6 +302,15 @@
310302 		.rxtrig_bytes	= {1, 4, 8, 14},
311303 		.flags		= UART_CAP_FIFO,
312304 	},
305
+	[PORT_SUNIX] = {
306
+		.name		= "Sunix",
307
+		.fifo_size	= 128,
308
+		.tx_loadsz	= 128,
309
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
310
+		.rxtrig_bytes	= {1, 32, 64, 112},
311
+		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
312
+	},
313
+#endif
313314 };
314315 
315316 /* Uart divisor latch read */
....@@ -387,6 +388,7 @@
387388 
388389 #endif
389390 
391
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
390392 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
391393 {
392394 	offset = offset << p->regshift;
....@@ -460,6 +462,7 @@
460462 	offset = offset << p->regshift;
461463 	outb(value, p->iobase + offset);
462464 }
465
+#endif
463466 
464467 static int serial8250_default_handle_irq(struct uart_port *port);
465468 
....@@ -470,6 +473,7 @@
470473 	up->dl_read = default_serial_dl_read;
471474 	up->dl_write = default_serial_dl_write;
472475 
476
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
473477 	switch (p->iotype) {
474478 	case UPIO_HUB6:
475479 		p->serial_in = hub6_serial_in;
....@@ -510,6 +514,7 @@
510514 		p->serial_out = io_serial_out;
511515 		break;
512516 	}
517
+#endif
513518 	/* Remember loaded iotype */
514519 	up->cur_iotype = p->iotype;
515520 	p->handle_irq = serial8250_default_handle_irq;
....@@ -533,27 +538,6 @@
533538 }
534539 
535540 /*
536
- * For the 16C950
537
- */
538
-static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
539
-{
540
-	serial_out(up, UART_SCR, offset);
541
-	serial_out(up, UART_ICR, value);
542
-}
543
-
544
-static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
545
-{
546
-	unsigned int value;
547
-
548
-	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
549
-	serial_out(up, UART_SCR, offset);
550
-	value = serial_in(up, UART_ICR);
551
-	serial_icr_write(up, UART_ACR, up->acr);
552
-
553
-	return value;
554
-}
555
-
556
-/*
557541  * FIFO support.
558542  */
559543 static void serial8250_clear_fifos(struct uart_8250_port *p)
....@@ -564,17 +548,6 @@
564548 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
565549 		serial_out(p, UART_FCR, 0);
566550 	}
567
-}
568
-
569
-static inline void serial8250_em485_rts_after_send(struct uart_8250_port *p)
570
-{
571
-	unsigned char mcr = serial8250_in_MCR(p);
572
-
573
-	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
574
-		mcr |= UART_MCR_RTS;
575
-	else
576
-		mcr &= ~UART_MCR_RTS;
577
-	serial8250_out_MCR(p, mcr);
578551 }
579552 
580553 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t);
....@@ -624,10 +597,10 @@
624597  *
625598  *	Return 0 - success, -errno - otherwise
626599  */
627
-int serial8250_em485_init(struct uart_8250_port *p)
600
+static int serial8250_em485_init(struct uart_8250_port *p)
628601 {
629602 	if (p->em485)
630
-		return 0;
603
+		goto deassert_rts;
631604 
632605 	p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC);
633606 	if (!p->em485)
....@@ -641,11 +614,14 @@
641614 	p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx;
642615 	p->em485->port = p;
643616 	p->em485->active_timer = NULL;
644
-	serial8250_em485_rts_after_send(p);
617
+	p->em485->tx_stopped = true;
618
+
619
+deassert_rts:
620
+	if (p->em485->tx_stopped)
621
+		p->rs485_stop_tx(p);
645622 
646623 	return 0;
647624 }
648
-EXPORT_SYMBOL_GPL(serial8250_em485_init);
649625 
650626 /**
651627  *	serial8250_em485_destroy() - put uart_8250_port into normal state
....@@ -672,6 +648,41 @@
672648 	p->em485 = NULL;
673649 }
674650 EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
651
+
652
+/**
653
+ * serial8250_em485_config() - generic ->rs485_config() callback
654
+ * @port: uart port
655
+ * @rs485: rs485 settings
656
+ *
657
+ * Generic callback usable by 8250 uart drivers to activate rs485 settings
658
+ * if the uart is incapable of driving RTS as a Transmit Enable signal in
659
+ * hardware, relying on software emulation instead.
660
+ */
661
+int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485)
662
+{
663
+	struct uart_8250_port *up = up_to_u8250p(port);
664
+
665
+	/* pick sane settings if the user hasn't */
666
+	if (!!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
667
+	    !!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
668
+		rs485->flags |= SER_RS485_RTS_ON_SEND;
669
+		rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
670
+	}
671
+
672
+	gpiod_set_value(port->rs485_term_gpio,
673
+			rs485->flags & SER_RS485_TERMINATE_BUS);
674
+
675
+	/*
676
+	 * Both serial8250_em485_init() and serial8250_em485_destroy()
677
+	 * are idempotent.
678
+	 */
679
+	if (rs485->flags & SER_RS485_ENABLED)
680
+		return serial8250_em485_init(up);
681
+
682
+	serial8250_em485_destroy(up);
683
+	return 0;
684
+}
685
+EXPORT_SYMBOL_GPL(serial8250_em485_config);
675686 
676687 /*
677688  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
....@@ -715,19 +726,8 @@
715726 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
716727 {
717728 	unsigned char lcr = 0, efr = 0;
718
-	/*
719
-	 * Exar UARTs have a SLEEP register that enables or disables
720
-	 * each UART to enter sleep mode separately.  On the XR17V35x the
721
-	 * register is accessible to each UART at the UART_EXAR_SLEEP
722
-	 * offset but the UART channel may only write to the corresponding
723
-	 * bit.
724
-	 */
729
+
725730 	serial8250_rpm_get(p);
726
-	if ((p->port.type == PORT_XR17V35X) ||
727
-	   (p->port.type == PORT_XR17D15X)) {
728
-		serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
729
-		goto out;
730
-	}
731731 
732732 	if (p->capabilities & UART_CAP_SLEEP) {
733733 		if (p->capabilities & UART_CAP_EFR) {
....@@ -737,14 +737,14 @@
737737 			serial_out(p, UART_EFR, UART_EFR_ECB);
738738 			serial_out(p, UART_LCR, 0);
739739 		}
740
-		serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
740
+		serial8250_set_IER(p, sleep ? UART_IERX_SLEEP : 0);
741741 		if (p->capabilities & UART_CAP_EFR) {
742742 			serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
743743 			serial_out(p, UART_EFR, efr);
744744 			serial_out(p, UART_LCR, lcr);
745745 		}
746746 	}
747
-out:
747
+
748748 	serial8250_rpm_put(p);
749749 }
750750 
....@@ -1017,26 +1017,8 @@
10171017 	up->port.type = PORT_16550A;
10181018 	up->capabilities |= UART_CAP_FIFO;
10191019 
1020
-	/*
1021
-	 * XR17V35x UARTs have an extra divisor register, DLD
1022
-	 * that gets enabled with when DLAB is set which will
1023
-	 * cause the device to incorrectly match and assign
1024
-	 * port type to PORT_16650.  The EFR for this UART is
1025
-	 * found at offset 0x09. Instead check the Deice ID (DVID)
1026
-	 * register for a 2, 4 or 8 port UART.
1027
-	 */
1028
-	if (up->port.flags & UPF_EXAR_EFR) {
1029
-		status1 = serial_in(up, UART_EXAR_DVID);
1030
-		if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
1031
-			DEBUG_AUTOCONF("Exar XR17V35x ");
1032
-			up->port.type = PORT_XR17V35X;
1033
-			up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1034
-						UART_CAP_SLEEP;
1035
-
1036
-			return;
1037
-		}
1038
-
1039
-	}
1020
+	if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS))
1021
+		return;
10401022 
10411023 	/*
10421024 	 * Check for presence of the EFR when DLAB is set.
....@@ -1175,18 +1157,6 @@
11751157 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
11761158 	}
11771159 	serial_out(up, UART_IER, iersave);
1178
-
1179
-	/*
1180
-	 * Exar uarts have EFR in a weird location
1181
-	 */
1182
-	if (up->port.flags & UPF_EXAR_EFR) {
1183
-		DEBUG_AUTOCONF("Exar XR17D15x ");
1184
-		up->port.type = PORT_XR17D15X;
1185
-		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1186
-				    UART_CAP_SLEEP;
1187
-
1188
-		return;
1189
-	}
11901160 
11911161 	/*
11921162 	 * We distinguish between 16550A and U6 16550A by counting
....@@ -1370,8 +1340,8 @@
13701340 		fintek_8250_probe(up);
13711341 
13721342 	if (up->capabilities != old_capabilities) {
1373
-		pr_warn("%s: detected caps %08x should be %08x\n",
1374
-			port->name, old_capabilities, up->capabilities);
1343
+		dev_warn(port->dev, "detected caps %08x should be %08x\n",
1344
+			 old_capabilities, up->capabilities);
13751345 	}
13761346 out:
13771347 	DEBUG_AUTOCONF("iir=%d ", scratch);
....@@ -1441,14 +1411,26 @@
14411411 
14421412 	up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
14431413 	up->port.read_status_mask &= ~UART_LSR_DR;
1444
-	serial_port_out(port, UART_IER, up->ier);
1414
+	serial8250_set_IER(up, up->ier);
14451415 
14461416 	serial8250_rpm_put(up);
14471417 }
14481418 
1449
-static void __do_stop_tx_rs485(struct uart_8250_port *p)
1419
+/**
1420
+ * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1421
+ * @p: uart 8250 port
1422
+ *
1423
+ * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1424
+ */
1425
+void serial8250_em485_stop_tx(struct uart_8250_port *p)
14501426 {
1451
-	serial8250_em485_rts_after_send(p);
1427
+	unsigned char mcr = serial8250_in_MCR(p);
1428
+
1429
+	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
1430
+		mcr |= UART_MCR_RTS;
1431
+	else
1432
+		mcr &= ~UART_MCR_RTS;
1433
+	serial8250_out_MCR(p, mcr);
14521434 
14531435 	/*
14541436 	 * Empty the RX FIFO, we are not interested in anything
....@@ -1459,9 +1441,11 @@
14591441 		serial8250_clear_and_reinit_fifos(p);
14601442 
14611443 		p->ier |= UART_IER_RLSI | UART_IER_RDI;
1462
-		serial_port_out(&p->port, UART_IER, p->ier);
1444
+		serial8250_set_IER(p, p->ier);
14631445 	}
14641446 }
1447
+EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
1448
+
14651449 static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
14661450 {
14671451 	struct uart_8250_em485 *em485;
....@@ -1474,8 +1458,9 @@
14741458 	serial8250_rpm_get(p);
14751459 	spin_lock_irqsave(&p->port.lock, flags);
14761460 	if (em485->active_timer == &em485->stop_tx_timer) {
1477
-		__do_stop_tx_rs485(p);
1461
+		p->rs485_stop_tx(p);
14781462 		em485->active_timer = NULL;
1463
+		em485->tx_stopped = true;
14791464 	}
14801465 	spin_unlock_irqrestore(&p->port.lock, flags);
14811466 	serial8250_rpm_put(p);
....@@ -1496,7 +1481,7 @@
14961481 	struct uart_8250_em485 *em485 = p->em485;
14971482 
14981483 	/*
1499
-	 * __do_stop_tx_rs485 is going to set RTS according to config
1484
+	 * rs485_stop_tx() is going to set RTS according to config
15001485 	 * AND flush RX FIFO if required.
15011486 	 */
15021487 	if (p->port.rs485.delay_rts_after_send > 0) {
....@@ -1504,20 +1489,16 @@
15041489 		start_hrtimer_ms(&em485->stop_tx_timer,
15051490 				   p->port.rs485.delay_rts_after_send);
15061491 	} else {
1507
-		__do_stop_tx_rs485(p);
1492
+		p->rs485_stop_tx(p);
1493
+		em485->active_timer = NULL;
1494
+		em485->tx_stopped = true;
15081495 	}
15091496 }
15101497 
15111498 static inline void __do_stop_tx(struct uart_8250_port *p)
15121499 {
1513
-	if (p->ier & UART_IER_THRI) {
1514
-		p->ier &= ~UART_IER_THRI;
1515
-#ifdef CONFIG_ARCH_ROCKCHIP
1516
-		p->ier &= ~UART_IER_PTIME;
1517
-#endif
1518
-		serial_out(p, UART_IER, p->ier);
1500
+	if (serial8250_clear_THRI(p))
15191501 		serial8250_rpm_put_tx(p);
1520
-	}
15211502 }
15221503 
15231504 static inline void __stop_tx(struct uart_8250_port *p)
....@@ -1526,6 +1507,8 @@
15261507 
15271508 	if (em485) {
15281509 		unsigned char lsr = serial_in(p, UART_LSR);
1510
+		p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1511
+
15291512 		/*
15301513 		 * To provide required timeing and allow FIFO transfer,
15311514 		 * __stop_tx_rs485() must be called only when both FIFO and
....@@ -1534,8 +1517,6 @@
15341517 		 */
15351518 		if ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
15361519 			return;
1537
-
1538
-		em485->active_timer = NULL;
15391520 
15401521 		__stop_tx_rs485(p);
15411522 	}
....@@ -1571,13 +1552,7 @@
15711552 		return;
15721553 #endif
15731554 
1574
-	if (!(up->ier & UART_IER_THRI)) {
1575
-		up->ier |= UART_IER_THRI;
1576
-#ifdef CONFIG_ARCH_ROCKCHIP
1577
-		up->ier |= UART_IER_PTIME;
1578
-#endif
1579
-		serial_port_out(port, UART_IER, up->ier);
1580
-
1555
+	if (serial8250_set_THRI(up)) {
15811556 		if (up->bugs & UART_BUG_TXEN) {
15821557 			unsigned char lsr;
15831558 
....@@ -1597,25 +1572,54 @@
15971572 	}
15981573 }
15991574 
1600
-static inline void start_tx_rs485(struct uart_port *port)
1575
+/**
1576
+ * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1577
+ * @up: uart 8250 port
1578
+ *
1579
+ * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1580
+ * Assumes that setting the RTS bit in the MCR register means RTS is high.
1581
+ * (Some chips use inverse semantics.)  Further assumes that reception is
1582
+ * stoppable by disabling the UART_IER_RDI interrupt.  (Some chips set the
1583
+ * UART_LSR_DR bit even when UART_IER_RDI is disabled, foiling this approach.)
1584
+ */
1585
+void serial8250_em485_start_tx(struct uart_8250_port *up)
16011586 {
1602
-	struct uart_8250_port *up = up_to_u8250p(port);
1603
-	struct uart_8250_em485 *em485 = up->em485;
1604
-	unsigned char mcr;
1587
+	unsigned char mcr = serial8250_in_MCR(up);
16051588 
16061589 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
16071590 		serial8250_stop_rx(&up->port);
16081591 
1592
+	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1593
+		mcr |= UART_MCR_RTS;
1594
+	else
1595
+		mcr &= ~UART_MCR_RTS;
1596
+	serial8250_out_MCR(up, mcr);
1597
+}
1598
+EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
1599
+
1600
+static inline void start_tx_rs485(struct uart_port *port)
1601
+{
1602
+	struct uart_8250_port *up = up_to_u8250p(port);
1603
+	struct uart_8250_em485 *em485 = up->em485;
1604
+
1605
+	/*
1606
+	 * While serial8250_em485_handle_stop_tx() is a noop if
1607
+	 * em485->active_timer != &em485->stop_tx_timer, it might happen that
1608
+	 * the timer is still armed and triggers only after the current bunch of
1609
+	 * chars is send and em485->active_timer == &em485->stop_tx_timer again.
1610
+	 * So cancel the timer. There is still a theoretical race condition if
1611
+	 * the timer is already running and only comes around to check for
1612
+	 * em485->active_timer when &em485->stop_tx_timer is armed again.
1613
+	 */
1614
+	if (em485->active_timer == &em485->stop_tx_timer)
1615
+		hrtimer_try_to_cancel(&em485->stop_tx_timer);
1616
+
16091617 	em485->active_timer = NULL;
16101618 
1611
-	mcr = serial8250_in_MCR(up);
1612
-	if (!!(up->port.rs485.flags & SER_RS485_RTS_ON_SEND) !=
1613
-	    !!(mcr & UART_MCR_RTS)) {
1614
-		if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1615
-			mcr |= UART_MCR_RTS;
1616
-		else
1617
-			mcr &= ~UART_MCR_RTS;
1618
-		serial8250_out_MCR(up, mcr);
1619
+	if (em485->tx_stopped) {
1620
+		em485->tx_stopped = false;
1621
+
1622
+		up->rs485_start_tx(up);
16191623 
16201624 		if (up->port.rs485.delay_rts_before_send > 0) {
16211625 			em485->active_timer = &em485->start_tx_timer;
....@@ -1681,8 +1685,10 @@
16811685 	if (up->bugs & UART_BUG_NOMSR)
16821686 		return;
16831687 
1688
+	mctrl_gpio_disable_ms(up->gpios);
1689
+
16841690 	up->ier &= ~UART_IER_MSI;
1685
-	serial_port_out(port, UART_IER, up->ier);
1691
+	serial8250_set_IER(up, up->ier);
16861692 }
16871693 
16881694 static void serial8250_enable_ms(struct uart_port *port)
....@@ -1693,10 +1699,12 @@
16931699 	if (up->bugs & UART_BUG_NOMSR)
16941700 		return;
16951701 
1702
+	mctrl_gpio_enable_ms(up->gpios);
1703
+
16961704 	up->ier |= UART_IER_MSI;
16971705 
16981706 	serial8250_rpm_get(up);
1699
-	serial_port_out(port, UART_IER, up->ier);
1707
+	serial8250_set_IER(up, up->ier);
17001708 	serial8250_rpm_put(up);
17011709 }
17021710 
....@@ -1748,14 +1756,14 @@
17481756 		lsr &= port->read_status_mask;
17491757 
17501758 		if (lsr & UART_LSR_BI) {
1751
-			pr_debug("%s: handling break\n", __func__);
1759
+			dev_dbg(port->dev, "handling break\n");
17521760 			flag = TTY_BREAK;
17531761 		} else if (lsr & UART_LSR_PE)
17541762 			flag = TTY_PARITY;
17551763 		else if (lsr & UART_LSR_FE)
17561764 			flag = TTY_FRAME;
17571765 	}
1758
-	if (uart_handle_sysrq_char(port, ch))
1766
+	if (uart_prepare_sysrq_char(port, ch))
17591767 		return;
17601768 
17611769 	uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
....@@ -1791,9 +1799,7 @@
17911799 	int count;
17921800 
17931801 	if (port->x_char) {
1794
-		serial_out(up, UART_TX, port->x_char);
1795
-		port->icount.tx++;
1796
-		port->x_char = 0;
1802
+		uart_xchar_out(port, UART_TX);
17971803 		return;
17981804 	}
17991805 	if (uart_tx_stopped(port)) {
....@@ -1808,6 +1814,18 @@
18081814 	count = up->tx_loadsz;
18091815 	do {
18101816 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1817
+		if (up->bugs & UART_BUG_TXRACE) {
1818
+			/*
1819
+			 * The Aspeed BMC virtual UARTs have a bug where data
1820
+			 * may get stuck in the BMC's Tx FIFO from bursts of
1821
+			 * writes on the APB interface.
1822
+			 *
1823
+			 * Delay back-to-back writes by a read cycle to avoid
1824
+			 * stalling the VUART. Read a register that won't have
1825
+			 * side-effects and discard the result.
1826
+			 */
1827
+			serial_in(up, UART_SCR);
1828
+		}
18111829 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
18121830 		port->icount.tx++;
18131831 		if (uart_circ_empty(xmit))
....@@ -1869,10 +1887,13 @@
18691887 		return up->dma->rx_dma(up);
18701888 #else
18711889 	switch (iir & 0x3f) {
1890
+	case UART_IIR_RDI:
1891
+		if (!up->dma->rx_running)
1892
+			break;
1893
+		fallthrough;
1894
+	case UART_IIR_RLSI:
18721895 	case UART_IIR_RX_TIMEOUT:
18731896 		serial8250_rx_dma_flush(up);
1874
-		/* fall-through */
1875
-	case UART_IIR_RLSI:
18761897 		return true;
18771898 	}
18781899 	return up->dma->rx_dma(up);
....@@ -1887,7 +1908,9 @@
18871908 	unsigned char status;
18881909 	unsigned long flags;
18891910 	struct uart_8250_port *up = up_to_u8250p(port);
1911
+#ifndef CONFIG_ARCH_ROCKCHIP
18901912 	bool skip_rx = false;
1913
+#endif
18911914 
18921915 	if (iir & UART_IIR_NO_INT)
18931916 		return 0;
....@@ -1896,6 +1919,17 @@
18961919 
18971920 	status = serial_port_in(port, UART_LSR);
18981921 
1922
+#ifdef CONFIG_ARCH_ROCKCHIP
1923
+	if (status & (UART_LSR_DR | UART_LSR_BI)) {
1924
+		int dma_err = -1;
1925
+
1926
+		if (up->dma && up->dma->rxchan)
1927
+			dma_err = handle_rx_dma(up, iir);
1928
+
1929
+		if (!up->dma || dma_err)
1930
+			status = serial8250_rx_chars(up, status);
1931
+	}
1932
+#else
18991933 	/*
19001934 	 * If port is stopped and there are no error conditions in the
19011935 	 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer
....@@ -1910,27 +1944,18 @@
19101944 		skip_rx = true;
19111945 
19121946 	if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
1913
-#ifdef CONFIG_ARCH_ROCKCHIP
1914
-		int dma_err = -1;
1915
-
1916
-		if (up->dma && up->dma->rxchan)
1917
-			dma_err = handle_rx_dma(up, iir);
1918
-
1919
-		if (!up->dma || dma_err)
1920
-			status = serial8250_rx_chars(up, status);
1921
-#else
19221947 		if (!up->dma || handle_rx_dma(up, iir))
19231948 			status = serial8250_rx_chars(up, status);
1924
-#endif
19251949 	}
1950
+#endif
19261951 	serial8250_modem_status(up);
19271952 #ifdef CONFIG_ARCH_ROCKCHIP
19281953 	if ((!up->dma || (up->dma && (!up->dma->txchan || up->dma->tx_err))) &&
19291954 	    ((iir & 0xf) == UART_IIR_THRI))
19301955 		serial8250_tx_chars(up);
19311956 #else
1932
-	if ((!up->dma || up->dma->tx_err) && (status & UART_LSR_THRE) &&
1933
-		(up->ier & UART_IER_THRI))
1957
+	if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1958
+	    (status & UART_LSR_THRE))
19341959 		serial8250_tx_chars(up);
19351960 #endif
19361961 
....@@ -1950,7 +1975,7 @@
19501975 			port->name);
19511976 	}
19521977 #endif
1953
-	spin_unlock_irqrestore(&port->lock, flags);
1978
+	uart_unlock_and_check_sysrq(port, flags);
19541979 	return 1;
19551980 }
19561981 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
....@@ -2016,22 +2041,17 @@
20162041 {
20172042 	struct uart_8250_port *up = up_to_u8250p(port);
20182043 	unsigned int status;
2019
-	unsigned int ret;
2044
+	unsigned int val;
20202045 
20212046 	serial8250_rpm_get(up);
20222047 	status = serial8250_modem_status(up);
20232048 	serial8250_rpm_put(up);
20242049 
2025
-	ret = 0;
2026
-	if (status & UART_MSR_DCD)
2027
-		ret |= TIOCM_CAR;
2028
-	if (status & UART_MSR_RI)
2029
-		ret |= TIOCM_RNG;
2030
-	if (status & UART_MSR_DSR)
2031
-		ret |= TIOCM_DSR;
2032
-	if (status & UART_MSR_CTS)
2033
-		ret |= TIOCM_CTS;
2034
-	return ret;
2050
+	val = serial8250_MSR_to_TIOCM(status);
2051
+	if (up->gpios)
2052
+		return mctrl_gpio_get(up->gpios, &val);
2053
+
2054
+	return val;
20352055 }
20362056 EXPORT_SYMBOL_GPL(serial8250_do_get_mctrl);
20372057 
....@@ -2045,18 +2065,9 @@
20452065 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
20462066 {
20472067 	struct uart_8250_port *up = up_to_u8250p(port);
2048
-	unsigned char mcr = 0;
2068
+	unsigned char mcr;
20492069 
2050
-	if (mctrl & TIOCM_RTS)
2051
-		mcr |= UART_MCR_RTS;
2052
-	if (mctrl & TIOCM_DTR)
2053
-		mcr |= UART_MCR_DTR;
2054
-	if (mctrl & TIOCM_OUT1)
2055
-		mcr |= UART_MCR_OUT1;
2056
-	if (mctrl & TIOCM_OUT2)
2057
-		mcr |= UART_MCR_OUT2;
2058
-	if (mctrl & TIOCM_LOOP)
2059
-		mcr |= UART_MCR_LOOP;
2070
+	mcr = serial8250_TIOCM_to_MCR(mctrl);
20602071 
20612072 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
20622073 
....@@ -2066,6 +2077,9 @@
20662077 
20672078 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
20682079 {
2080
+	if (port->rs485.flags & SER_RS485_ENABLED)
2081
+		return;
2082
+
20692083 	if (port->set_mctrl)
20702084 		port->set_mctrl(port, mctrl);
20712085 	else
....@@ -2157,14 +2171,7 @@
21572171 	struct uart_8250_port *up = up_to_u8250p(port);
21582172 
21592173 	serial8250_rpm_get(up);
2160
-	/*
2161
-	 *	First save the IER then disable the interrupts
2162
-	 */
2163
-	ier = serial_port_in(port, UART_IER);
2164
-	if (up->capabilities & UART_CAP_UUE)
2165
-		serial_port_out(port, UART_IER, UART_IER_UUE);
2166
-	else
2167
-		serial_port_out(port, UART_IER, 0);
2174
+	ier = serial8250_clear_IER(up);
21682175 
21692176 	wait_for_xmitr(up, BOTH_EMPTY);
21702177 	/*
....@@ -2177,7 +2184,7 @@
21772184 	 *	and restore the IER
21782185 	 */
21792186 	wait_for_xmitr(up, BOTH_EMPTY);
2180
-	serial_port_out(port, UART_IER, ier);
2187
+	serial8250_set_IER(up, ier);
21812188 	serial8250_rpm_put(up);
21822189 }
21832190 
....@@ -2245,20 +2252,6 @@
22452252 	enable_rsa(up);
22462253 #endif
22472254 
2248
-	if (port->type == PORT_XR17V35X) {
2249
-		/*
2250
-		 * First enable access to IER [7:5], ISR [5:4], FCR [5:4],
2251
-		 * MCR [7:5] and MSR [7:0]
2252
-		 */
2253
-		serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
2254
-
2255
-		/*
2256
-		 * Make sure all interrups are masked until initialization is
2257
-		 * complete and the FIFOs are cleared
2258
-		 */
2259
-		serial_port_out(port, UART_IER, 0);
2260
-	}
2261
-
22622255 	/*
22632256 	 * Clear the FIFO buffers and disable them.
22642257 	 * (they will be reenabled in set_termios())
....@@ -2272,8 +2265,6 @@
22722265 	serial_port_in(port, UART_RX);
22732266 	serial_port_in(port, UART_IIR);
22742267 	serial_port_in(port, UART_MSR);
2275
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2276
-		serial_port_in(port, UART_EXAR_INT0);
22772268 
22782269 	/*
22792270 	 * At this point, there's no way the LSR could still be 0xff;
....@@ -2282,7 +2273,7 @@
22822273 	 */
22832274 	if (!(port->flags & UPF_BUGGY_UART) &&
22842275 	    (serial_port_in(port, UART_LSR) == 0xff)) {
2285
-		pr_info_ratelimited("%s: LSR safety check engaged!\n", port->name);
2276
+		dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
22862277 		retval = -ENODEV;
22872278 		goto out;
22882279 	}
....@@ -2314,8 +2305,7 @@
23142305 	     (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) {
23152306 		/* Bounds checking of TX threshold (valid 0 to fifosize-2) */
23162307 		if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) {
2317
-			pr_err("%s TX FIFO Threshold errors, skipping\n",
2318
-			       port->name);
2308
+			dev_err(port->dev, "TX FIFO Threshold errors, skipping\n");
23192309 		} else {
23202310 			serial_port_out(port, UART_ALTR_AFR,
23212311 					UART_ALTR_EN_TXFIFO_LW);
....@@ -2419,8 +2409,7 @@
24192409 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
24202410 		if (!(up->bugs & UART_BUG_TXEN)) {
24212411 			up->bugs |= UART_BUG_TXEN;
2422
-			pr_debug("%s - enabling bad tx status workarounds\n",
2423
-				 port->name);
2412
+			dev_dbg(port->dev, "enabling bad tx status workarounds\n");
24242413 		}
24252414 	} else {
24262415 		up->bugs &= ~UART_BUG_TXEN;
....@@ -2438,8 +2427,6 @@
24382427 	serial_port_in(port, UART_RX);
24392428 	serial_port_in(port, UART_IIR);
24402429 	serial_port_in(port, UART_MSR);
2441
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2442
-		serial_port_in(port, UART_EXAR_INT0);
24432430 	up->lsr_saved_flags = 0;
24442431 	up->msr_saved_flags = 0;
24452432 
....@@ -2447,15 +2434,18 @@
24472434 	 * Request DMA channels for both RX and TX.
24482435 	 */
24492436 	if (up->dma) {
2450
-		retval = serial8250_request_dma(up);
2451
-		if (retval) {
2437
+		const char *msg = NULL;
2438
+
2439
+		if (uart_console(port))
2440
+			msg = "forbid DMA for kernel console";
2441
+		else if (serial8250_request_dma(up))
24522442 #ifdef CONFIG_ARCH_ROCKCHIP
2453
-			pr_warn_ratelimited("%s - failed to request DMA, use interrupt mode\n",
2454
-					    port->name);
2443
+			msg = "failed to request DMA, use interrupt mode";
24552444 #else
2456
-			pr_warn_ratelimited("%s - failed to request DMA\n",
2457
-					    port->name);
2445
+			msg = "failed to request DMA";
24582446 #endif
2447
+		if (msg) {
2448
+			dev_warn_ratelimited(port->dev, "%s\n", msg);
24592449 			up->dma = NULL;
24602450 		}
24612451 	}
....@@ -2501,7 +2491,7 @@
25012491 	 */
25022492 	spin_lock_irqsave(&port->lock, flags);
25032493 	up->ier = 0;
2504
-	serial_port_out(port, UART_IER, 0);
2494
+	serial8250_set_IER(up, 0);
25052495 	spin_unlock_irqrestore(&port->lock, flags);
25062496 
25072497 	synchronize_irq(port->irq);
....@@ -2553,23 +2543,6 @@
25532543 		serial8250_do_shutdown(port);
25542544 }
25552545 
2556
-/*
2557
- * XR17V35x UARTs have an extra fractional divisor register (DLD)
2558
- * Calculate divisor with extra 4-bit fractional portion
2559
- */
2560
-static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2561
-					 unsigned int baud,
2562
-					 unsigned int *frac)
2563
-{
2564
-	struct uart_port *port = &up->port;
2565
-	unsigned int quot_16;
2566
-
2567
-	quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2568
-	*frac = quot_16 & 0x0f;
2569
-
2570
-	return quot_16 >> 4;
2571
-}
2572
-
25732546 /* Nuvoton NPCM UARTs have a custom divisor calculation */
25742547 static unsigned int npcm_get_divisor(struct uart_8250_port *up,
25752548 		unsigned int baud)
....@@ -2597,8 +2570,6 @@
25972570 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
25982571 		 baud == (port->uartclk/8))
25992572 		quot = 0x8002;
2600
-	else if (up->port.type == PORT_XR17V35X)
2601
-		quot = xr17v35x_get_divisor(up, baud, frac);
26022573 	else if (up->port.type == PORT_NPCM)
26032574 		quot = npcm_get_divisor(up, baud);
26042575 	else
....@@ -2700,13 +2671,6 @@
27002671 #ifdef CONFIG_ARCH_ROCKCHIP
27012672 	serial_port_out(port, UART_MCR, up->mcr);
27022673 #endif
2703
-
2704
-	/* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2705
-	if (up->port.type == PORT_XR17V35X) {
2706
-		/* Preserve bits not related to baudrate; DLD[7:4]. */
2707
-		quot_frac |= serial_port_in(port, 0x2) & 0xf0;
2708
-		serial_port_out(port, 0x2, quot_frac);
2709
-	}
27102674 }
27112675 EXPORT_SYMBOL_GPL(serial8250_do_set_divisor);
27122676 
....@@ -2748,6 +2712,62 @@
27482712 	 */
27492713 	return uart_get_baud_rate(port, termios, old, min, max);
27502714 }
2715
+
2716
+/*
2717
+ * Note in order to avoid the tty port mutex deadlock don't use the next method
2718
+ * within the uart port callbacks. Primarily it's supposed to be utilized to
2719
+ * handle a sudden reference clock rate change.
2720
+ */
2721
+void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk)
2722
+{
2723
+	struct uart_8250_port *up = up_to_u8250p(port);
2724
+	struct tty_port *tport = &port->state->port;
2725
+	unsigned int baud, quot, frac = 0;
2726
+	struct ktermios *termios;
2727
+	struct tty_struct *tty;
2728
+	unsigned long flags;
2729
+
2730
+	tty = tty_port_tty_get(tport);
2731
+	if (!tty) {
2732
+		mutex_lock(&tport->mutex);
2733
+		port->uartclk = uartclk;
2734
+		mutex_unlock(&tport->mutex);
2735
+		return;
2736
+	}
2737
+
2738
+	down_write(&tty->termios_rwsem);
2739
+	mutex_lock(&tport->mutex);
2740
+
2741
+	if (port->uartclk == uartclk)
2742
+		goto out_lock;
2743
+
2744
+	port->uartclk = uartclk;
2745
+
2746
+	if (!tty_port_initialized(tport))
2747
+		goto out_lock;
2748
+
2749
+	termios = &tty->termios;
2750
+
2751
+	baud = serial8250_get_baud_rate(port, termios, NULL);
2752
+	quot = serial8250_get_divisor(port, baud, &frac);
2753
+
2754
+	serial8250_rpm_get(up);
2755
+	spin_lock_irqsave(&port->lock, flags);
2756
+
2757
+	uart_update_timeout(port, termios->c_cflag, baud);
2758
+
2759
+	serial8250_set_divisor(port, baud, quot, frac);
2760
+	serial_port_out(port, UART_LCR, up->lcr);
2761
+
2762
+	spin_unlock_irqrestore(&port->lock, flags);
2763
+	serial8250_rpm_put(up);
2764
+
2765
+out_lock:
2766
+	mutex_unlock(&tport->mutex);
2767
+	up_write(&tty->termios_rwsem);
2768
+	tty_kref_put(tty);
2769
+}
2770
+EXPORT_SYMBOL_GPL(serial8250_update_uartclk);
27512771 
27522772 void
27532773 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
....@@ -2843,7 +2863,7 @@
28432863 	if (up->capabilities & UART_CAP_RTOIE)
28442864 		up->ier |= UART_IER_RTOIE;
28452865 
2846
-	serial_port_out(port, UART_IER, up->ier);
2866
+	serial8250_set_IER(up, up->ier);
28472867 #endif
28482868 
28492869 	if (up->capabilities & UART_CAP_EFR) {
....@@ -2864,7 +2884,7 @@
28642884 	}
28652885 
28662886 #ifdef CONFIG_ARCH_ROCKCHIP
2867
-	/* Reset uart to make sure it is idle, then set buad rate */
2887
+	/* Reset uart to make sure it is idle, then set baud rate */
28682888 	serial_port_out(port, 0x88 >> 2, 0x7);
28692889 #endif
28702890 
....@@ -2903,7 +2923,7 @@
29032923 	if (up->capabilities & UART_CAP_RTOIE)
29042924 		up->ier |= UART_IER_RTOIE;
29052925 
2906
-	serial_port_out(port, UART_IER, up->ier);
2926
+	serial8250_set_IER(up, up->ier);
29072927 #endif
29082928 
29092929 	spin_unlock_irqrestore(&port->lock, flags);
....@@ -3002,8 +3022,10 @@
30023022 	case UPIO_MEM32BE:
30033023 	case UPIO_MEM16:
30043024 	case UPIO_MEM:
3005
-		if (!port->mapbase)
3025
+		if (!port->mapbase) {
3026
+			ret = -EINVAL;
30063027 			break;
3028
+		}
30073029 
30083030 		if (!request_mem_region(port->mapbase, size, "serial")) {
30093031 			ret = -EBUSY;
....@@ -3011,7 +3033,7 @@
30113033 		}
30123034 
30133035 		if (port->flags & UPF_IOREMAP) {
3014
-			port->membase = ioremap_nocache(port->mapbase, size);
3036
+			port->membase = ioremap(port->mapbase, size);
30153037 			if (!port->membase) {
30163038 				release_mem_region(port->mapbase, size);
30173039 				ret = -ENOMEM;
....@@ -3122,7 +3144,7 @@
31223144 	return rxtrig_bytes;
31233145 }
31243146 
3125
-static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
3147
+static ssize_t rx_trig_bytes_show(struct device *dev,
31263148 	struct device_attribute *attr, char *buf)
31273149 {
31283150 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3168,7 +3190,7 @@
31683190 	return ret;
31693191 }
31703192 
3171
-static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
3193
+static ssize_t rx_trig_bytes_store(struct device *dev,
31723194 	struct device_attribute *attr, const char *buf, size_t count)
31733195 {
31743196 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3189,18 +3211,16 @@
31893211 	return count;
31903212 }
31913213 
3192
-static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3193
-		   serial8250_get_attr_rx_trig_bytes,
3194
-		   serial8250_set_attr_rx_trig_bytes);
3214
+static DEVICE_ATTR_RW(rx_trig_bytes);
31953215 
31963216 static struct attribute *serial8250_dev_attrs[] = {
31973217 	&dev_attr_rx_trig_bytes.attr,
3198
-	NULL,
3199
-	};
3218
+	NULL
3219
+};
32003220 
32013221 static struct attribute_group serial8250_dev_attr_group = {
32023222 	.attrs = serial8250_dev_attrs,
3203
-	};
3223
+};
32043224 
32053225 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
32063226 {
....@@ -3300,6 +3320,7 @@
33003320 
33013321 	spin_lock_init(&port->lock);
33023322 	port->ops = &serial8250_pops;
3323
+	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
33033324 
33043325 	up->cur_iotype = 0xFF;
33053326 }
....@@ -3334,12 +3355,24 @@
33343355 
33353356 #ifdef CONFIG_SERIAL_8250_CONSOLE
33363357 
3337
-static void serial8250_console_putchar(struct uart_port *port, int ch)
3358
+static void serial8250_console_putchar_locked(struct uart_port *port, int ch)
33383359 {
33393360 	struct uart_8250_port *up = up_to_u8250p(port);
33403361 
33413362 	wait_for_xmitr(up, UART_LSR_THRE);
33423363 	serial_port_out(port, UART_TX, ch);
3364
+}
3365
+
3366
+static void serial8250_console_putchar(struct uart_port *port, int ch)
3367
+{
3368
+	struct uart_8250_port *up = up_to_u8250p(port);
3369
+	unsigned int flags;
3370
+
3371
+	wait_for_xmitr(up, UART_LSR_THRE);
3372
+
3373
+	console_atomic_lock(&flags);
3374
+	serial8250_console_putchar_locked(port, ch);
3375
+	console_atomic_unlock(flags);
33433376 }
33443377 
33453378 /*
....@@ -3360,7 +3393,33 @@
33603393 
33613394 	serial8250_set_divisor(port, baud, quot, frac);
33623395 	serial_port_out(port, UART_LCR, up->lcr);
3363
-	serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
3396
+	serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
3397
+}
3398
+
3399
+void serial8250_console_write_atomic(struct uart_8250_port *up,
3400
+				     const char *s, unsigned int count)
3401
+{
3402
+	struct uart_port *port = &up->port;
3403
+	unsigned int flags;
3404
+	unsigned int ier;
3405
+
3406
+	console_atomic_lock(&flags);
3407
+
3408
+	touch_nmi_watchdog();
3409
+
3410
+	ier = serial8250_clear_IER(up);
3411
+
3412
+	if (atomic_fetch_inc(&up->console_printing)) {
3413
+		uart_console_write(port, "\n", 1,
3414
+				   serial8250_console_putchar_locked);
3415
+	}
3416
+	uart_console_write(port, s, count, serial8250_console_putchar_locked);
3417
+	atomic_dec(&up->console_printing);
3418
+
3419
+	wait_for_xmitr(up, BOTH_EMPTY);
3420
+	serial8250_set_IER(up, ier);
3421
+
3422
+	console_atomic_unlock(flags);
33643423 }
33653424 
33663425 /*
....@@ -3368,35 +3427,23 @@
33683427  *	any possible real use of the port...
33693428  *
33703429  *	The console_lock must be held when we get here.
3430
+ *
3431
+ *	Doing runtime PM is really a bad idea for the kernel console.
3432
+ *	Thus, we assume the function is called when device is powered up.
33713433  */
33723434 void serial8250_console_write(struct uart_8250_port *up, const char *s,
33733435 			      unsigned int count)
33743436 {
3437
+	struct uart_8250_em485 *em485 = up->em485;
33753438 	struct uart_port *port = &up->port;
33763439 	unsigned long flags;
33773440 	unsigned int ier;
3378
-	int locked = 1;
33793441 
33803442 	touch_nmi_watchdog();
33813443 
3382
-	serial8250_rpm_get(up);
3444
+	spin_lock_irqsave(&port->lock, flags);
33833445 
3384
-	if (port->sysrq || oops_in_progress)
3385
-		locked = 0;
3386
-	else if (in_kdb_printk())
3387
-		locked = spin_trylock_irqsave(&port->lock, flags);
3388
-	else
3389
-		spin_lock_irqsave(&port->lock, flags);
3390
-
3391
-	/*
3392
-	 *	First save the IER then disable the interrupts
3393
-	 */
3394
-	ier = serial_port_in(port, UART_IER);
3395
-
3396
-	if (up->capabilities & UART_CAP_UUE)
3397
-		serial_port_out(port, UART_IER, UART_IER_UUE);
3398
-	else
3399
-		serial_port_out(port, UART_IER, 0);
3446
+	ier = serial8250_clear_IER(up);
34003447 
34013448 	/* check scratch reg to see if port powered off during system sleep */
34023449 	if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
....@@ -3404,14 +3451,28 @@
34043451 		up->canary = 0;
34053452 	}
34063453 
3454
+	if (em485) {
3455
+		if (em485->tx_stopped)
3456
+			up->rs485_start_tx(up);
3457
+		mdelay(port->rs485.delay_rts_before_send);
3458
+	}
3459
+
3460
+	atomic_inc(&up->console_printing);
34073461 	uart_console_write(port, s, count, serial8250_console_putchar);
3462
+	atomic_dec(&up->console_printing);
34083463 
34093464 	/*
34103465 	 *	Finally, wait for transmitter to become empty
34113466 	 *	and restore the IER
34123467 	 */
34133468 	wait_for_xmitr(up, BOTH_EMPTY);
3414
-	serial_port_out(port, UART_IER, ier);
3469
+
3470
+	if (em485) {
3471
+		mdelay(port->rs485.delay_rts_after_send);
3472
+		if (em485->tx_stopped)
3473
+			up->rs485_stop_tx(up);
3474
+	}
3475
+	serial8250_set_IER(up, ier);
34153476 
34163477 	/*
34173478 	 *	The receive handling will happen properly because the
....@@ -3423,9 +3484,7 @@
34233484 	if (up->msr_saved_flags)
34243485 		serial8250_modem_status(up);
34253486 
3426
-	if (locked)
3427
-		spin_unlock_irqrestore(&port->lock, flags);
3428
-	serial8250_rpm_put(up);
3487
+	spin_unlock_irqrestore(&port->lock, flags);
34293488 }
34303489 
34313490 static unsigned int probe_baud(struct uart_port *port)
....@@ -3445,20 +3504,39 @@
34453504 
34463505 int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
34473506 {
3507
+	struct uart_8250_port *up = up_to_u8250p(port);
34483508 	int baud = 9600;
34493509 	int bits = 8;
34503510 	int parity = 'n';
34513511 	int flow = 'n';
3512
+	int ret;
34523513 
34533514 	if (!port->iobase && !port->membase)
34543515 		return -ENODEV;
3516
+
3517
+	atomic_set(&up->console_printing, 0);
34553518 
34563519 	if (options)
34573520 		uart_parse_options(options, &baud, &parity, &bits, &flow);
34583521 	else if (probe)
34593522 		baud = probe_baud(port);
34603523 
3461
-	return uart_set_options(port, port->cons, baud, parity, bits, flow);
3524
+	ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
3525
+	if (ret)
3526
+		return ret;
3527
+
3528
+	if (port->dev)
3529
+		pm_runtime_get_sync(port->dev);
3530
+
3531
+	return 0;
3532
+}
3533
+
3534
+int serial8250_console_exit(struct uart_port *port)
3535
+{
3536
+	if (port->dev)
3537
+		pm_runtime_put_sync(port->dev);
3538
+
3539
+	return 0;
34623540 }
34633541 
34643542 #endif /* CONFIG_SERIAL_8250_CONSOLE */