~hc/RK356X_SDK_RELEASE.git

..	..	@@ -189,6 +189,10 @@
189	189	u32 offsetib, offsetob;
190	190	void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;
191	191	void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;
	192	+ u32 ib_offset = pm8001_ha->ib_offset;
	193	+ u32 ob_offset = pm8001_ha->ob_offset;
	194	+ u32 ci_offset = pm8001_ha->ci_offset;
	195	+ u32 pi_offset = pm8001_ha->pi_offset;
192	196
193	197	pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_q_nppd_hppd = 0;
194	198	pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid0_3 = 0;
..	..	@@ -219,23 +223,23 @@
219	223	PM8001_EVENT_LOG_SIZE;
220	224	pm8001_ha->main_cfg_tbl.pm8001_tbl.iop_event_log_option = 0x01;
221	225	pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_interrupt = 0x01;
222		- for (i = 0; i < PM8001_MAX_INB_NUM; i++) {
	226	+ for (i = 0; i < pm8001_ha->max_q_num; i++) {
223	227	pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt =
224	228	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x00<<30);
225	229	pm8001_ha->inbnd_q_tbl[i].upper_base_addr =
226		- pm8001_ha->memoryMap.region[IB + i].phys_addr_hi;
	230	+ pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi;
227	231	pm8001_ha->inbnd_q_tbl[i].lower_base_addr =
228		- pm8001_ha->memoryMap.region[IB + i].phys_addr_lo;
	232	+ pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo;
229	233	pm8001_ha->inbnd_q_tbl[i].base_virt =
230		- (u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr;
	234	+ (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr;
231	235	pm8001_ha->inbnd_q_tbl[i].total_length =
232		- pm8001_ha->memoryMap.region[IB + i].total_len;
	236	+ pm8001_ha->memoryMap.region[ib_offset + i].total_len;
233	237	pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr =
234		- pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;
	238	+ pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi;
235	239	pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr =
236		- pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;
	240	+ pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo;
237	241	pm8001_ha->inbnd_q_tbl[i].ci_virt =
238		- pm8001_ha->memoryMap.region[CI + i].virt_ptr;
	242	+ pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr;
239	243	offsetib = i * 0x20;
240	244	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
241	245	get_pci_bar_index(pm8001_mr32(addressib,
..	..	@@ -245,25 +249,25 @@
245	249	pm8001_ha->inbnd_q_tbl[i].producer_idx = 0;
246	250	pm8001_ha->inbnd_q_tbl[i].consumer_index = 0;
247	251	}
248		- for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) {
	252	+ for (i = 0; i < pm8001_ha->max_q_num; i++) {
249	253	pm8001_ha->outbnd_q_tbl[i].element_size_cnt =
250	254	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x01<<30);
251	255	pm8001_ha->outbnd_q_tbl[i].upper_base_addr =
252		- pm8001_ha->memoryMap.region[OB + i].phys_addr_hi;
	256	+ pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi;
253	257	pm8001_ha->outbnd_q_tbl[i].lower_base_addr =
254		- pm8001_ha->memoryMap.region[OB + i].phys_addr_lo;
	258	+ pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo;
255	259	pm8001_ha->outbnd_q_tbl[i].base_virt =
256		- (u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr;
	260	+ (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr;
257	261	pm8001_ha->outbnd_q_tbl[i].total_length =
258		- pm8001_ha->memoryMap.region[OB + i].total_len;
	262	+ pm8001_ha->memoryMap.region[ob_offset + i].total_len;
259	263	pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr =
260		- pm8001_ha->memoryMap.region[PI + i].phys_addr_hi;
	264	+ pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi;
261	265	pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr =
262		- pm8001_ha->memoryMap.region[PI + i].phys_addr_lo;
	266	+ pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo;
263	267	pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay =
264	268	0 \| (10 << 16) \| (i << 24);
265	269	pm8001_ha->outbnd_q_tbl[i].pi_virt =
266		- pm8001_ha->memoryMap.region[PI + i].virt_ptr;
	270	+ pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr;
267	271	offsetob = i * 0x24;
268	272	pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
269	273	get_pci_bar_index(pm8001_mr32(addressob,
..	..	@@ -333,6 +337,7 @@
333	337	/**
334	338	* update_inbnd_queue_table - update the inbound queue table to the HBA.
335	339	* @pm8001_ha: our hba card information
	340	+ * @number: entry in the queue
336	341	*/
337	342	static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
338	343	int number)
..	..	@@ -354,6 +359,7 @@
354	359	/**
355	360	* update_outbnd_queue_table - update the outbound queue table to the HBA.
356	361	* @pm8001_ha: our hba card information
	362	+ * @number: entry in the queue
357	363	*/
358	364	static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
359	365	int number)
..	..	@@ -394,9 +400,9 @@
394	400	} while ((regVal != shiftValue) && time_before(jiffies, start));
395	401
396	402	if (regVal != shiftValue) {
397		- PM8001_INIT_DBG(pm8001_ha,
398		- pm8001_printk("TIMEOUT:SPC_IBW_AXI_TRANSLATION_LOW"
399		- " = 0x%x\n", regVal));
	403	+ pm8001_dbg(pm8001_ha, INIT,
	404	+ "TIMEOUT:SPC_IBW_AXI_TRANSLATION_LOW = 0x%x\n",
	405	+ regVal);
400	406	return -1;
401	407	}
402	408	return 0;
..	..	@@ -473,7 +479,7 @@
473	479	/**
474	480	* mpi_set_open_retry_interval_reg
475	481	* @pm8001_ha: our hba card information
476		- * @interval - interval time for each OPEN_REJECT (RETRY). The units are in 1us.
	482	+ * @interval: interval time for each OPEN_REJECT (RETRY). The units are in 1us.
477	483	*/
478	484	static void mpi_set_open_retry_interval_reg(struct pm8001_hba_info *pm8001_ha,
479	485	u32 interval)
..	..	@@ -617,12 +623,10 @@
617	623
618	624	value = pm8001_cr32(pm8001_ha, 0, 0x44);
619	625	offset = value & 0x03FFFFFF;
620		- PM8001_INIT_DBG(pm8001_ha,
621		- pm8001_printk("Scratchpad 0 Offset: %x\n", offset));
	626	+ pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 Offset: %x\n", offset);
622	627	pcilogic = (value & 0xFC000000) >> 26;
623	628	pcibar = get_pci_bar_index(pcilogic);
624		- PM8001_INIT_DBG(pm8001_ha,
625		- pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar));
	629	+ pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);
626	630	pm8001_ha->main_cfg_tbl_addr = base_addr =
627	631	pm8001_ha->io_mem[pcibar].memvirtaddr + offset;
628	632	pm8001_ha->general_stat_tbl_addr =
..	..	@@ -639,23 +643,22 @@
639	643	*/
640	644	static int pm8001_chip_init(struct pm8001_hba_info *pm8001_ha)
641	645	{
642		- u8 i = 0;
	646	+ u32 i = 0;
643	647	u16 deviceid;
644	648	pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid);
645	649	/* 8081 controllers need BAR shift to access MPI space
646	650	* as this is shared with BIOS data */
647	651	if (deviceid == 0x8081 \|\| deviceid == 0x0042) {
648	652	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) {
649		- PM8001_FAIL_DBG(pm8001_ha,
650		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
651		- GSM_SM_BASE));
	653	+ pm8001_dbg(pm8001_ha, FAIL,
	654	+ "Shift Bar4 to 0x%x failed\n",
	655	+ GSM_SM_BASE);
652	656	return -1;
653	657	}
654	658	}
655	659	/* check the firmware status */
656	660	if (-1 == check_fw_ready(pm8001_ha)) {
657		- PM8001_FAIL_DBG(pm8001_ha,
658		- pm8001_printk("Firmware is not ready!\n"));
	661	+ pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
659	662	return -EBUSY;
660	663	}
661	664
..	..	@@ -668,9 +671,9 @@
668	671	read_outbnd_queue_table(pm8001_ha);
669	672	/* update main config table ,inbound table and outbound table */
670	673	update_main_config_table(pm8001_ha);
671		- for (i = 0; i < PM8001_MAX_INB_NUM; i++)
	674	+ for (i = 0; i < pm8001_ha->max_q_num; i++)
672	675	update_inbnd_queue_table(pm8001_ha, i);
673		- for (i = 0; i < PM8001_MAX_OUTB_NUM; i++)
	676	+ for (i = 0; i < pm8001_ha->max_q_num; i++)
674	677	update_outbnd_queue_table(pm8001_ha, i);
675	678	/* 8081 controller donot require these operations */
676	679	if (deviceid != 0x8081 && deviceid != 0x0042) {
..	..	@@ -680,8 +683,7 @@
680	683	}
681	684	/* notify firmware update finished and check initialization status */
682	685	if (0 == mpi_init_check(pm8001_ha)) {
683		- PM8001_INIT_DBG(pm8001_ha,
684		- pm8001_printk("MPI initialize successful!\n"));
	686	+ pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n");
685	687	} else
686	688	return -EBUSY;
687	689	/*This register is a 16-bit timer with a resolution of 1us. This is the
..	..	@@ -703,9 +705,9 @@
703	705	pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid);
704	706	if (deviceid == 0x8081 \|\| deviceid == 0x0042) {
705	707	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) {
706		- PM8001_FAIL_DBG(pm8001_ha,
707		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
708		- GSM_SM_BASE));
	708	+ pm8001_dbg(pm8001_ha, FAIL,
	709	+ "Shift Bar4 to 0x%x failed\n",
	710	+ GSM_SM_BASE);
709	711	return -1;
710	712	}
711	713	}
..	..	@@ -723,8 +725,8 @@
723	725	} while ((value != 0) && (--max_wait_count));
724	726
725	727	if (!max_wait_count) {
726		- PM8001_FAIL_DBG(pm8001_ha,
727		- pm8001_printk("TIMEOUT:IBDB value/=0x%x\n", value));
	728	+ pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=0x%x\n",
	729	+ value);
728	730	return -1;
729	731	}
730	732
..	..	@@ -741,9 +743,8 @@
741	743	break;
742	744	} while (--max_wait_count);
743	745	if (!max_wait_count) {
744		- PM8001_FAIL_DBG(pm8001_ha,
745		- pm8001_printk(" TIME OUT MPI State = 0x%x\n",
746		- gst_len_mpistate & GST_MPI_STATE_MASK));
	746	+ pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n",
	747	+ gst_len_mpistate & GST_MPI_STATE_MASK);
747	748	return -1;
748	749	}
749	750	return 0;
..	..	@@ -757,25 +758,23 @@
757	758	{
758	759	u32 regVal, regVal1, regVal2;
759	760	if (mpi_uninit_check(pm8001_ha) != 0) {
760		- PM8001_FAIL_DBG(pm8001_ha,
761		- pm8001_printk("MPI state is not ready\n"));
	761	+ pm8001_dbg(pm8001_ha, FAIL, "MPI state is not ready\n");
762	762	return -1;
763	763	}
764	764	/* read the scratch pad 2 register bit 2 */
765	765	regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)
766	766	& SCRATCH_PAD2_FWRDY_RST;
767	767	if (regVal == SCRATCH_PAD2_FWRDY_RST) {
768		- PM8001_INIT_DBG(pm8001_ha,
769		- pm8001_printk("Firmware is ready for reset .\n"));
	768	+ pm8001_dbg(pm8001_ha, INIT, "Firmware is ready for reset.\n");
770	769	} else {
771	770	unsigned long flags;
772	771	/* Trigger NMI twice via RB6 */
773	772	spin_lock_irqsave(&pm8001_ha->lock, flags);
774	773	if (-1 == pm8001_bar4_shift(pm8001_ha, RB6_ACCESS_REG)) {
775	774	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
776		- PM8001_FAIL_DBG(pm8001_ha,
777		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
778		- RB6_ACCESS_REG));
	775	+ pm8001_dbg(pm8001_ha, FAIL,
	776	+ "Shift Bar4 to 0x%x failed\n",
	777	+ RB6_ACCESS_REG);
779	778	return -1;
780	779	}
781	780	pm8001_cw32(pm8001_ha, 2, SPC_RB6_OFFSET,
..	..	@@ -788,16 +787,14 @@
788	787	if (regVal != SCRATCH_PAD2_FWRDY_RST) {
789	788	regVal1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
790	789	regVal2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
791		- PM8001_FAIL_DBG(pm8001_ha,
792		- pm8001_printk("TIMEOUT:MSGU_SCRATCH_PAD1"
793		- "=0x%x, MSGU_SCRATCH_PAD2=0x%x\n",
794		- regVal1, regVal2));
795		- PM8001_FAIL_DBG(pm8001_ha,
796		- pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
797		- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)));
798		- PM8001_FAIL_DBG(pm8001_ha,
799		- pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
800		- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)));
	790	+ pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MSGU_SCRATCH_PAD1=0x%x, MSGU_SCRATCH_PAD2=0x%x\n",
	791	+ regVal1, regVal2);
	792	+ pm8001_dbg(pm8001_ha, FAIL,
	793	+ "SCRATCH_PAD0 value = 0x%x\n",
	794	+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
	795	+ pm8001_dbg(pm8001_ha, FAIL,
	796	+ "SCRATCH_PAD3 value = 0x%x\n",
	797	+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
801	798	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
802	799	return -1;
803	800	}
..	..	@@ -822,7 +819,7 @@
822	819
823	820	/* step1: Check FW is ready for soft reset */
824	821	if (soft_reset_ready_check(pm8001_ha) != 0) {
825		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("FW is not ready\n"));
	822	+ pm8001_dbg(pm8001_ha, FAIL, "FW is not ready\n");
826	823	return -1;
827	824	}
828	825
..	..	@@ -832,46 +829,43 @@
832	829	spin_lock_irqsave(&pm8001_ha->lock, flags);
833	830	if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_AAP1_ADDR_BASE)) {
834	831	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
835		- PM8001_FAIL_DBG(pm8001_ha,
836		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
837		- MBIC_AAP1_ADDR_BASE));
	832	+ pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
	833	+ MBIC_AAP1_ADDR_BASE);
838	834	return -1;
839	835	}
840	836	regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP);
841		- PM8001_INIT_DBG(pm8001_ha,
842		- pm8001_printk("MBIC - NMI Enable VPE0 (IOP)= 0x%x\n", regVal));
	837	+ pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (IOP)= 0x%x\n",
	838	+ regVal);
843	839	pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_IOP, 0x0);
844	840	/* map 0x70000 to BAR4(0x20), BAR2(win) */
845	841	if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_IOP_ADDR_BASE)) {
846	842	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
847		- PM8001_FAIL_DBG(pm8001_ha,
848		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
849		- MBIC_IOP_ADDR_BASE));
	843	+ pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
	844	+ MBIC_IOP_ADDR_BASE);
850	845	return -1;
851	846	}
852	847	regVal = pm8001_cr32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1);
853		- PM8001_INIT_DBG(pm8001_ha,
854		- pm8001_printk("MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n", regVal));
	848	+ pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n",
	849	+ regVal);
855	850	pm8001_cw32(pm8001_ha, 2, MBIC_NMI_ENABLE_VPE0_AAP1, 0x0);
856	851
857	852	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE);
858		- PM8001_INIT_DBG(pm8001_ha,
859		- pm8001_printk("PCIE -Event Interrupt Enable = 0x%x\n", regVal));
	853	+ pm8001_dbg(pm8001_ha, INIT, "PCIE -Event Interrupt Enable = 0x%x\n",
	854	+ regVal);
860	855	pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT_ENABLE, 0x0);
861	856
862	857	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT);
863		- PM8001_INIT_DBG(pm8001_ha,
864		- pm8001_printk("PCIE - Event Interrupt = 0x%x\n", regVal));
	858	+ pm8001_dbg(pm8001_ha, INIT, "PCIE - Event Interrupt = 0x%x\n",
	859	+ regVal);
865	860	pm8001_cw32(pm8001_ha, 1, PCIE_EVENT_INTERRUPT, regVal);
866	861
867	862	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE);
868		- PM8001_INIT_DBG(pm8001_ha,
869		- pm8001_printk("PCIE -Error Interrupt Enable = 0x%x\n", regVal));
	863	+ pm8001_dbg(pm8001_ha, INIT, "PCIE -Error Interrupt Enable = 0x%x\n",
	864	+ regVal);
870	865	pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT_ENABLE, 0x0);
871	866
872	867	regVal = pm8001_cr32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT);
873		- PM8001_INIT_DBG(pm8001_ha,
874		- pm8001_printk("PCIE - Error Interrupt = 0x%x\n", regVal));
	868	+ pm8001_dbg(pm8001_ha, INIT, "PCIE - Error Interrupt = 0x%x\n", regVal);
875	869	pm8001_cw32(pm8001_ha, 1, PCIE_ERROR_INTERRUPT, regVal);
876	870
877	871	/* read the scratch pad 1 register bit 2 */
..	..	@@ -887,15 +881,13 @@
887	881	/* map 0x0700000 to BAR4(0x20), BAR2(win) */
888	882	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) {
889	883	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
890		- PM8001_FAIL_DBG(pm8001_ha,
891		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
892		- GSM_ADDR_BASE));
	884	+ pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
	885	+ GSM_ADDR_BASE);
893	886	return -1;
894	887	}
895		- PM8001_INIT_DBG(pm8001_ha,
896		- pm8001_printk("GSM 0x0(0x00007b88)-GSM Configuration and"
897		- " Reset = 0x%x\n",
898		- pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
	888	+ pm8001_dbg(pm8001_ha, INIT,
	889	+ "GSM 0x0(0x00007b88)-GSM Configuration and Reset = 0x%x\n",
	890	+ pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
899	891
900	892	/* step 3: host read GSM Configuration and Reset register */
901	893	regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
..	..	@@ -910,59 +902,52 @@
910	902	regVal &= ~(0x00003b00);
911	903	/* host write GSM Configuration and Reset register */
912	904	pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal);
913		- PM8001_INIT_DBG(pm8001_ha,
914		- pm8001_printk("GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM "
915		- "Configuration and Reset is set to = 0x%x\n",
916		- pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
	905	+ pm8001_dbg(pm8001_ha, INIT,
	906	+ "GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM Configuration and Reset is set to = 0x%x\n",
	907	+ pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
917	908
918	909	/* step 4: */
919	910	/* disable GSM - Read Address Parity Check */
920	911	regVal1 = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
921		- PM8001_INIT_DBG(pm8001_ha,
922		- pm8001_printk("GSM 0x700038 - Read Address Parity Check "
923		- "Enable = 0x%x\n", regVal1));
	912	+ pm8001_dbg(pm8001_ha, INIT,
	913	+ "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n",
	914	+ regVal1);
924	915	pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, 0x0);
925		- PM8001_INIT_DBG(pm8001_ha,
926		- pm8001_printk("GSM 0x700038 - Read Address Parity Check Enable"
927		- "is set to = 0x%x\n",
928		- pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK)));
	916	+ pm8001_dbg(pm8001_ha, INIT,
	917	+ "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n",
	918	+ pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
929	919
930	920	/* disable GSM - Write Address Parity Check */
931	921	regVal2 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
932		- PM8001_INIT_DBG(pm8001_ha,
933		- pm8001_printk("GSM 0x700040 - Write Address Parity Check"
934		- " Enable = 0x%x\n", regVal2));
	922	+ pm8001_dbg(pm8001_ha, INIT,
	923	+ "GSM 0x700040 - Write Address Parity Check Enable = 0x%x\n",
	924	+ regVal2);
935	925	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, 0x0);
936		- PM8001_INIT_DBG(pm8001_ha,
937		- pm8001_printk("GSM 0x700040 - Write Address Parity Check "
938		- "Enable is set to = 0x%x\n",
939		- pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK)));
	926	+ pm8001_dbg(pm8001_ha, INIT,
	927	+ "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n",
	928	+ pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
940	929
941	930	/* disable GSM - Write Data Parity Check */
942	931	regVal3 = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
943		- PM8001_INIT_DBG(pm8001_ha,
944		- pm8001_printk("GSM 0x300048 - Write Data Parity Check"
945		- " Enable = 0x%x\n", regVal3));
	932	+ pm8001_dbg(pm8001_ha, INIT, "GSM 0x300048 - Write Data Parity Check Enable = 0x%x\n",
	933	+ regVal3);
946	934	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, 0x0);
947		- PM8001_INIT_DBG(pm8001_ha,
948		- pm8001_printk("GSM 0x300048 - Write Data Parity Check Enable"
949		- "is set to = 0x%x\n",
950		- pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK)));
	935	+ pm8001_dbg(pm8001_ha, INIT,
	936	+ "GSM 0x300048 - Write Data Parity Check Enable is set to = 0x%x\n",
	937	+ pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
951	938
952	939	/* step 5: delay 10 usec */
953	940	udelay(10);
954	941	/* step 5-b: set GPIO-0 output control to tristate anyway */
955	942	if (-1 == pm8001_bar4_shift(pm8001_ha, GPIO_ADDR_BASE)) {
956	943	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
957		- PM8001_INIT_DBG(pm8001_ha,
958		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
959		- GPIO_ADDR_BASE));
	944	+ pm8001_dbg(pm8001_ha, INIT, "Shift Bar4 to 0x%x failed\n",
	945	+ GPIO_ADDR_BASE);
960	946	return -1;
961	947	}
962	948	regVal = pm8001_cr32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET);
963		- PM8001_INIT_DBG(pm8001_ha,
964		- pm8001_printk("GPIO Output Control Register:"
965		- " = 0x%x\n", regVal));
	949	+ pm8001_dbg(pm8001_ha, INIT, "GPIO Output Control Register: = 0x%x\n",
	950	+ regVal);
966	951	/* set GPIO-0 output control to tri-state */
967	952	regVal &= 0xFFFFFFFC;
968	953	pm8001_cw32(pm8001_ha, 2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET, regVal);
..	..	@@ -971,23 +956,20 @@
971	956	/* map 0x00000 to BAR4(0x20), BAR2(win) */
972	957	if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) {
973	958	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
974		- PM8001_FAIL_DBG(pm8001_ha,
975		- pm8001_printk("SPC Shift Bar4 to 0x%x failed\n",
976		- SPC_TOP_LEVEL_ADDR_BASE));
	959	+ pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n",
	960	+ SPC_TOP_LEVEL_ADDR_BASE);
977	961	return -1;
978	962	}
979	963	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
980		- PM8001_INIT_DBG(pm8001_ha,
981		- pm8001_printk("Top Register before resetting IOP/AAP1"
982		- ":= 0x%x\n", regVal));
	964	+ pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting IOP/AAP1:= 0x%x\n",
	965	+ regVal);
983	966	regVal &= ~(SPC_REG_RESET_PCS_IOP_SS \| SPC_REG_RESET_PCS_AAP1_SS);
984	967	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
985	968
986	969	/* step 7: Reset the BDMA/OSSP */
987	970	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
988		- PM8001_INIT_DBG(pm8001_ha,
989		- pm8001_printk("Top Register before resetting BDMA/OSSP"
990		- ": = 0x%x\n", regVal));
	971	+ pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting BDMA/OSSP: = 0x%x\n",
	972	+ regVal);
991	973	regVal &= ~(SPC_REG_RESET_BDMA_CORE \| SPC_REG_RESET_OSSP);
992	974	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
993	975
..	..	@@ -996,9 +978,9 @@
996	978
997	979	/* step 9: bring the BDMA and OSSP out of reset */
998	980	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
999		- PM8001_INIT_DBG(pm8001_ha,
1000		- pm8001_printk("Top Register before bringing up BDMA/OSSP"
1001		- ":= 0x%x\n", regVal));
	981	+ pm8001_dbg(pm8001_ha, INIT,
	982	+ "Top Register before bringing up BDMA/OSSP:= 0x%x\n",
	983	+ regVal);
1002	984	regVal \|= (SPC_REG_RESET_BDMA_CORE \| SPC_REG_RESET_OSSP);
1003	985	pm8001_cw32(pm8001_ha, 2, SPC_REG_RESET, regVal);
1004	986
..	..	@@ -1009,14 +991,13 @@
1009	991	/* map 0x0700000 to BAR4(0x20), BAR2(win) */
1010	992	if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) {
1011	993	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1012		- PM8001_FAIL_DBG(pm8001_ha,
1013		- pm8001_printk("SPC Shift Bar4 to 0x%x failed\n",
1014		- GSM_ADDR_BASE));
	994	+ pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n",
	995	+ GSM_ADDR_BASE);
1015	996	return -1;
1016	997	}
1017		- PM8001_INIT_DBG(pm8001_ha,
1018		- pm8001_printk("GSM 0x0 (0x00007b88)-GSM Configuration and "
1019		- "Reset = 0x%x\n", pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
	998	+ pm8001_dbg(pm8001_ha, INIT,
	999	+ "GSM 0x0 (0x00007b88)-GSM Configuration and Reset = 0x%x\n",
	1000	+ pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
1020	1001	regVal = pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET);
1021	1002	/* Put those bits to high */
1022	1003	/* GSM XCBI offset = 0x70 0000
..	..	@@ -1028,44 +1009,37 @@
1028	1009	*/
1029	1010	regVal \|= (GSM_CONFIG_RESET_VALUE);
1030	1011	pm8001_cw32(pm8001_ha, 2, GSM_CONFIG_RESET, regVal);
1031		- PM8001_INIT_DBG(pm8001_ha,
1032		- pm8001_printk("GSM (0x00004088 ==> 0x00007b88) - GSM"
1033		- " Configuration and Reset is set to = 0x%x\n",
1034		- pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET)));
	1012	+ pm8001_dbg(pm8001_ha, INIT, "GSM (0x00004088 ==> 0x00007b88) - GSM Configuration and Reset is set to = 0x%x\n",
	1013	+ pm8001_cr32(pm8001_ha, 2, GSM_CONFIG_RESET));
1035	1014
1036	1015	/* step 12: Restore GSM - Read Address Parity Check */
1037	1016	regVal = pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK);
1038	1017	/* just for debugging */
1039		- PM8001_INIT_DBG(pm8001_ha,
1040		- pm8001_printk("GSM 0x700038 - Read Address Parity Check Enable"
1041		- " = 0x%x\n", regVal));
	1018	+ pm8001_dbg(pm8001_ha, INIT,
	1019	+ "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n",
	1020	+ regVal);
1042	1021	pm8001_cw32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK, regVal1);
1043		- PM8001_INIT_DBG(pm8001_ha,
1044		- pm8001_printk("GSM 0x700038 - Read Address Parity"
1045		- " Check Enable is set to = 0x%x\n",
1046		- pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK)));
	1022	+ pm8001_dbg(pm8001_ha, INIT, "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n",
	1023	+ pm8001_cr32(pm8001_ha, 2, GSM_READ_ADDR_PARITY_CHECK));
1047	1024	/* Restore GSM - Write Address Parity Check */
1048	1025	regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK);
1049	1026	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK, regVal2);
1050		- PM8001_INIT_DBG(pm8001_ha,
1051		- pm8001_printk("GSM 0x700040 - Write Address Parity Check"
1052		- " Enable is set to = 0x%x\n",
1053		- pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK)));
	1027	+ pm8001_dbg(pm8001_ha, INIT,
	1028	+ "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n",
	1029	+ pm8001_cr32(pm8001_ha, 2, GSM_WRITE_ADDR_PARITY_CHECK));
1054	1030	/* Restore GSM - Write Data Parity Check */
1055	1031	regVal = pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK);
1056	1032	pm8001_cw32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK, regVal3);
1057		- PM8001_INIT_DBG(pm8001_ha,
1058		- pm8001_printk("GSM 0x700048 - Write Data Parity Check Enable"
1059		- "is set to = 0x%x\n",
1060		- pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK)));
	1033	+ pm8001_dbg(pm8001_ha, INIT,
	1034	+ "GSM 0x700048 - Write Data Parity Check Enableis set to = 0x%x\n",
	1035	+ pm8001_cr32(pm8001_ha, 2, GSM_WRITE_DATA_PARITY_CHECK));
1061	1036
1062	1037	/* step 13: bring the IOP and AAP1 out of reset */
1063	1038	/* map 0x00000 to BAR4(0x20), BAR2(win) */
1064	1039	if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) {
1065	1040	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1066		- PM8001_FAIL_DBG(pm8001_ha,
1067		- pm8001_printk("Shift Bar4 to 0x%x failed\n",
1068		- SPC_TOP_LEVEL_ADDR_BASE));
	1041	+ pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n",
	1042	+ SPC_TOP_LEVEL_ADDR_BASE);
1069	1043	return -1;
1070	1044	}
1071	1045	regVal = pm8001_cr32(pm8001_ha, 2, SPC_REG_RESET);
..	..	@@ -1088,22 +1062,20 @@
1088	1062	if (!max_wait_count) {
1089	1063	regVal = pm8001_cr32(pm8001_ha, 0,
1090	1064	MSGU_SCRATCH_PAD_1);
1091		- PM8001_FAIL_DBG(pm8001_ha,
1092		- pm8001_printk("TIMEOUT : ToggleVal 0x%x,"
1093		- "MSGU_SCRATCH_PAD1 = 0x%x\n",
1094		- toggleVal, regVal));
1095		- PM8001_FAIL_DBG(pm8001_ha,
1096		- pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
1097		- pm8001_cr32(pm8001_ha, 0,
1098		- MSGU_SCRATCH_PAD_0)));
1099		- PM8001_FAIL_DBG(pm8001_ha,
1100		- pm8001_printk("SCRATCH_PAD2 value = 0x%x\n",
1101		- pm8001_cr32(pm8001_ha, 0,
1102		- MSGU_SCRATCH_PAD_2)));
1103		- PM8001_FAIL_DBG(pm8001_ha,
1104		- pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
1105		- pm8001_cr32(pm8001_ha, 0,
1106		- MSGU_SCRATCH_PAD_3)));
	1065	+ pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT : ToggleVal 0x%x,MSGU_SCRATCH_PAD1 = 0x%x\n",
	1066	+ toggleVal, regVal);
	1067	+ pm8001_dbg(pm8001_ha, FAIL,
	1068	+ "SCRATCH_PAD0 value = 0x%x\n",
	1069	+ pm8001_cr32(pm8001_ha, 0,
	1070	+ MSGU_SCRATCH_PAD_0));
	1071	+ pm8001_dbg(pm8001_ha, FAIL,
	1072	+ "SCRATCH_PAD2 value = 0x%x\n",
	1073	+ pm8001_cr32(pm8001_ha, 0,
	1074	+ MSGU_SCRATCH_PAD_2));
	1075	+ pm8001_dbg(pm8001_ha, FAIL,
	1076	+ "SCRATCH_PAD3 value = 0x%x\n",
	1077	+ pm8001_cr32(pm8001_ha, 0,
	1078	+ MSGU_SCRATCH_PAD_3));
1107	1079	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1108	1080	return -1;
1109	1081	}
..	..	@@ -1118,22 +1090,22 @@
1118	1090	if (check_fw_ready(pm8001_ha) == -1) {
1119	1091	regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1120	1092	/* return error if MPI Configuration Table not ready */
1121		- PM8001_INIT_DBG(pm8001_ha,
1122		- pm8001_printk("FW not ready SCRATCH_PAD1"
1123		- " = 0x%x\n", regVal));
	1093	+ pm8001_dbg(pm8001_ha, INIT,
	1094	+ "FW not ready SCRATCH_PAD1 = 0x%x\n",
	1095	+ regVal);
1124	1096	regVal = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
1125	1097	/* return error if MPI Configuration Table not ready */
1126		- PM8001_INIT_DBG(pm8001_ha,
1127		- pm8001_printk("FW not ready SCRATCH_PAD2"
1128		- " = 0x%x\n", regVal));
1129		- PM8001_INIT_DBG(pm8001_ha,
1130		- pm8001_printk("SCRATCH_PAD0 value = 0x%x\n",
1131		- pm8001_cr32(pm8001_ha, 0,
1132		- MSGU_SCRATCH_PAD_0)));
1133		- PM8001_INIT_DBG(pm8001_ha,
1134		- pm8001_printk("SCRATCH_PAD3 value = 0x%x\n",
1135		- pm8001_cr32(pm8001_ha, 0,
1136		- MSGU_SCRATCH_PAD_3)));
	1098	+ pm8001_dbg(pm8001_ha, INIT,
	1099	+ "FW not ready SCRATCH_PAD2 = 0x%x\n",
	1100	+ regVal);
	1101	+ pm8001_dbg(pm8001_ha, INIT,
	1102	+ "SCRATCH_PAD0 value = 0x%x\n",
	1103	+ pm8001_cr32(pm8001_ha, 0,
	1104	+ MSGU_SCRATCH_PAD_0));
	1105	+ pm8001_dbg(pm8001_ha, INIT,
	1106	+ "SCRATCH_PAD3 value = 0x%x\n",
	1107	+ pm8001_cr32(pm8001_ha, 0,
	1108	+ MSGU_SCRATCH_PAD_3));
1137	1109	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1138	1110	return -1;
1139	1111	}
..	..	@@ -1141,8 +1113,7 @@
1141	1113	pm8001_bar4_shift(pm8001_ha, 0);
1142	1114	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1143	1115
1144		- PM8001_INIT_DBG(pm8001_ha,
1145		- pm8001_printk("SPC soft reset Complete\n"));
	1116	+ pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n");
1146	1117	return 0;
1147	1118	}
1148	1119
..	..	@@ -1150,8 +1121,7 @@
1150	1121	{
1151	1122	u32 i;
1152	1123	u32 regVal;
1153		- PM8001_INIT_DBG(pm8001_ha,
1154		- pm8001_printk("chip reset start\n"));
	1124	+ pm8001_dbg(pm8001_ha, INIT, "chip reset start\n");
1155	1125
1156	1126	/* do SPC chip reset. */
1157	1127	regVal = pm8001_cr32(pm8001_ha, 1, SPC_REG_RESET);
..	..	@@ -1175,8 +1145,7 @@
1175	1145	mdelay(1);
1176	1146	} while ((--i) != 0);
1177	1147
1178		- PM8001_INIT_DBG(pm8001_ha,
1179		- pm8001_printk("chip reset finished\n"));
	1148	+ pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n");
1180	1149	}
1181	1150
1182	1151	/**
..	..	@@ -1186,7 +1155,7 @@
1186	1155	void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)
1187	1156	{
1188	1157	s8 bar, logical = 0;
1189		- for (bar = 0; bar < 6; bar++) {
	1158	+ for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
1190	1159	/*
1191	1160	** logical BARs for SPC:
1192	1161	** bar 0 and 1 - logical BAR0
..	..	@@ -1204,6 +1173,7 @@
1204	1173	}
1205	1174	}
1206	1175
	1176	+#ifndef PM8001_USE_MSIX
1207	1177	/**
1208	1178	* pm8001_chip_interrupt_enable - enable PM8001 chip interrupt
1209	1179	* @pm8001_ha: our hba card information
..	..	@@ -1225,9 +1195,12 @@
1225	1195	pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL);
1226	1196	}
1227	1197
	1198	+#else
	1199	+
1228	1200	/**
1229	1201	* pm8001_chip_msix_interrupt_enable - enable PM8001 chip interrupt
1230	1202	* @pm8001_ha: our hba card information
	1203	+ * @int_vec_idx: interrupt number to enable
1231	1204	*/
1232	1205	static void
1233	1206	pm8001_chip_msix_interrupt_enable(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -1246,6 +1219,7 @@
1246	1219	/**
1247	1220	* pm8001_chip_msix_interrupt_disable - disable PM8001 chip interrupt
1248	1221	* @pm8001_ha: our hba card information
	1222	+ * @int_vec_idx: interrupt number to disable
1249	1223	*/
1250	1224	static void
1251	1225	pm8001_chip_msix_interrupt_disable(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -1256,35 +1230,36 @@
1256	1230	msi_index += MSIX_TABLE_BASE;
1257	1231	pm8001_cw32(pm8001_ha, 0, msi_index, MSIX_INTERRUPT_DISABLE);
1258	1232	}
	1233	+#endif
1259	1234
1260	1235	/**
1261	1236	* pm8001_chip_interrupt_enable - enable PM8001 chip interrupt
1262	1237	* @pm8001_ha: our hba card information
	1238	+ * @vec: unused
1263	1239	*/
1264	1240	static void
1265	1241	pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
1266	1242	{
1267	1243	#ifdef PM8001_USE_MSIX
1268	1244	pm8001_chip_msix_interrupt_enable(pm8001_ha, 0);
1269		- return;
1270		-#endif
	1245	+#else
1271	1246	pm8001_chip_intx_interrupt_enable(pm8001_ha);
1272		-
	1247	+#endif
1273	1248	}
1274	1249
1275	1250	/**
1276	1251	* pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt
1277	1252	* @pm8001_ha: our hba card information
	1253	+ * @vec: unused
1278	1254	*/
1279	1255	static void
1280	1256	pm8001_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
1281	1257	{
1282	1258	#ifdef PM8001_USE_MSIX
1283	1259	pm8001_chip_msix_interrupt_disable(pm8001_ha, 0);
1284		- return;
1285		-#endif
	1260	+#else
1286	1261	pm8001_chip_intx_interrupt_disable(pm8001_ha);
1287		-
	1262	+#endif
1288	1263	}
1289	1264
1290	1265	/**
..	..	@@ -1334,24 +1309,38 @@
1334	1309	* @circularQ: the inbound queue we want to transfer to HBA.
1335	1310	* @opCode: the operation code represents commands which LLDD and fw recognized.
1336	1311	* @payload: the command payload of each operation command.
	1312	+ * @nb: size in bytes of the command payload
	1313	+ * @responseQueue: queue to interrupt on w/ command response (if any)
1337	1314	*/
1338	1315	int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
1339	1316	struct inbound_queue_table *circularQ,
1340		- u32 opCode, void *payload, u32 responseQueue)
	1317	+ u32 opCode, void *payload, size_t nb,
	1318	+ u32 responseQueue)
1341	1319	{
1342	1320	u32 Header = 0, hpriority = 0, bc = 1, category = 0x02;
1343	1321	void *pMessage;
	1322	+ unsigned long flags;
	1323	+ int q_index = circularQ - pm8001_ha->inbnd_q_tbl;
	1324	+ int rv = -1;
1344	1325
1345		- if (pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
1346		- &pMessage) < 0) {
1347		- PM8001_IO_DBG(pm8001_ha,
1348		- pm8001_printk("No free mpi buffer\n"));
1349		- return -ENOMEM;
	1326	+ if (WARN_ON(q_index >= pm8001_ha->max_q_num))
	1327	+ return -EINVAL;
	1328	+
	1329	+ spin_lock_irqsave(&circularQ->iq_lock, flags);
	1330	+ rv = pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
	1331	+ &pMessage);
	1332	+ if (rv < 0) {
	1333	+ pm8001_dbg(pm8001_ha, IO, "No free mpi buffer\n");
	1334	+ rv = -ENOMEM;
	1335	+ goto done;
1350	1336	}
1351		- BUG_ON(!payload);
1352		- /Copy to the payload/
1353		- memcpy(pMessage, payload, (pm8001_ha->iomb_size -
1354		- sizeof(struct mpi_msg_hdr)));
	1337	+
	1338	+ if (nb > (pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr)))
	1339	+ nb = pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr);
	1340	+ memcpy(pMessage, payload, nb);
	1341	+ if (nb + sizeof(struct mpi_msg_hdr) < pm8001_ha->iomb_size)
	1342	+ memset(pMessage + nb, 0, pm8001_ha->iomb_size -
	1343	+ (nb + sizeof(struct mpi_msg_hdr)));
1355	1344
1356	1345	/Build the header/
1357	1346	Header = ((1 << 31) \| (hpriority << 30) \| ((bc & 0x1f) << 24)
..	..	@@ -1362,11 +1351,13 @@
1362	1351	/Update the PI to the firmware/
1363	1352	pm8001_cw32(pm8001_ha, circularQ->pi_pci_bar,
1364	1353	circularQ->pi_offset, circularQ->producer_idx);
1365		- PM8001_IO_DBG(pm8001_ha,
1366		- pm8001_printk("INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n",
1367		- responseQueue, opCode, circularQ->producer_idx,
1368		- circularQ->consumer_index));
1369		- return 0;
	1354	+ pm8001_dbg(pm8001_ha, DEVIO,
	1355	+ "INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n",
	1356	+ responseQueue, opCode, circularQ->producer_idx,
	1357	+ circularQ->consumer_index);
	1358	+done:
	1359	+ spin_unlock_irqrestore(&circularQ->iq_lock, flags);
	1360	+ return rv;
1370	1361	}
1371	1362
1372	1363	u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info pm8001_ha, void pMsg,
..	..	@@ -1380,17 +1371,17 @@
1380	1371	pOutBoundMsgHeader = (struct mpi_msg_hdr *)(circularQ->base_virt +
1381	1372	circularQ->consumer_idx * pm8001_ha->iomb_size);
1382	1373	if (pOutBoundMsgHeader != msgHeader) {
1383		- PM8001_FAIL_DBG(pm8001_ha,
1384		- pm8001_printk("consumer_idx = %d msgHeader = %p\n",
1385		- circularQ->consumer_idx, msgHeader));
	1374	+ pm8001_dbg(pm8001_ha, FAIL,
	1375	+ "consumer_idx = %d msgHeader = %p\n",
	1376	+ circularQ->consumer_idx, msgHeader);
1386	1377
1387	1378	/* Update the producer index from SPC */
1388	1379	producer_index = pm8001_read_32(circularQ->pi_virt);
1389	1380	circularQ->producer_index = cpu_to_le32(producer_index);
1390		- PM8001_FAIL_DBG(pm8001_ha,
1391		- pm8001_printk("consumer_idx = %d producer_index = %d"
1392		- "msgHeader = %p\n", circularQ->consumer_idx,
1393		- circularQ->producer_index, msgHeader));
	1381	+ pm8001_dbg(pm8001_ha, FAIL,
	1382	+ "consumer_idx = %d producer_index = %dmsgHeader = %p\n",
	1383	+ circularQ->consumer_idx,
	1384	+ circularQ->producer_index, msgHeader);
1394	1385	return 0;
1395	1386	}
1396	1387	/* free the circular queue buffer elements associated with the message*/
..	..	@@ -1402,9 +1393,8 @@
1402	1393	/* Update the producer index from SPC*/
1403	1394	producer_index = pm8001_read_32(circularQ->pi_virt);
1404	1395	circularQ->producer_index = cpu_to_le32(producer_index);
1405		- PM8001_IO_DBG(pm8001_ha,
1406		- pm8001_printk(" CI=%d PI=%d\n", circularQ->consumer_idx,
1407		- circularQ->producer_index));
	1396	+ pm8001_dbg(pm8001_ha, IO, " CI=%d PI=%d\n",
	1397	+ circularQ->consumer_idx, circularQ->producer_index);
1408	1398	return 0;
1409	1399	}
1410	1400
..	..	@@ -1434,6 +1424,10 @@
1434	1424	/* read header */
1435	1425	header_tmp = pm8001_read_32(msgHeader);
1436	1426	msgHeader_tmp = cpu_to_le32(header_tmp);
	1427	+ pm8001_dbg(pm8001_ha, DEVIO,
	1428	+ "outbound opcode msgheader:%x ci=%d pi=%d\n",
	1429	+ msgHeader_tmp, circularQ->consumer_idx,
	1430	+ circularQ->producer_index);
1437	1431	if (0 != (le32_to_cpu(msgHeader_tmp) & 0x80000000)) {
1438	1432	if (OPC_OUB_SKIP_ENTRY !=
1439	1433	(le32_to_cpu(msgHeader_tmp) & 0xfff)) {
..	..	@@ -1442,12 +1436,11 @@
1442	1436	sizeof(struct mpi_msg_hdr);
1443	1437	*pBC = (u8)((le32_to_cpu(msgHeader_tmp)
1444	1438	>> 24) & 0x1f);
1445		- PM8001_IO_DBG(pm8001_ha,
1446		- pm8001_printk(": CI=%d PI=%d "
1447		- "msgHeader=%x\n",
1448		- circularQ->consumer_idx,
1449		- circularQ->producer_index,
1450		- msgHeader_tmp));
	1439	+ pm8001_dbg(pm8001_ha, IO,
	1440	+ ": CI=%d PI=%d msgHeader=%x\n",
	1441	+ circularQ->consumer_idx,
	1442	+ circularQ->producer_index,
	1443	+ msgHeader_tmp);
1451	1444	return MPI_IO_STATUS_SUCCESS;
1452	1445	} else {
1453	1446	circularQ->consumer_idx =
..	..	@@ -1556,17 +1549,15 @@
1556	1549	ts->stat = SAS_QUEUE_FULL;
1557	1550	pm8001_dev = ccb->device;
1558	1551	if (pm8001_dev)
1559		- pm8001_dev->running_req--;
	1552	+ atomic_dec(&pm8001_dev->running_req);
1560	1553	spin_lock_irqsave(&t->task_state_lock, flags1);
1561	1554	t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
1562	1555	t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
1563	1556	t->task_state_flags \|= SAS_TASK_STATE_DONE;
1564	1557	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
1565	1558	spin_unlock_irqrestore(&t->task_state_lock, flags1);
1566		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p"
1567		- " done with event 0x%x resp 0x%x stat 0x%x but"
1568		- " aborted by upper layer!\n",
1569		- t, pw->handler, ts->resp, ts->stat));
	1559	+ pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	1560	+ t, pw->handler, ts->resp, ts->stat);
1570	1561	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
1571	1562	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1572	1563	} else {
..	..	@@ -1586,25 +1577,16 @@
1586	1577	unsigned long flags, flags1;
1587	1578	int i, ret = 0;
1588	1579
1589		- PM8001_IO_DBG(pm8001_ha,
1590		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	1580	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
1591	1581
1592	1582	ret = pm8001_query_task(t);
1593	1583
1594		- PM8001_IO_DBG(pm8001_ha,
1595		- switch (ret) {
1596		- case TMF_RESP_FUNC_SUCC:
1597		- pm8001_printk("...Task on lu\n");
1598		- break;
1599		-
1600		- case TMF_RESP_FUNC_COMPLETE:
1601		- pm8001_printk("...Task NOT on lu\n");
1602		- break;
1603		-
1604		- default:
1605		- pm8001_printk("...query task failed!!!\n");
1606		- break;
1607		- });
	1584	+ if (ret == TMF_RESP_FUNC_SUCC)
	1585	+ pm8001_dbg(pm8001_ha, IO, "...Task on lu\n");
	1586	+ else if (ret == TMF_RESP_FUNC_COMPLETE)
	1587	+ pm8001_dbg(pm8001_ha, IO, "...Task NOT on lu\n");
	1588	+ else
	1589	+ pm8001_dbg(pm8001_ha, DEVIO, "...query task failed!!!\n");
1608	1590
1609	1591	spin_lock_irqsave(&pm8001_ha->lock, flags);
1610	1592
..	..	@@ -1649,8 +1631,7 @@
1649	1631	break;
1650	1632	default: /* device misbehavior */
1651	1633	ret = TMF_RESP_FUNC_FAILED;
1652		- PM8001_IO_DBG(pm8001_ha,
1653		- pm8001_printk("...Reset phy\n"));
	1634	+ pm8001_dbg(pm8001_ha, IO, "...Reset phy\n");
1654	1635	pm8001_I_T_nexus_reset(dev);
1655	1636	break;
1656	1637	}
..	..	@@ -1664,15 +1645,14 @@
1664	1645	default: /* device misbehavior */
1665	1646	spin_unlock_irqrestore(&pm8001_ha->lock, flags);
1666	1647	ret = TMF_RESP_FUNC_FAILED;
1667		- PM8001_IO_DBG(pm8001_ha,
1668		- pm8001_printk("...Reset phy\n"));
	1648	+ pm8001_dbg(pm8001_ha, IO, "...Reset phy\n");
1669	1649	pm8001_I_T_nexus_reset(dev);
1670	1650	}
1671	1651
1672	1652	if (ret == TMF_RESP_FUNC_FAILED)
1673	1653	t = NULL;
1674	1654	pm8001_open_reject_retry(pm8001_ha, t, pm8001_dev);
1675		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("...Complete\n"));
	1655	+ pm8001_dbg(pm8001_ha, IO, "...Complete\n");
1676	1656	} break;
1677	1657	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
1678	1658	dev = pm8001_dev->sas_device;
..	..	@@ -1726,28 +1706,29 @@
1726	1706	int ret;
1727	1707
1728	1708	if (!pm8001_ha_dev) {
1729		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n"));
	1709	+ pm8001_dbg(pm8001_ha, FAIL, "dev is null\n");
1730	1710	return;
1731	1711	}
1732	1712
1733	1713	task = sas_alloc_slow_task(GFP_ATOMIC);
1734		-
1735	1714	if (!task) {
1736		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot "
1737		- "allocate task\n"));
	1715	+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n");
1738	1716	return;
1739	1717	}
1740	1718
1741	1719	task->task_done = pm8001_task_done;
1742	1720
1743	1721	res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
1744		- if (res)
	1722	+ if (res) {
	1723	+ sas_free_task(task);
1745	1724	return;
	1725	+ }
1746	1726
1747	1727	ccb = &pm8001_ha->ccb_info[ccb_tag];
1748	1728	ccb->device = pm8001_ha_dev;
1749	1729	ccb->ccb_tag = ccb_tag;
1750	1730	ccb->task = task;
	1731	+ ccb->n_elem = 0;
1751	1732
1752	1733	circularQ = &pm8001_ha->inbnd_q_tbl[0];
1753	1734
..	..	@@ -1756,9 +1737,12 @@
1756	1737	task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
1757	1738	task_abort.tag = cpu_to_le32(ccb_tag);
1758	1739
1759		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 0);
1760		- if (ret)
	1740	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort,
	1741	+ sizeof(task_abort), 0);
	1742	+ if (ret) {
	1743	+ sas_free_task(task);
1761	1744	pm8001_tag_free(pm8001_ha, ccb_tag);
	1745	+ }
1762	1746
1763	1747	}
1764	1748
..	..	@@ -1778,8 +1762,7 @@
1778	1762	task = sas_alloc_slow_task(GFP_ATOMIC);
1779	1763
1780	1764	if (!task) {
1781		- PM8001_FAIL_DBG(pm8001_ha,
1782		- pm8001_printk("cannot allocate task !!!\n"));
	1765	+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n");
1783	1766	return;
1784	1767	}
1785	1768	task->task_done = pm8001_task_done;
..	..	@@ -1787,8 +1770,7 @@
1787	1770	res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
1788	1771	if (res) {
1789	1772	sas_free_task(task);
1790		- PM8001_FAIL_DBG(pm8001_ha,
1791		- pm8001_printk("cannot allocate tag !!!\n"));
	1773	+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n");
1792	1774	return;
1793	1775	}
1794	1776
..	..	@@ -1799,8 +1781,8 @@
1799	1781	if (!dev) {
1800	1782	sas_free_task(task);
1801	1783	pm8001_tag_free(pm8001_ha, ccb_tag);
1802		- PM8001_FAIL_DBG(pm8001_ha,
1803		- pm8001_printk("Domain device cannot be allocated\n"));
	1784	+ pm8001_dbg(pm8001_ha, FAIL,
	1785	+ "Domain device cannot be allocated\n");
1804	1786	return;
1805	1787	}
1806	1788	task->dev = dev;
..	..	@@ -1810,6 +1792,7 @@
1810	1792	ccb->device = pm8001_ha_dev;
1811	1793	ccb->ccb_tag = ccb_tag;
1812	1794	ccb->task = task;
	1795	+ ccb->n_elem = 0;
1813	1796	pm8001_ha_dev->id \|= NCQ_READ_LOG_FLAG;
1814	1797	pm8001_ha_dev->id \|= NCQ_2ND_RLE_FLAG;
1815	1798
..	..	@@ -1826,10 +1809,11 @@
1826	1809
1827	1810	sata_cmd.tag = cpu_to_le32(ccb_tag);
1828	1811	sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
1829		- sata_cmd.ncqtag_atap_dir_m \|= ((0x1 << 7) \| (0x5 << 9));
	1812	+ sata_cmd.ncqtag_atap_dir_m = cpu_to_le32((0x1 << 7) \| (0x5 << 9));
1830	1813	memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis));
1831	1814
1832		- res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 0);
	1815	+ res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd,
	1816	+ sizeof(sata_cmd), 0);
1833	1817	if (res) {
1834	1818	sas_free_task(task);
1835	1819	pm8001_tag_free(pm8001_ha, ccb_tag);
..	..	@@ -1876,22 +1860,25 @@
1876	1860	t = ccb->task;
1877	1861
1878	1862	if (status && status != IO_UNDERFLOW)
1879		- PM8001_FAIL_DBG(pm8001_ha,
1880		- pm8001_printk("sas IO status 0x%x\n", status));
	1863	+ pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status);
1881	1864	if (unlikely(!t \|\| !t->lldd_task \|\| !t->dev))
1882	1865	return;
1883	1866	ts = &t->task_status;
1884	1867	/* Print sas address of IO failed device */
1885	1868	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
1886	1869	(status != IO_UNDERFLOW))
1887		- PM8001_FAIL_DBG(pm8001_ha,
1888		- pm8001_printk("SAS Address of IO Failure Drive:"
1889		- "%016llx", SAS_ADDR(t->dev->sas_addr)));
	1870	+ pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n",
	1871	+ SAS_ADDR(t->dev->sas_addr));
	1872	+
	1873	+ if (status)
	1874	+ pm8001_dbg(pm8001_ha, IOERR,
	1875	+ "status:0x%x, tag:0x%x, task:0x%p\n",
	1876	+ status, tag, t);
1890	1877
1891	1878	switch (status) {
1892	1879	case IO_SUCCESS:
1893		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS"
1894		- ",param = %d\n", param));
	1880	+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS,param = %d\n",
	1881	+ param);
1895	1882	if (param == 0) {
1896	1883	ts->resp = SAS_TASK_COMPLETE;
1897	1884	ts->stat = SAM_STAT_GOOD;
..	..	@@ -1903,69 +1890,63 @@
1903	1890	sas_ssp_task_response(pm8001_ha->dev, t, iu);
1904	1891	}
1905	1892	if (pm8001_dev)
1906		- pm8001_dev->running_req--;
	1893	+ atomic_dec(&pm8001_dev->running_req);
1907	1894	break;
1908	1895	case IO_ABORTED:
1909		- PM8001_IO_DBG(pm8001_ha,
1910		- pm8001_printk("IO_ABORTED IOMB Tag\n"));
	1896	+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
1911	1897	ts->resp = SAS_TASK_COMPLETE;
1912	1898	ts->stat = SAS_ABORTED_TASK;
1913	1899	break;
1914	1900	case IO_UNDERFLOW:
1915	1901	/* SSP Completion with error */
1916		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW"
1917		- ",param = %d\n", param));
	1902	+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW,param = %d\n",
	1903	+ param);
1918	1904	ts->resp = SAS_TASK_COMPLETE;
1919	1905	ts->stat = SAS_DATA_UNDERRUN;
1920	1906	ts->residual = param;
1921	1907	if (pm8001_dev)
1922		- pm8001_dev->running_req--;
	1908	+ atomic_dec(&pm8001_dev->running_req);
1923	1909	break;
1924	1910	case IO_NO_DEVICE:
1925		- PM8001_IO_DBG(pm8001_ha,
1926		- pm8001_printk("IO_NO_DEVICE\n"));
	1911	+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
1927	1912	ts->resp = SAS_TASK_UNDELIVERED;
1928	1913	ts->stat = SAS_PHY_DOWN;
1929	1914	break;
1930	1915	case IO_XFER_ERROR_BREAK:
1931		- PM8001_IO_DBG(pm8001_ha,
1932		- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
	1916	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
1933	1917	ts->resp = SAS_TASK_COMPLETE;
1934	1918	ts->stat = SAS_OPEN_REJECT;
1935	1919	/* Force the midlayer to retry */
1936	1920	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1937	1921	break;
1938	1922	case IO_XFER_ERROR_PHY_NOT_READY:
1939		- PM8001_IO_DBG(pm8001_ha,
1940		- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
	1923	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
1941	1924	ts->resp = SAS_TASK_COMPLETE;
1942	1925	ts->stat = SAS_OPEN_REJECT;
1943	1926	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1944	1927	break;
1945	1928	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
1946		- PM8001_IO_DBG(pm8001_ha,
1947		- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
	1929	+ pm8001_dbg(pm8001_ha, IO,
	1930	+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
1948	1931	ts->resp = SAS_TASK_COMPLETE;
1949	1932	ts->stat = SAS_OPEN_REJECT;
1950	1933	ts->open_rej_reason = SAS_OREJ_EPROTO;
1951	1934	break;
1952	1935	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
1953		- PM8001_IO_DBG(pm8001_ha,
1954		- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
	1936	+ pm8001_dbg(pm8001_ha, IO,
	1937	+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
1955	1938	ts->resp = SAS_TASK_COMPLETE;
1956	1939	ts->stat = SAS_OPEN_REJECT;
1957	1940	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
1958	1941	break;
1959	1942	case IO_OPEN_CNX_ERROR_BREAK:
1960		- PM8001_IO_DBG(pm8001_ha,
1961		- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
	1943	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
1962	1944	ts->resp = SAS_TASK_COMPLETE;
1963	1945	ts->stat = SAS_OPEN_REJECT;
1964	1946	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1965	1947	break;
1966	1948	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
1967		- PM8001_IO_DBG(pm8001_ha,
1968		- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
	1949	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
1969	1950	ts->resp = SAS_TASK_COMPLETE;
1970	1951	ts->stat = SAS_OPEN_REJECT;
1971	1952	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
..	..	@@ -1975,68 +1956,59 @@
1975	1956	IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
1976	1957	break;
1977	1958	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
1978		- PM8001_IO_DBG(pm8001_ha,
1979		- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
	1959	+ pm8001_dbg(pm8001_ha, IO,
	1960	+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
1980	1961	ts->resp = SAS_TASK_COMPLETE;
1981	1962	ts->stat = SAS_OPEN_REJECT;
1982	1963	ts->open_rej_reason = SAS_OREJ_BAD_DEST;
1983	1964	break;
1984	1965	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
1985		- PM8001_IO_DBG(pm8001_ha,
1986		- pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
1987		- "NOT_SUPPORTED\n"));
	1966	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
1988	1967	ts->resp = SAS_TASK_COMPLETE;
1989	1968	ts->stat = SAS_OPEN_REJECT;
1990	1969	ts->open_rej_reason = SAS_OREJ_CONN_RATE;
1991	1970	break;
1992	1971	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
1993		- PM8001_IO_DBG(pm8001_ha,
1994		- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
	1972	+ pm8001_dbg(pm8001_ha, IO,
	1973	+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
1995	1974	ts->resp = SAS_TASK_UNDELIVERED;
1996	1975	ts->stat = SAS_OPEN_REJECT;
1997	1976	ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
1998	1977	break;
1999	1978	case IO_XFER_ERROR_NAK_RECEIVED:
2000		- PM8001_IO_DBG(pm8001_ha,
2001		- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
	1979	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
2002	1980	ts->resp = SAS_TASK_COMPLETE;
2003	1981	ts->stat = SAS_OPEN_REJECT;
2004	1982	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2005	1983	break;
2006	1984	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
2007		- PM8001_IO_DBG(pm8001_ha,
2008		- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
	1985	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
2009	1986	ts->resp = SAS_TASK_COMPLETE;
2010	1987	ts->stat = SAS_NAK_R_ERR;
2011	1988	break;
2012	1989	case IO_XFER_ERROR_DMA:
2013		- PM8001_IO_DBG(pm8001_ha,
2014		- pm8001_printk("IO_XFER_ERROR_DMA\n"));
	1990	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
2015	1991	ts->resp = SAS_TASK_COMPLETE;
2016	1992	ts->stat = SAS_OPEN_REJECT;
2017	1993	break;
2018	1994	case IO_XFER_OPEN_RETRY_TIMEOUT:
2019		- PM8001_IO_DBG(pm8001_ha,
2020		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	1995	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
2021	1996	ts->resp = SAS_TASK_COMPLETE;
2022	1997	ts->stat = SAS_OPEN_REJECT;
2023	1998	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2024	1999	break;
2025	2000	case IO_XFER_ERROR_OFFSET_MISMATCH:
2026		- PM8001_IO_DBG(pm8001_ha,
2027		- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
	2001	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
2028	2002	ts->resp = SAS_TASK_COMPLETE;
2029	2003	ts->stat = SAS_OPEN_REJECT;
2030	2004	break;
2031	2005	case IO_PORT_IN_RESET:
2032		- PM8001_IO_DBG(pm8001_ha,
2033		- pm8001_printk("IO_PORT_IN_RESET\n"));
	2006	+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
2034	2007	ts->resp = SAS_TASK_COMPLETE;
2035	2008	ts->stat = SAS_OPEN_REJECT;
2036	2009	break;
2037	2010	case IO_DS_NON_OPERATIONAL:
2038		- PM8001_IO_DBG(pm8001_ha,
2039		- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
	2011	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
2040	2012	ts->resp = SAS_TASK_COMPLETE;
2041	2013	ts->stat = SAS_OPEN_REJECT;
2042	2014	if (!t->uldd_task)
..	..	@@ -2045,51 +2017,44 @@
2045	2017	IO_DS_NON_OPERATIONAL);
2046	2018	break;
2047	2019	case IO_DS_IN_RECOVERY:
2048		- PM8001_IO_DBG(pm8001_ha,
2049		- pm8001_printk("IO_DS_IN_RECOVERY\n"));
	2020	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
2050	2021	ts->resp = SAS_TASK_COMPLETE;
2051	2022	ts->stat = SAS_OPEN_REJECT;
2052	2023	break;
2053	2024	case IO_TM_TAG_NOT_FOUND:
2054		- PM8001_IO_DBG(pm8001_ha,
2055		- pm8001_printk("IO_TM_TAG_NOT_FOUND\n"));
	2025	+ pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n");
2056	2026	ts->resp = SAS_TASK_COMPLETE;
2057	2027	ts->stat = SAS_OPEN_REJECT;
2058	2028	break;
2059	2029	case IO_SSP_EXT_IU_ZERO_LEN_ERROR:
2060		- PM8001_IO_DBG(pm8001_ha,
2061		- pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"));
	2030	+ pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n");
2062	2031	ts->resp = SAS_TASK_COMPLETE;
2063	2032	ts->stat = SAS_OPEN_REJECT;
2064	2033	break;
2065	2034	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
2066		- PM8001_IO_DBG(pm8001_ha,
2067		- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
	2035	+ pm8001_dbg(pm8001_ha, IO,
	2036	+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
2068	2037	ts->resp = SAS_TASK_COMPLETE;
2069	2038	ts->stat = SAS_OPEN_REJECT;
2070	2039	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2071	2040	break;
2072	2041	default:
2073		- PM8001_IO_DBG(pm8001_ha,
2074		- pm8001_printk("Unknown status 0x%x\n", status));
	2042	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
2075	2043	/* not allowed case. Therefore, return failed status */
2076	2044	ts->resp = SAS_TASK_COMPLETE;
2077	2045	ts->stat = SAS_OPEN_REJECT;
2078	2046	break;
2079	2047	}
2080		- PM8001_IO_DBG(pm8001_ha,
2081		- pm8001_printk("scsi_status = %x\n ",
2082		- psspPayload->ssp_resp_iu.status));
	2048	+ pm8001_dbg(pm8001_ha, IO, "scsi_status = %x\n",
	2049	+ psspPayload->ssp_resp_iu.status);
2083	2050	spin_lock_irqsave(&t->task_state_lock, flags);
2084	2051	t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
2085	2052	t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
2086	2053	t->task_state_flags \|= SAS_TASK_STATE_DONE;
2087	2054	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
2088	2055	spin_unlock_irqrestore(&t->task_state_lock, flags);
2089		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
2090		- " io_status 0x%x resp 0x%x "
2091		- "stat 0x%x but aborted by upper layer!\n",
2092		- t, status, ts->resp, ts->stat));
	2056	+ pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	2057	+ t, status, ts->resp, ts->stat);
2093	2058	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2094	2059	} else {
2095	2060	spin_unlock_irqrestore(&t->task_state_lock, flags);
..	..	@@ -2118,60 +2083,52 @@
2118	2083	t = ccb->task;
2119	2084	pm8001_dev = ccb->device;
2120	2085	if (event)
2121		- PM8001_FAIL_DBG(pm8001_ha,
2122		- pm8001_printk("sas IO status 0x%x\n", event));
	2086	+ pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event);
2123	2087	if (unlikely(!t \|\| !t->lldd_task \|\| !t->dev))
2124	2088	return;
2125	2089	ts = &t->task_status;
2126		- PM8001_IO_DBG(pm8001_ha,
2127		- pm8001_printk("port_id = %x,device_id = %x\n",
2128		- port_id, dev_id));
	2090	+ pm8001_dbg(pm8001_ha, DEVIO, "port_id = %x,device_id = %x\n",
	2091	+ port_id, dev_id);
2129	2092	switch (event) {
2130	2093	case IO_OVERFLOW:
2131		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");)
	2094	+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
2132	2095	ts->resp = SAS_TASK_COMPLETE;
2133	2096	ts->stat = SAS_DATA_OVERRUN;
2134	2097	ts->residual = 0;
2135	2098	if (pm8001_dev)
2136		- pm8001_dev->running_req--;
	2099	+ atomic_dec(&pm8001_dev->running_req);
2137	2100	break;
2138	2101	case IO_XFER_ERROR_BREAK:
2139		- PM8001_IO_DBG(pm8001_ha,
2140		- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
	2102	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
2141	2103	pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK);
2142	2104	return;
2143	2105	case IO_XFER_ERROR_PHY_NOT_READY:
2144		- PM8001_IO_DBG(pm8001_ha,
2145		- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
	2106	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
2146	2107	ts->resp = SAS_TASK_COMPLETE;
2147	2108	ts->stat = SAS_OPEN_REJECT;
2148	2109	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2149	2110	break;
2150	2111	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2151		- PM8001_IO_DBG(pm8001_ha,
2152		- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
2153		- "_SUPPORTED\n"));
	2112	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
2154	2113	ts->resp = SAS_TASK_COMPLETE;
2155	2114	ts->stat = SAS_OPEN_REJECT;
2156	2115	ts->open_rej_reason = SAS_OREJ_EPROTO;
2157	2116	break;
2158	2117	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2159		- PM8001_IO_DBG(pm8001_ha,
2160		- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
	2118	+ pm8001_dbg(pm8001_ha, IO,
	2119	+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
2161	2120	ts->resp = SAS_TASK_COMPLETE;
2162	2121	ts->stat = SAS_OPEN_REJECT;
2163	2122	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
2164	2123	break;
2165	2124	case IO_OPEN_CNX_ERROR_BREAK:
2166		- PM8001_IO_DBG(pm8001_ha,
2167		- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
	2125	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
2168	2126	ts->resp = SAS_TASK_COMPLETE;
2169	2127	ts->stat = SAS_OPEN_REJECT;
2170	2128	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2171	2129	break;
2172	2130	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
2173		- PM8001_IO_DBG(pm8001_ha,
2174		- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
	2131	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
2175	2132	ts->resp = SAS_TASK_COMPLETE;
2176	2133	ts->stat = SAS_OPEN_REJECT;
2177	2134	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
..	..	@@ -2181,88 +2138,78 @@
2181	2138	IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
2182	2139	break;
2183	2140	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2184		- PM8001_IO_DBG(pm8001_ha,
2185		- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
	2141	+ pm8001_dbg(pm8001_ha, IO,
	2142	+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
2186	2143	ts->resp = SAS_TASK_COMPLETE;
2187	2144	ts->stat = SAS_OPEN_REJECT;
2188	2145	ts->open_rej_reason = SAS_OREJ_BAD_DEST;
2189	2146	break;
2190	2147	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2191		- PM8001_IO_DBG(pm8001_ha,
2192		- pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
2193		- "NOT_SUPPORTED\n"));
	2148	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
2194	2149	ts->resp = SAS_TASK_COMPLETE;
2195	2150	ts->stat = SAS_OPEN_REJECT;
2196	2151	ts->open_rej_reason = SAS_OREJ_CONN_RATE;
2197	2152	break;
2198	2153	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2199		- PM8001_IO_DBG(pm8001_ha,
2200		- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
	2154	+ pm8001_dbg(pm8001_ha, IO,
	2155	+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
2201	2156	ts->resp = SAS_TASK_COMPLETE;
2202	2157	ts->stat = SAS_OPEN_REJECT;
2203	2158	ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
2204	2159	break;
2205	2160	case IO_XFER_ERROR_NAK_RECEIVED:
2206		- PM8001_IO_DBG(pm8001_ha,
2207		- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
	2161	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
2208	2162	ts->resp = SAS_TASK_COMPLETE;
2209	2163	ts->stat = SAS_OPEN_REJECT;
2210	2164	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2211	2165	break;
2212	2166	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
2213		- PM8001_IO_DBG(pm8001_ha,
2214		- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
	2167	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
2215	2168	ts->resp = SAS_TASK_COMPLETE;
2216	2169	ts->stat = SAS_NAK_R_ERR;
2217	2170	break;
2218	2171	case IO_XFER_OPEN_RETRY_TIMEOUT:
2219		- PM8001_IO_DBG(pm8001_ha,
2220		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	2172	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
2221	2173	pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT);
2222	2174	return;
2223	2175	case IO_XFER_ERROR_UNEXPECTED_PHASE:
2224		- PM8001_IO_DBG(pm8001_ha,
2225		- pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
	2176	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
2226	2177	ts->resp = SAS_TASK_COMPLETE;
2227	2178	ts->stat = SAS_DATA_OVERRUN;
2228	2179	break;
2229	2180	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
2230		- PM8001_IO_DBG(pm8001_ha,
2231		- pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
	2181	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
2232	2182	ts->resp = SAS_TASK_COMPLETE;
2233	2183	ts->stat = SAS_DATA_OVERRUN;
2234	2184	break;
2235	2185	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
2236		- PM8001_IO_DBG(pm8001_ha,
2237		- pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
	2186	+ pm8001_dbg(pm8001_ha, IO,
	2187	+ "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
2238	2188	ts->resp = SAS_TASK_COMPLETE;
2239	2189	ts->stat = SAS_DATA_OVERRUN;
2240	2190	break;
2241	2191	case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT:
2242		- PM8001_IO_DBG(pm8001_ha,
2243		- pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"));
	2192	+ pm8001_dbg(pm8001_ha, IO,
	2193	+ "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n");
2244	2194	ts->resp = SAS_TASK_COMPLETE;
2245	2195	ts->stat = SAS_DATA_OVERRUN;
2246	2196	break;
2247	2197	case IO_XFER_ERROR_OFFSET_MISMATCH:
2248		- PM8001_IO_DBG(pm8001_ha,
2249		- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
	2198	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
2250	2199	ts->resp = SAS_TASK_COMPLETE;
2251	2200	ts->stat = SAS_DATA_OVERRUN;
2252	2201	break;
2253	2202	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
2254		- PM8001_IO_DBG(pm8001_ha,
2255		- pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
	2203	+ pm8001_dbg(pm8001_ha, IO,
	2204	+ "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
2256	2205	ts->resp = SAS_TASK_COMPLETE;
2257	2206	ts->stat = SAS_DATA_OVERRUN;
2258	2207	break;
2259	2208	case IO_XFER_CMD_FRAME_ISSUED:
2260		- PM8001_IO_DBG(pm8001_ha,
2261		- pm8001_printk(" IO_XFER_CMD_FRAME_ISSUED\n"));
	2209	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
2262	2210	return;
2263	2211	default:
2264		- PM8001_IO_DBG(pm8001_ha,
2265		- pm8001_printk("Unknown status 0x%x\n", event));
	2212	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
2266	2213	/* not allowed case. Therefore, return failed status */
2267	2214	ts->resp = SAS_TASK_COMPLETE;
2268	2215	ts->stat = SAS_DATA_OVERRUN;
..	..	@@ -2274,10 +2221,8 @@
2274	2221	t->task_state_flags \|= SAS_TASK_STATE_DONE;
2275	2222	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
2276	2223	spin_unlock_irqrestore(&t->task_state_lock, flags);
2277		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
2278		- " event 0x%x resp 0x%x "
2279		- "stat 0x%x but aborted by upper layer!\n",
2280		- t, event, ts->resp, ts->stat));
	2224	+ pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	2225	+ t, event, ts->resp, ts->stat);
2281	2226	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2282	2227	} else {
2283	2228	spin_unlock_irqrestore(&t->task_state_lock, flags);
..	..	@@ -2313,8 +2258,7 @@
2313	2258	tag = le32_to_cpu(psataPayload->tag);
2314	2259
2315	2260	if (!tag) {
2316		- PM8001_FAIL_DBG(pm8001_ha,
2317		- pm8001_printk("tag null\n"));
	2261	+ pm8001_dbg(pm8001_ha, FAIL, "tag null\n");
2318	2262	return;
2319	2263	}
2320	2264	ccb = &pm8001_ha->ccb_info[tag];
..	..	@@ -2323,8 +2267,7 @@
2323	2267	t = ccb->task;
2324	2268	pm8001_dev = ccb->device;
2325	2269	} else {
2326		- PM8001_FAIL_DBG(pm8001_ha,
2327		- pm8001_printk("ccb null\n"));
	2270	+ pm8001_dbg(pm8001_ha, FAIL, "ccb null\n");
2328	2271	return;
2329	2272	}
2330	2273
..	..	@@ -2332,29 +2275,32 @@
2332	2275	if (t->dev && (t->dev->lldd_dev))
2333	2276	pm8001_dev = t->dev->lldd_dev;
2334	2277	} else {
2335		- PM8001_FAIL_DBG(pm8001_ha,
2336		- pm8001_printk("task null\n"));
	2278	+ pm8001_dbg(pm8001_ha, FAIL, "task null\n");
2337	2279	return;
2338	2280	}
2339	2281
2340	2282	if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG))
2341	2283	&& unlikely(!t \|\| !t->lldd_task \|\| !t->dev)) {
2342		- PM8001_FAIL_DBG(pm8001_ha,
2343		- pm8001_printk("task or dev null\n"));
	2284	+ pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
2344	2285	return;
2345	2286	}
2346	2287
2347	2288	ts = &t->task_status;
2348	2289	if (!ts) {
2349		- PM8001_FAIL_DBG(pm8001_ha,
2350		- pm8001_printk("ts null\n"));
	2290	+ pm8001_dbg(pm8001_ha, FAIL, "ts null\n");
2351	2291	return;
2352	2292	}
	2293	+
	2294	+ if (status)
	2295	+ pm8001_dbg(pm8001_ha, IOERR,
	2296	+ "status:0x%x, tag:0x%x, task::0x%p\n",
	2297	+ status, tag, t);
	2298	+
2353	2299	/* Print sas address of IO failed device */
2354	2300	if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
2355	2301	(status != IO_UNDERFLOW)) {
2356	2302	if (!((t->dev->parent) &&
2357		- (DEV_IS_EXPANDER(t->dev->parent->dev_type)))) {
	2303	+ (dev_is_expander(t->dev->parent->dev_type)))) {
2358	2304	for (i = 0 , j = 4; j <= 7 && i <= 3; i++ , j++)
2359	2305	sata_addr_low[i] = pm8001_ha->sas_addr[j];
2360	2306	for (i = 0 , j = 0; j <= 3 && i <= 3; i++ , j++)
..	..	@@ -2380,19 +2326,19 @@
2380	2326	& 0xff000000)) +
2381	2327	pm8001_dev->attached_phy +
2382	2328	0x10);
2383		- PM8001_FAIL_DBG(pm8001_ha,
2384		- pm8001_printk("SAS Address of IO Failure Drive:"
2385		- "%08x%08x", temp_sata_addr_hi,
2386		- temp_sata_addr_low));
	2329	+ pm8001_dbg(pm8001_ha, FAIL,
	2330	+ "SAS Address of IO Failure Drive:%08x%08x\n",
	2331	+ temp_sata_addr_hi,
	2332	+ temp_sata_addr_low);
2387	2333	} else {
2388		- PM8001_FAIL_DBG(pm8001_ha,
2389		- pm8001_printk("SAS Address of IO Failure Drive:"
2390		- "%016llx", SAS_ADDR(t->dev->sas_addr)));
	2334	+ pm8001_dbg(pm8001_ha, FAIL,
	2335	+ "SAS Address of IO Failure Drive:%016llx\n",
	2336	+ SAS_ADDR(t->dev->sas_addr));
2391	2337	}
2392	2338	}
2393	2339	switch (status) {
2394	2340	case IO_SUCCESS:
2395		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
	2341	+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
2396	2342	if (param == 0) {
2397	2343	ts->resp = SAS_TASK_COMPLETE;
2398	2344	ts->stat = SAM_STAT_GOOD;
..	..	@@ -2414,99 +2360,103 @@
2414	2360	ts->resp = SAS_TASK_COMPLETE;
2415	2361	ts->stat = SAS_PROTO_RESPONSE;
2416	2362	ts->residual = param;
2417		- PM8001_IO_DBG(pm8001_ha,
2418		- pm8001_printk("SAS_PROTO_RESPONSE len = %d\n",
2419		- param));
	2363	+ pm8001_dbg(pm8001_ha, IO,
	2364	+ "SAS_PROTO_RESPONSE len = %d\n",
	2365	+ param);
2420	2366	sata_resp = &psataPayload->sata_resp[0];
2421	2367	resp = (struct ata_task_resp *)ts->buf;
2422	2368	if (t->ata_task.dma_xfer == 0 &&
2423		- t->data_dir == PCI_DMA_FROMDEVICE) {
	2369	+ t->data_dir == DMA_FROM_DEVICE) {
2424	2370	len = sizeof(struct pio_setup_fis);
2425		- PM8001_IO_DBG(pm8001_ha,
2426		- pm8001_printk("PIO read len = %d\n", len));
2427		- } else if (t->ata_task.use_ncq) {
	2371	+ pm8001_dbg(pm8001_ha, IO,
	2372	+ "PIO read len = %d\n", len);
	2373	+ } else if (t->ata_task.use_ncq &&
	2374	+ t->data_dir != DMA_NONE) {
2428	2375	len = sizeof(struct set_dev_bits_fis);
2429		- PM8001_IO_DBG(pm8001_ha,
2430		- pm8001_printk("FPDMA len = %d\n", len));
	2376	+ pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n",
	2377	+ len);
2431	2378	} else {
2432	2379	len = sizeof(struct dev_to_host_fis);
2433		- PM8001_IO_DBG(pm8001_ha,
2434		- pm8001_printk("other len = %d\n", len));
	2380	+ pm8001_dbg(pm8001_ha, IO, "other len = %d\n",
	2381	+ len);
2435	2382	}
2436	2383	if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) {
2437	2384	resp->frame_len = len;
2438	2385	memcpy(&resp->ending_fis[0], sata_resp, len);
2439	2386	ts->buf_valid_size = sizeof(*resp);
2440	2387	} else
2441		- PM8001_IO_DBG(pm8001_ha,
2442		- pm8001_printk("response to large\n"));
	2388	+ pm8001_dbg(pm8001_ha, IO,
	2389	+ "response too large\n");
2443	2390	}
2444	2391	if (pm8001_dev)
2445		- pm8001_dev->running_req--;
	2392	+ atomic_dec(&pm8001_dev->running_req);
2446	2393	break;
2447	2394	case IO_ABORTED:
2448		- PM8001_IO_DBG(pm8001_ha,
2449		- pm8001_printk("IO_ABORTED IOMB Tag\n"));
	2395	+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
2450	2396	ts->resp = SAS_TASK_COMPLETE;
2451	2397	ts->stat = SAS_ABORTED_TASK;
2452	2398	if (pm8001_dev)
2453		- pm8001_dev->running_req--;
	2399	+ atomic_dec(&pm8001_dev->running_req);
2454	2400	break;
2455	2401	/* following cases are to do cases */
2456	2402	case IO_UNDERFLOW:
2457	2403	/* SATA Completion with error */
2458		- PM8001_IO_DBG(pm8001_ha,
2459		- pm8001_printk("IO_UNDERFLOW param = %d\n", param));
	2404	+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param);
2460	2405	ts->resp = SAS_TASK_COMPLETE;
2461	2406	ts->stat = SAS_DATA_UNDERRUN;
2462	2407	ts->residual = param;
2463	2408	if (pm8001_dev)
2464		- pm8001_dev->running_req--;
	2409	+ atomic_dec(&pm8001_dev->running_req);
2465	2410	break;
2466	2411	case IO_NO_DEVICE:
2467		- PM8001_IO_DBG(pm8001_ha,
2468		- pm8001_printk("IO_NO_DEVICE\n"));
	2412	+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
2469	2413	ts->resp = SAS_TASK_UNDELIVERED;
2470	2414	ts->stat = SAS_PHY_DOWN;
	2415	+ if (pm8001_dev)
	2416	+ atomic_dec(&pm8001_dev->running_req);
2471	2417	break;
2472	2418	case IO_XFER_ERROR_BREAK:
2473		- PM8001_IO_DBG(pm8001_ha,
2474		- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
	2419	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
2475	2420	ts->resp = SAS_TASK_COMPLETE;
2476	2421	ts->stat = SAS_INTERRUPTED;
	2422	+ if (pm8001_dev)
	2423	+ atomic_dec(&pm8001_dev->running_req);
2477	2424	break;
2478	2425	case IO_XFER_ERROR_PHY_NOT_READY:
2479		- PM8001_IO_DBG(pm8001_ha,
2480		- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
	2426	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
2481	2427	ts->resp = SAS_TASK_COMPLETE;
2482	2428	ts->stat = SAS_OPEN_REJECT;
2483	2429	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
	2430	+ if (pm8001_dev)
	2431	+ atomic_dec(&pm8001_dev->running_req);
2484	2432	break;
2485	2433	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2486		- PM8001_IO_DBG(pm8001_ha,
2487		- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
2488		- "_SUPPORTED\n"));
	2434	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
2489	2435	ts->resp = SAS_TASK_COMPLETE;
2490	2436	ts->stat = SAS_OPEN_REJECT;
2491	2437	ts->open_rej_reason = SAS_OREJ_EPROTO;
	2438	+ if (pm8001_dev)
	2439	+ atomic_dec(&pm8001_dev->running_req);
2492	2440	break;
2493	2441	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2494		- PM8001_IO_DBG(pm8001_ha,
2495		- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
	2442	+ pm8001_dbg(pm8001_ha, IO,
	2443	+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
2496	2444	ts->resp = SAS_TASK_COMPLETE;
2497	2445	ts->stat = SAS_OPEN_REJECT;
2498	2446	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
	2447	+ if (pm8001_dev)
	2448	+ atomic_dec(&pm8001_dev->running_req);
2499	2449	break;
2500	2450	case IO_OPEN_CNX_ERROR_BREAK:
2501		- PM8001_IO_DBG(pm8001_ha,
2502		- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
	2451	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
2503	2452	ts->resp = SAS_TASK_COMPLETE;
2504	2453	ts->stat = SAS_OPEN_REJECT;
2505	2454	ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
	2455	+ if (pm8001_dev)
	2456	+ atomic_dec(&pm8001_dev->running_req);
2506	2457	break;
2507	2458	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
2508		- PM8001_IO_DBG(pm8001_ha,
2509		- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
	2459	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
2510	2460	ts->resp = SAS_TASK_COMPLETE;
2511	2461	ts->stat = SAS_DEV_NO_RESPONSE;
2512	2462	if (!t->uldd_task) {
..	..	@@ -2520,8 +2470,8 @@
2520	2470	}
2521	2471	break;
2522	2472	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2523		- PM8001_IO_DBG(pm8001_ha,
2524		- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
	2473	+ pm8001_dbg(pm8001_ha, IO,
	2474	+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
2525	2475	ts->resp = SAS_TASK_UNDELIVERED;
2526	2476	ts->stat = SAS_OPEN_REJECT;
2527	2477	ts->open_rej_reason = SAS_OREJ_BAD_DEST;
..	..	@@ -2536,17 +2486,15 @@
2536	2486	}
2537	2487	break;
2538	2488	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2539		- PM8001_IO_DBG(pm8001_ha,
2540		- pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
2541		- "NOT_SUPPORTED\n"));
	2489	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
2542	2490	ts->resp = SAS_TASK_COMPLETE;
2543	2491	ts->stat = SAS_OPEN_REJECT;
2544	2492	ts->open_rej_reason = SAS_OREJ_CONN_RATE;
	2493	+ if (pm8001_dev)
	2494	+ atomic_dec(&pm8001_dev->running_req);
2545	2495	break;
2546	2496	case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY:
2547		- PM8001_IO_DBG(pm8001_ha,
2548		- pm8001_printk("IO_OPEN_CNX_ERROR_STP_RESOURCES"
2549		- "_BUSY\n"));
	2497	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n");
2550	2498	ts->resp = SAS_TASK_COMPLETE;
2551	2499	ts->stat = SAS_DEV_NO_RESPONSE;
2552	2500	if (!t->uldd_task) {
..	..	@@ -2560,57 +2508,65 @@
2560	2508	}
2561	2509	break;
2562	2510	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2563		- PM8001_IO_DBG(pm8001_ha,
2564		- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
	2511	+ pm8001_dbg(pm8001_ha, IO,
	2512	+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
2565	2513	ts->resp = SAS_TASK_COMPLETE;
2566	2514	ts->stat = SAS_OPEN_REJECT;
2567	2515	ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
	2516	+ if (pm8001_dev)
	2517	+ atomic_dec(&pm8001_dev->running_req);
2568	2518	break;
2569	2519	case IO_XFER_ERROR_NAK_RECEIVED:
2570		- PM8001_IO_DBG(pm8001_ha,
2571		- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
	2520	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
2572	2521	ts->resp = SAS_TASK_COMPLETE;
2573	2522	ts->stat = SAS_NAK_R_ERR;
	2523	+ if (pm8001_dev)
	2524	+ atomic_dec(&pm8001_dev->running_req);
2574	2525	break;
2575	2526	case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
2576		- PM8001_IO_DBG(pm8001_ha,
2577		- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
	2527	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
2578	2528	ts->resp = SAS_TASK_COMPLETE;
2579	2529	ts->stat = SAS_NAK_R_ERR;
	2530	+ if (pm8001_dev)
	2531	+ atomic_dec(&pm8001_dev->running_req);
2580	2532	break;
2581	2533	case IO_XFER_ERROR_DMA:
2582		- PM8001_IO_DBG(pm8001_ha,
2583		- pm8001_printk("IO_XFER_ERROR_DMA\n"));
	2534	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
2584	2535	ts->resp = SAS_TASK_COMPLETE;
2585	2536	ts->stat = SAS_ABORTED_TASK;
	2537	+ if (pm8001_dev)
	2538	+ atomic_dec(&pm8001_dev->running_req);
2586	2539	break;
2587	2540	case IO_XFER_ERROR_SATA_LINK_TIMEOUT:
2588		- PM8001_IO_DBG(pm8001_ha,
2589		- pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"));
	2541	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n");
2590	2542	ts->resp = SAS_TASK_UNDELIVERED;
2591	2543	ts->stat = SAS_DEV_NO_RESPONSE;
	2544	+ if (pm8001_dev)
	2545	+ atomic_dec(&pm8001_dev->running_req);
2592	2546	break;
2593	2547	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
2594		- PM8001_IO_DBG(pm8001_ha,
2595		- pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
	2548	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
2596	2549	ts->resp = SAS_TASK_COMPLETE;
2597	2550	ts->stat = SAS_DATA_UNDERRUN;
	2551	+ if (pm8001_dev)
	2552	+ atomic_dec(&pm8001_dev->running_req);
2598	2553	break;
2599	2554	case IO_XFER_OPEN_RETRY_TIMEOUT:
2600		- PM8001_IO_DBG(pm8001_ha,
2601		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	2555	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
2602	2556	ts->resp = SAS_TASK_COMPLETE;
2603	2557	ts->stat = SAS_OPEN_TO;
	2558	+ if (pm8001_dev)
	2559	+ atomic_dec(&pm8001_dev->running_req);
2604	2560	break;
2605	2561	case IO_PORT_IN_RESET:
2606		- PM8001_IO_DBG(pm8001_ha,
2607		- pm8001_printk("IO_PORT_IN_RESET\n"));
	2562	+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
2608	2563	ts->resp = SAS_TASK_COMPLETE;
2609	2564	ts->stat = SAS_DEV_NO_RESPONSE;
	2565	+ if (pm8001_dev)
	2566	+ atomic_dec(&pm8001_dev->running_req);
2610	2567	break;
2611	2568	case IO_DS_NON_OPERATIONAL:
2612		- PM8001_IO_DBG(pm8001_ha,
2613		- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
	2569	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
2614	2570	ts->resp = SAS_TASK_COMPLETE;
2615	2571	ts->stat = SAS_DEV_NO_RESPONSE;
2616	2572	if (!t->uldd_task) {
..	..	@@ -2623,14 +2579,14 @@
2623	2579	}
2624	2580	break;
2625	2581	case IO_DS_IN_RECOVERY:
2626		- PM8001_IO_DBG(pm8001_ha,
2627		- pm8001_printk(" IO_DS_IN_RECOVERY\n"));
	2582	+ pm8001_dbg(pm8001_ha, IO, " IO_DS_IN_RECOVERY\n");
2628	2583	ts->resp = SAS_TASK_COMPLETE;
2629	2584	ts->stat = SAS_DEV_NO_RESPONSE;
	2585	+ if (pm8001_dev)
	2586	+ atomic_dec(&pm8001_dev->running_req);
2630	2587	break;
2631	2588	case IO_DS_IN_ERROR:
2632		- PM8001_IO_DBG(pm8001_ha,
2633		- pm8001_printk("IO_DS_IN_ERROR\n"));
	2589	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n");
2634	2590	ts->resp = SAS_TASK_COMPLETE;
2635	2591	ts->stat = SAS_DEV_NO_RESPONSE;
2636	2592	if (!t->uldd_task) {
..	..	@@ -2643,18 +2599,21 @@
2643	2599	}
2644	2600	break;
2645	2601	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
2646		- PM8001_IO_DBG(pm8001_ha,
2647		- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
	2602	+ pm8001_dbg(pm8001_ha, IO,
	2603	+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
2648	2604	ts->resp = SAS_TASK_COMPLETE;
2649	2605	ts->stat = SAS_OPEN_REJECT;
2650	2606	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
	2607	+ if (pm8001_dev)
	2608	+ atomic_dec(&pm8001_dev->running_req);
2651	2609	break;
2652	2610	default:
2653		- PM8001_IO_DBG(pm8001_ha,
2654		- pm8001_printk("Unknown status 0x%x\n", status));
	2611	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
2655	2612	/* not allowed case. Therefore, return failed status */
2656	2613	ts->resp = SAS_TASK_COMPLETE;
2657	2614	ts->stat = SAS_DEV_NO_RESPONSE;
	2615	+ if (pm8001_dev)
	2616	+ atomic_dec(&pm8001_dev->running_req);
2658	2617	break;
2659	2618	}
2660	2619	spin_lock_irqsave(&t->task_state_lock, flags);
..	..	@@ -2663,10 +2622,9 @@
2663	2622	t->task_state_flags \|= SAS_TASK_STATE_DONE;
2664	2623	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
2665	2624	spin_unlock_irqrestore(&t->task_state_lock, flags);
2666		- PM8001_FAIL_DBG(pm8001_ha,
2667		- pm8001_printk("task 0x%p done with io_status 0x%x"
2668		- " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2669		- t, status, ts->resp, ts->stat));
	2625	+ pm8001_dbg(pm8001_ha, FAIL,
	2626	+ "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	2627	+ t, status, ts->resp, ts->stat);
2670	2628	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2671	2629	} else {
2672	2630	spin_unlock_irqrestore(&t->task_state_lock, flags);
..	..	@@ -2695,12 +2653,10 @@
2695	2653	t = ccb->task;
2696	2654	pm8001_dev = ccb->device;
2697	2655	} else {
2698		- PM8001_FAIL_DBG(pm8001_ha,
2699		- pm8001_printk("No CCB !!!. returning\n"));
	2656	+ pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n");
2700	2657	}
2701	2658	if (event)
2702		- PM8001_FAIL_DBG(pm8001_ha,
2703		- pm8001_printk("SATA EVENT 0x%x\n", event));
	2659	+ pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event);
2704	2660
2705	2661	/* Check if this is NCQ error */
2706	2662	if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) {
..	..	@@ -2716,61 +2672,54 @@
2716	2672	t = ccb->task;
2717	2673	pm8001_dev = ccb->device;
2718	2674	if (event)
2719		- PM8001_FAIL_DBG(pm8001_ha,
2720		- pm8001_printk("sata IO status 0x%x\n", event));
	2675	+ pm8001_dbg(pm8001_ha, FAIL, "sata IO status 0x%x\n", event);
2721	2676	if (unlikely(!t \|\| !t->lldd_task \|\| !t->dev))
2722	2677	return;
2723	2678	ts = &t->task_status;
2724		- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2725		- "port_id:0x%x, device_id:0x%x, tag:0x%x, event:0x%x\n",
2726		- port_id, dev_id, tag, event));
	2679	+ pm8001_dbg(pm8001_ha, DEVIO,
	2680	+ "port_id:0x%x, device_id:0x%x, tag:0x%x, event:0x%x\n",
	2681	+ port_id, dev_id, tag, event);
2727	2682	switch (event) {
2728	2683	case IO_OVERFLOW:
2729		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
	2684	+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
2730	2685	ts->resp = SAS_TASK_COMPLETE;
2731	2686	ts->stat = SAS_DATA_OVERRUN;
2732	2687	ts->residual = 0;
2733	2688	if (pm8001_dev)
2734		- pm8001_dev->running_req--;
	2689	+ atomic_dec(&pm8001_dev->running_req);
2735	2690	break;
2736	2691	case IO_XFER_ERROR_BREAK:
2737		- PM8001_IO_DBG(pm8001_ha,
2738		- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
	2692	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
2739	2693	ts->resp = SAS_TASK_COMPLETE;
2740	2694	ts->stat = SAS_INTERRUPTED;
2741	2695	break;
2742	2696	case IO_XFER_ERROR_PHY_NOT_READY:
2743		- PM8001_IO_DBG(pm8001_ha,
2744		- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
	2697	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
2745	2698	ts->resp = SAS_TASK_COMPLETE;
2746	2699	ts->stat = SAS_OPEN_REJECT;
2747	2700	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2748	2701	break;
2749	2702	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2750		- PM8001_IO_DBG(pm8001_ha,
2751		- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT"
2752		- "_SUPPORTED\n"));
	2703	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
2753	2704	ts->resp = SAS_TASK_COMPLETE;
2754	2705	ts->stat = SAS_OPEN_REJECT;
2755	2706	ts->open_rej_reason = SAS_OREJ_EPROTO;
2756	2707	break;
2757	2708	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2758		- PM8001_IO_DBG(pm8001_ha,
2759		- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
	2709	+ pm8001_dbg(pm8001_ha, IO,
	2710	+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
2760	2711	ts->resp = SAS_TASK_COMPLETE;
2761	2712	ts->stat = SAS_OPEN_REJECT;
2762	2713	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
2763	2714	break;
2764	2715	case IO_OPEN_CNX_ERROR_BREAK:
2765		- PM8001_IO_DBG(pm8001_ha,
2766		- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
	2716	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
2767	2717	ts->resp = SAS_TASK_COMPLETE;
2768	2718	ts->stat = SAS_OPEN_REJECT;
2769	2719	ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
2770	2720	break;
2771	2721	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
2772		- PM8001_IO_DBG(pm8001_ha,
2773		- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
	2722	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
2774	2723	ts->resp = SAS_TASK_UNDELIVERED;
2775	2724	ts->stat = SAS_DEV_NO_RESPONSE;
2776	2725	if (!t->uldd_task) {
..	..	@@ -2784,94 +2733,82 @@
2784	2733	}
2785	2734	break;
2786	2735	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2787		- PM8001_IO_DBG(pm8001_ha,
2788		- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
	2736	+ pm8001_dbg(pm8001_ha, IO,
	2737	+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
2789	2738	ts->resp = SAS_TASK_UNDELIVERED;
2790	2739	ts->stat = SAS_OPEN_REJECT;
2791	2740	ts->open_rej_reason = SAS_OREJ_BAD_DEST;
2792	2741	break;
2793	2742	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2794		- PM8001_IO_DBG(pm8001_ha,
2795		- pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
2796		- "NOT_SUPPORTED\n"));
	2743	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
2797	2744	ts->resp = SAS_TASK_COMPLETE;
2798	2745	ts->stat = SAS_OPEN_REJECT;
2799	2746	ts->open_rej_reason = SAS_OREJ_CONN_RATE;
2800	2747	break;
2801	2748	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2802		- PM8001_IO_DBG(pm8001_ha,
2803		- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
	2749	+ pm8001_dbg(pm8001_ha, IO,
	2750	+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
2804	2751	ts->resp = SAS_TASK_COMPLETE;
2805	2752	ts->stat = SAS_OPEN_REJECT;
2806	2753	ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
2807	2754	break;
2808	2755	case IO_XFER_ERROR_NAK_RECEIVED:
2809		- PM8001_IO_DBG(pm8001_ha,
2810		- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
	2756	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
2811	2757	ts->resp = SAS_TASK_COMPLETE;
2812	2758	ts->stat = SAS_NAK_R_ERR;
2813	2759	break;
2814	2760	case IO_XFER_ERROR_PEER_ABORTED:
2815		- PM8001_IO_DBG(pm8001_ha,
2816		- pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n"));
	2761	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n");
2817	2762	ts->resp = SAS_TASK_COMPLETE;
2818	2763	ts->stat = SAS_NAK_R_ERR;
2819	2764	break;
2820	2765	case IO_XFER_ERROR_REJECTED_NCQ_MODE:
2821		- PM8001_IO_DBG(pm8001_ha,
2822		- pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
	2766	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
2823	2767	ts->resp = SAS_TASK_COMPLETE;
2824	2768	ts->stat = SAS_DATA_UNDERRUN;
2825	2769	break;
2826	2770	case IO_XFER_OPEN_RETRY_TIMEOUT:
2827		- PM8001_IO_DBG(pm8001_ha,
2828		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	2771	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
2829	2772	ts->resp = SAS_TASK_COMPLETE;
2830	2773	ts->stat = SAS_OPEN_TO;
2831	2774	break;
2832	2775	case IO_XFER_ERROR_UNEXPECTED_PHASE:
2833		- PM8001_IO_DBG(pm8001_ha,
2834		- pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
	2776	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
2835	2777	ts->resp = SAS_TASK_COMPLETE;
2836	2778	ts->stat = SAS_OPEN_TO;
2837	2779	break;
2838	2780	case IO_XFER_ERROR_XFER_RDY_OVERRUN:
2839		- PM8001_IO_DBG(pm8001_ha,
2840		- pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
	2781	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
2841	2782	ts->resp = SAS_TASK_COMPLETE;
2842	2783	ts->stat = SAS_OPEN_TO;
2843	2784	break;
2844	2785	case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
2845		- PM8001_IO_DBG(pm8001_ha,
2846		- pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
	2786	+ pm8001_dbg(pm8001_ha, IO,
	2787	+ "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
2847	2788	ts->resp = SAS_TASK_COMPLETE;
2848	2789	ts->stat = SAS_OPEN_TO;
2849	2790	break;
2850	2791	case IO_XFER_ERROR_OFFSET_MISMATCH:
2851		- PM8001_IO_DBG(pm8001_ha,
2852		- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
	2792	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
2853	2793	ts->resp = SAS_TASK_COMPLETE;
2854	2794	ts->stat = SAS_OPEN_TO;
2855	2795	break;
2856	2796	case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
2857		- PM8001_IO_DBG(pm8001_ha,
2858		- pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
	2797	+ pm8001_dbg(pm8001_ha, IO,
	2798	+ "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
2859	2799	ts->resp = SAS_TASK_COMPLETE;
2860	2800	ts->stat = SAS_OPEN_TO;
2861	2801	break;
2862	2802	case IO_XFER_CMD_FRAME_ISSUED:
2863		- PM8001_IO_DBG(pm8001_ha,
2864		- pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
	2803	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
2865	2804	break;
2866	2805	case IO_XFER_PIO_SETUP_ERROR:
2867		- PM8001_IO_DBG(pm8001_ha,
2868		- pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n"));
	2806	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n");
2869	2807	ts->resp = SAS_TASK_COMPLETE;
2870	2808	ts->stat = SAS_OPEN_TO;
2871	2809	break;
2872	2810	default:
2873		- PM8001_IO_DBG(pm8001_ha,
2874		- pm8001_printk("Unknown status 0x%x\n", event));
	2811	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
2875	2812	/* not allowed case. Therefore, return failed status */
2876	2813	ts->resp = SAS_TASK_COMPLETE;
2877	2814	ts->stat = SAS_OPEN_TO;
..	..	@@ -2883,10 +2820,9 @@
2883	2820	t->task_state_flags \|= SAS_TASK_STATE_DONE;
2884	2821	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
2885	2822	spin_unlock_irqrestore(&t->task_state_lock, flags);
2886		- PM8001_FAIL_DBG(pm8001_ha,
2887		- pm8001_printk("task 0x%p done with io_status 0x%x"
2888		- " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2889		- t, event, ts->resp, ts->stat));
	2823	+ pm8001_dbg(pm8001_ha, FAIL,
	2824	+ "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	2825	+ t, event, ts->resp, ts->stat);
2890	2826	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2891	2827	} else {
2892	2828	spin_unlock_irqrestore(&t->task_state_lock, flags);
..	..	@@ -2898,7 +2834,6 @@
2898	2834	static void
2899	2835	mpi_smp_completion(struct pm8001_hba_info pm8001_ha, void piomb)
2900	2836	{
2901		- u32 param;
2902	2837	struct sas_task *t;
2903	2838	struct pm8001_ccb_info *ccb;
2904	2839	unsigned long flags;
..	..	@@ -2913,87 +2848,83 @@
2913	2848	tag = le32_to_cpu(psmpPayload->tag);
2914	2849
2915	2850	ccb = &pm8001_ha->ccb_info[tag];
2916		- param = le32_to_cpu(psmpPayload->param);
2917	2851	t = ccb->task;
2918	2852	ts = &t->task_status;
2919	2853	pm8001_dev = ccb->device;
2920		- if (status)
2921		- PM8001_FAIL_DBG(pm8001_ha,
2922		- pm8001_printk("smp IO status 0x%x\n", status));
	2854	+ if (status) {
	2855	+ pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status);
	2856	+ pm8001_dbg(pm8001_ha, IOERR,
	2857	+ "status:0x%x, tag:0x%x, task:0x%p\n",
	2858	+ status, tag, t);
	2859	+ }
2923	2860	if (unlikely(!t \|\| !t->lldd_task \|\| !t->dev))
2924	2861	return;
2925	2862
2926	2863	switch (status) {
2927	2864	case IO_SUCCESS:
2928		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
	2865	+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
2929	2866	ts->resp = SAS_TASK_COMPLETE;
2930	2867	ts->stat = SAM_STAT_GOOD;
2931		- if (pm8001_dev)
2932		- pm8001_dev->running_req--;
	2868	+ if (pm8001_dev)
	2869	+ atomic_dec(&pm8001_dev->running_req);
2933	2870	break;
2934	2871	case IO_ABORTED:
2935		- PM8001_IO_DBG(pm8001_ha,
2936		- pm8001_printk("IO_ABORTED IOMB\n"));
	2872	+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n");
2937	2873	ts->resp = SAS_TASK_COMPLETE;
2938	2874	ts->stat = SAS_ABORTED_TASK;
2939	2875	if (pm8001_dev)
2940		- pm8001_dev->running_req--;
	2876	+ atomic_dec(&pm8001_dev->running_req);
2941	2877	break;
2942	2878	case IO_OVERFLOW:
2943		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
	2879	+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
2944	2880	ts->resp = SAS_TASK_COMPLETE;
2945	2881	ts->stat = SAS_DATA_OVERRUN;
2946	2882	ts->residual = 0;
2947	2883	if (pm8001_dev)
2948		- pm8001_dev->running_req--;
	2884	+ atomic_dec(&pm8001_dev->running_req);
2949	2885	break;
2950	2886	case IO_NO_DEVICE:
2951		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n"));
	2887	+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
2952	2888	ts->resp = SAS_TASK_COMPLETE;
2953	2889	ts->stat = SAS_PHY_DOWN;
2954	2890	break;
2955	2891	case IO_ERROR_HW_TIMEOUT:
2956		- PM8001_IO_DBG(pm8001_ha,
2957		- pm8001_printk("IO_ERROR_HW_TIMEOUT\n"));
	2892	+ pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n");
2958	2893	ts->resp = SAS_TASK_COMPLETE;
2959	2894	ts->stat = SAM_STAT_BUSY;
2960	2895	break;
2961	2896	case IO_XFER_ERROR_BREAK:
2962		- PM8001_IO_DBG(pm8001_ha,
2963		- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
	2897	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
2964	2898	ts->resp = SAS_TASK_COMPLETE;
2965	2899	ts->stat = SAM_STAT_BUSY;
2966	2900	break;
2967	2901	case IO_XFER_ERROR_PHY_NOT_READY:
2968		- PM8001_IO_DBG(pm8001_ha,
2969		- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
	2902	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
2970	2903	ts->resp = SAS_TASK_COMPLETE;
2971	2904	ts->stat = SAM_STAT_BUSY;
2972	2905	break;
2973	2906	case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2974		- PM8001_IO_DBG(pm8001_ha,
2975		- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
	2907	+ pm8001_dbg(pm8001_ha, IO,
	2908	+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
2976	2909	ts->resp = SAS_TASK_COMPLETE;
2977	2910	ts->stat = SAS_OPEN_REJECT;
2978	2911	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
2979	2912	break;
2980	2913	case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2981		- PM8001_IO_DBG(pm8001_ha,
2982		- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
	2914	+ pm8001_dbg(pm8001_ha, IO,
	2915	+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
2983	2916	ts->resp = SAS_TASK_COMPLETE;
2984	2917	ts->stat = SAS_OPEN_REJECT;
2985	2918	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
2986	2919	break;
2987	2920	case IO_OPEN_CNX_ERROR_BREAK:
2988		- PM8001_IO_DBG(pm8001_ha,
2989		- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
	2921	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
2990	2922	ts->resp = SAS_TASK_COMPLETE;
2991	2923	ts->stat = SAS_OPEN_REJECT;
2992	2924	ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
2993	2925	break;
2994	2926	case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
2995		- PM8001_IO_DBG(pm8001_ha,
2996		- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
	2927	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
2997	2928	ts->resp = SAS_TASK_COMPLETE;
2998	2929	ts->stat = SAS_OPEN_REJECT;
2999	2930	ts->open_rej_reason = SAS_OREJ_UNKNOWN;
..	..	@@ -3002,76 +2933,67 @@
3002	2933	IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
3003	2934	break;
3004	2935	case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
3005		- PM8001_IO_DBG(pm8001_ha,
3006		- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
	2936	+ pm8001_dbg(pm8001_ha, IO,
	2937	+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
3007	2938	ts->resp = SAS_TASK_COMPLETE;
3008	2939	ts->stat = SAS_OPEN_REJECT;
3009	2940	ts->open_rej_reason = SAS_OREJ_BAD_DEST;
3010	2941	break;
3011	2942	case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
3012		- PM8001_IO_DBG(pm8001_ha,
3013		- pm8001_printk("IO_OPEN_CNX_ERROR_CONNECTION_RATE_"
3014		- "NOT_SUPPORTED\n"));
	2943	+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
3015	2944	ts->resp = SAS_TASK_COMPLETE;
3016	2945	ts->stat = SAS_OPEN_REJECT;
3017	2946	ts->open_rej_reason = SAS_OREJ_CONN_RATE;
3018	2947	break;
3019	2948	case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
3020		- PM8001_IO_DBG(pm8001_ha,
3021		- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
	2949	+ pm8001_dbg(pm8001_ha, IO,
	2950	+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
3022	2951	ts->resp = SAS_TASK_COMPLETE;
3023	2952	ts->stat = SAS_OPEN_REJECT;
3024	2953	ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
3025	2954	break;
3026	2955	case IO_XFER_ERROR_RX_FRAME:
3027		- PM8001_IO_DBG(pm8001_ha,
3028		- pm8001_printk("IO_XFER_ERROR_RX_FRAME\n"));
	2956	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n");
3029	2957	ts->resp = SAS_TASK_COMPLETE;
3030	2958	ts->stat = SAS_DEV_NO_RESPONSE;
3031	2959	break;
3032	2960	case IO_XFER_OPEN_RETRY_TIMEOUT:
3033		- PM8001_IO_DBG(pm8001_ha,
3034		- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
	2961	+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
3035	2962	ts->resp = SAS_TASK_COMPLETE;
3036	2963	ts->stat = SAS_OPEN_REJECT;
3037	2964	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
3038	2965	break;
3039	2966	case IO_ERROR_INTERNAL_SMP_RESOURCE:
3040		- PM8001_IO_DBG(pm8001_ha,
3041		- pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n"));
	2967	+ pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n");
3042	2968	ts->resp = SAS_TASK_COMPLETE;
3043	2969	ts->stat = SAS_QUEUE_FULL;
3044	2970	break;
3045	2971	case IO_PORT_IN_RESET:
3046		- PM8001_IO_DBG(pm8001_ha,
3047		- pm8001_printk("IO_PORT_IN_RESET\n"));
	2972	+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
3048	2973	ts->resp = SAS_TASK_COMPLETE;
3049	2974	ts->stat = SAS_OPEN_REJECT;
3050	2975	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
3051	2976	break;
3052	2977	case IO_DS_NON_OPERATIONAL:
3053		- PM8001_IO_DBG(pm8001_ha,
3054		- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
	2978	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
3055	2979	ts->resp = SAS_TASK_COMPLETE;
3056	2980	ts->stat = SAS_DEV_NO_RESPONSE;
3057	2981	break;
3058	2982	case IO_DS_IN_RECOVERY:
3059		- PM8001_IO_DBG(pm8001_ha,
3060		- pm8001_printk("IO_DS_IN_RECOVERY\n"));
	2983	+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
3061	2984	ts->resp = SAS_TASK_COMPLETE;
3062	2985	ts->stat = SAS_OPEN_REJECT;
3063	2986	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
3064	2987	break;
3065	2988	case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
3066		- PM8001_IO_DBG(pm8001_ha,
3067		- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
	2989	+ pm8001_dbg(pm8001_ha, IO,
	2990	+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
3068	2991	ts->resp = SAS_TASK_COMPLETE;
3069	2992	ts->stat = SAS_OPEN_REJECT;
3070	2993	ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
3071	2994	break;
3072	2995	default:
3073		- PM8001_IO_DBG(pm8001_ha,
3074		- pm8001_printk("Unknown status 0x%x\n", status));
	2996	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
3075	2997	ts->resp = SAS_TASK_COMPLETE;
3076	2998	ts->stat = SAS_DEV_NO_RESPONSE;
3077	2999	/* not allowed case. Therefore, return failed status */
..	..	@@ -3083,10 +3005,8 @@
3083	3005	t->task_state_flags \|= SAS_TASK_STATE_DONE;
3084	3006	if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
3085	3007	spin_unlock_irqrestore(&t->task_state_lock, flags);
3086		- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("task 0x%p done with"
3087		- " io_status 0x%x resp 0x%x "
3088		- "stat 0x%x but aborted by upper layer!\n",
3089		- t, status, ts->resp, ts->stat));
	3008	+ pm8001_dbg(pm8001_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
	3009	+ t, status, ts->resp, ts->stat);
3090	3010	pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
3091	3011	} else {
3092	3012	spin_unlock_irqrestore(&t->task_state_lock, flags);
..	..	@@ -3108,9 +3028,8 @@
3108	3028	u32 device_id = le32_to_cpu(pPayload->device_id);
3109	3029	u8 pds = le32_to_cpu(pPayload->pds_nds) & PDS_BITS;
3110	3030	u8 nds = le32_to_cpu(pPayload->pds_nds) & NDS_BITS;
3111		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Set device id = 0x%x state "
3112		- "from 0x%x to 0x%x status = 0x%x!\n",
3113		- device_id, pds, nds, status));
	3031	+ pm8001_dbg(pm8001_ha, MSG, "Set device id = 0x%x state from 0x%x to 0x%x status = 0x%x!\n",
	3032	+ device_id, pds, nds, status);
3114	3033	complete(pm8001_dev->setds_completion);
3115	3034	ccb->task = NULL;
3116	3035	ccb->ccb_tag = 0xFFFFFFFF;
..	..	@@ -3125,10 +3044,9 @@
3125	3044	struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag];
3126	3045	u32 dlen_status = le32_to_cpu(pPayload->dlen_status);
3127	3046	complete(pm8001_ha->nvmd_completion);
3128		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Set nvm data complete!\n"));
	3047	+ pm8001_dbg(pm8001_ha, MSG, "Set nvm data complete!\n");
3129	3048	if ((dlen_status & NVMD_STAT) != 0) {
3130		- PM8001_FAIL_DBG(pm8001_ha,
3131		- pm8001_printk("Set nvm data error!\n"));
	3049	+ pm8001_dbg(pm8001_ha, FAIL, "Set nvm data error!\n");
3132	3050	return;
3133	3051	}
3134	3052	ccb->task = NULL;
..	..	@@ -3150,26 +3068,22 @@
3150	3068	void *virt_addr = pm8001_ha->memoryMap.region[NVMD].virt_ptr;
3151	3069	fw_control_context = ccb->fw_control_context;
3152	3070
3153		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("Get nvm data complete!\n"));
	3071	+ pm8001_dbg(pm8001_ha, MSG, "Get nvm data complete!\n");
3154	3072	if ((dlen_status & NVMD_STAT) != 0) {
3155		- PM8001_FAIL_DBG(pm8001_ha,
3156		- pm8001_printk("Get nvm data error!\n"));
	3073	+ pm8001_dbg(pm8001_ha, FAIL, "Get nvm data error!\n");
3157	3074	complete(pm8001_ha->nvmd_completion);
3158	3075	return;
3159	3076	}
3160	3077
3161	3078	if (ir_tds_bn_dps_das_nvm & IPMode) {
3162	3079	/* indirect mode - IR bit set */
3163		- PM8001_MSG_DBG(pm8001_ha,
3164		- pm8001_printk("Get NVMD success, IR=1\n"));
	3080	+ pm8001_dbg(pm8001_ha, MSG, "Get NVMD success, IR=1\n");
3165	3081	if ((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == TWI_DEVICE) {
3166	3082	if (ir_tds_bn_dps_das_nvm == 0x80a80200) {
3167	3083	memcpy(pm8001_ha->sas_addr,
3168	3084	((u8 *)virt_addr + 4),
3169	3085	SAS_ADDR_SIZE);
3170		- PM8001_MSG_DBG(pm8001_ha,
3171		- pm8001_printk("Get SAS address"
3172		- " from VPD successfully!\n"));
	3086	+ pm8001_dbg(pm8001_ha, MSG, "Get SAS address from VPD successfully!\n");
3173	3087	}
3174	3088	} else if (((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == C_SEEPROM)
3175	3089	\|\| ((ir_tds_bn_dps_das_nvm & NVMD_TYPE) == VPD_FLASH) \|\|
..	..	@@ -3180,14 +3094,14 @@
3180	3094	;
3181	3095	} else {
3182	3096	/* Should not be happened*/
3183		- PM8001_MSG_DBG(pm8001_ha,
3184		- pm8001_printk("(IR=1)Wrong Device type 0x%x\n",
3185		- ir_tds_bn_dps_das_nvm));
	3097	+ pm8001_dbg(pm8001_ha, MSG,
	3098	+ "(IR=1)Wrong Device type 0x%x\n",
	3099	+ ir_tds_bn_dps_das_nvm);
3186	3100	}
3187	3101	} else /* direct mode */{
3188		- PM8001_MSG_DBG(pm8001_ha,
3189		- pm8001_printk("Get NVMD success, IR=0, dataLen=%d\n",
3190		- (dlen_status & NVMD_LEN) >> 24));
	3102	+ pm8001_dbg(pm8001_ha, MSG,
	3103	+ "Get NVMD success, IR=0, dataLen=%d\n",
	3104	+ (dlen_status & NVMD_LEN) >> 24);
3191	3105	}
3192	3106	/* Though fw_control_context is freed below, usrAddr still needs
3193	3107	* to be updated as this holds the response to the request function
..	..	@@ -3196,10 +3110,15 @@
3196	3110	pm8001_ha->memoryMap.region[NVMD].virt_ptr,
3197	3111	fw_control_context->len);
3198	3112	kfree(ccb->fw_control_context);
	3113	+ /* To avoid race condition, complete should be
	3114	+ * called after the message is copied to
	3115	+ * fw_control_context->usrAddr
	3116	+ */
	3117	+ complete(pm8001_ha->nvmd_completion);
	3118	+ pm8001_dbg(pm8001_ha, MSG, "Get nvmd data complete!\n");
3199	3119	ccb->task = NULL;
3200	3120	ccb->ccb_tag = 0xFFFFFFFF;
3201	3121	pm8001_tag_free(pm8001_ha, tag);
3202		- complete(pm8001_ha->nvmd_completion);
3203	3122	}
3204	3123
3205	3124	int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info pm8001_ha, void piomb)
..	..	@@ -3212,13 +3131,13 @@
3212	3131	u32 phy_op = le32_to_cpu(pPayload->phyop_phyid) & OP_BITS;
3213	3132	tag = le32_to_cpu(pPayload->tag);
3214	3133	if (status != 0) {
3215		- PM8001_MSG_DBG(pm8001_ha,
3216		- pm8001_printk("%x phy execute %x phy op failed!\n",
3217		- phy_id, phy_op));
	3134	+ pm8001_dbg(pm8001_ha, MSG,
	3135	+ "%x phy execute %x phy op failed!\n",
	3136	+ phy_id, phy_op);
3218	3137	} else {
3219		- PM8001_MSG_DBG(pm8001_ha,
3220		- pm8001_printk("%x phy execute %x phy op success!\n",
3221		- phy_id, phy_op));
	3138	+ pm8001_dbg(pm8001_ha, MSG,
	3139	+ "%x phy execute %x phy op success!\n",
	3140	+ phy_id, phy_op);
3222	3141	pm8001_ha->phy[phy_id].reset_success = true;
3223	3142	}
3224	3143	if (pm8001_ha->phy[phy_id].enable_completion) {
..	..	@@ -3244,11 +3163,9 @@
3244	3163	{
3245	3164	struct pm8001_phy *phy = &pm8001_ha->phy[i];
3246	3165	struct asd_sas_phy *sas_phy = &phy->sas_phy;
3247		- struct sas_ha_struct *sas_ha;
3248	3166	if (!phy->phy_attached)
3249	3167	return;
3250	3168
3251		- sas_ha = pm8001_ha->sas;
3252	3169	if (sas_phy->phy) {
3253	3170	struct sas_phy *sphy = sas_phy->phy;
3254	3171	sphy->negotiated_linkrate = sas_phy->linkrate;
..	..	@@ -3267,10 +3184,10 @@
3267	3184	} else if (phy->phy_type & PORT_TYPE_SATA) {
3268	3185	/Nothing/
3269	3186	}
3270		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("phy %d byte dmaded.\n", i));
	3187	+ pm8001_dbg(pm8001_ha, MSG, "phy %d byte dmaded.\n", i);
3271	3188
3272	3189	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
3273		- pm8001_ha->sas->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
	3190	+ sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED);
3274	3191	}
3275	3192
3276	3193	/* Get the link rate speed */
..	..	@@ -3357,7 +3274,8 @@
3357	3274	((phyId & 0x0F) << 4) \| (port_id & 0x0F));
3358	3275	payload.param0 = cpu_to_le32(param0);
3359	3276	payload.param1 = cpu_to_le32(param1);
3360		- pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	3277	+ pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	3278	+ sizeof(payload), 0);
3361	3279	}
3362	3280
3363	3281	static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -3383,43 +3301,39 @@
3383	3301	u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
3384	3302	u8 portstate = (u8)(npip_portstate & 0x0000000F);
3385	3303	struct pm8001_port *port = &pm8001_ha->port[port_id];
3386		- struct sas_ha_struct *sas_ha = pm8001_ha->sas;
3387	3304	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
3388	3305	unsigned long flags;
3389	3306	u8 deviceType = pPayload->sas_identify.dev_type;
3390	3307	port->port_state = portstate;
3391	3308	phy->phy_state = PHY_STATE_LINK_UP_SPC;
3392		- PM8001_MSG_DBG(pm8001_ha,
3393		- pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
3394		- port_id, phy_id));
	3309	+ pm8001_dbg(pm8001_ha, MSG,
	3310	+ "HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
	3311	+ port_id, phy_id);
3395	3312
3396	3313	switch (deviceType) {
3397	3314	case SAS_PHY_UNUSED:
3398		- PM8001_MSG_DBG(pm8001_ha,
3399		- pm8001_printk("device type no device.\n"));
	3315	+ pm8001_dbg(pm8001_ha, MSG, "device type no device.\n");
3400	3316	break;
3401	3317	case SAS_END_DEVICE:
3402		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
	3318	+ pm8001_dbg(pm8001_ha, MSG, "end device.\n");
3403	3319	pm8001_chip_phy_ctl_req(pm8001_ha, phy_id,
3404	3320	PHY_NOTIFY_ENABLE_SPINUP);
3405	3321	port->port_attached = 1;
3406	3322	pm8001_get_lrate_mode(phy, link_rate);
3407	3323	break;
3408	3324	case SAS_EDGE_EXPANDER_DEVICE:
3409		- PM8001_MSG_DBG(pm8001_ha,
3410		- pm8001_printk("expander device.\n"));
	3325	+ pm8001_dbg(pm8001_ha, MSG, "expander device.\n");
3411	3326	port->port_attached = 1;
3412	3327	pm8001_get_lrate_mode(phy, link_rate);
3413	3328	break;
3414	3329	case SAS_FANOUT_EXPANDER_DEVICE:
3415		- PM8001_MSG_DBG(pm8001_ha,
3416		- pm8001_printk("fanout expander device.\n"));
	3330	+ pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n");
3417	3331	port->port_attached = 1;
3418	3332	pm8001_get_lrate_mode(phy, link_rate);
3419	3333	break;
3420	3334	default:
3421		- PM8001_MSG_DBG(pm8001_ha,
3422		- pm8001_printk("unknown device type(%x)\n", deviceType));
	3335	+ pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n",
	3336	+ deviceType);
3423	3337	break;
3424	3338	}
3425	3339	phy->phy_type \|= PORT_TYPE_SAS;
..	..	@@ -3430,7 +3344,7 @@
3430	3344	else if (phy->identify.device_type != SAS_PHY_UNUSED)
3431	3345	phy->identify.target_port_protocols = SAS_PROTOCOL_SMP;
3432	3346	phy->sas_phy.oob_mode = SAS_OOB_MODE;
3433		- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
	3347	+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
3434	3348	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
3435	3349	memcpy(phy->frame_rcvd, &pPayload->sas_identify,
3436	3350	sizeof(struct sas_identify_frame)-4);
..	..	@@ -3462,12 +3376,10 @@
3462	3376	u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
3463	3377	u8 portstate = (u8)(npip_portstate & 0x0000000F);
3464	3378	struct pm8001_port *port = &pm8001_ha->port[port_id];
3465		- struct sas_ha_struct *sas_ha = pm8001_ha->sas;
3466	3379	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
3467	3380	unsigned long flags;
3468		- PM8001_MSG_DBG(pm8001_ha,
3469		- pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d,"
3470		- " phy id = %d\n", port_id, phy_id));
	3381	+ pm8001_dbg(pm8001_ha, DEVIO, "HW_EVENT_SATA_PHY_UP port id = %d, phy id = %d\n",
	3382	+ port_id, phy_id);
3471	3383	port->port_state = portstate;
3472	3384	phy->phy_state = PHY_STATE_LINK_UP_SPC;
3473	3385	port->port_attached = 1;
..	..	@@ -3475,7 +3387,7 @@
3475	3387	phy->phy_type \|= PORT_TYPE_SATA;
3476	3388	phy->phy_attached = 1;
3477	3389	phy->sas_phy.oob_mode = SATA_OOB_MODE;
3478		- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
	3390	+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
3479	3391	spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
3480	3392	memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4),
3481	3393	sizeof(struct dev_to_host_fis));
..	..	@@ -3515,37 +3427,35 @@
3515	3427	case PORT_VALID:
3516	3428	break;
3517	3429	case PORT_INVALID:
3518		- PM8001_MSG_DBG(pm8001_ha,
3519		- pm8001_printk(" PortInvalid portID %d\n", port_id));
3520		- PM8001_MSG_DBG(pm8001_ha,
3521		- pm8001_printk(" Last phy Down and port invalid\n"));
	3430	+ pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n",
	3431	+ port_id);
	3432	+ pm8001_dbg(pm8001_ha, MSG,
	3433	+ " Last phy Down and port invalid\n");
3522	3434	port->port_attached = 0;
3523	3435	pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
3524	3436	port_id, phy_id, 0, 0);
3525	3437	break;
3526	3438	case PORT_IN_RESET:
3527		- PM8001_MSG_DBG(pm8001_ha,
3528		- pm8001_printk(" Port In Reset portID %d\n", port_id));
	3439	+ pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n",
	3440	+ port_id);
3529	3441	break;
3530	3442	case PORT_NOT_ESTABLISHED:
3531		- PM8001_MSG_DBG(pm8001_ha,
3532		- pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n"));
	3443	+ pm8001_dbg(pm8001_ha, MSG,
	3444	+ " phy Down and PORT_NOT_ESTABLISHED\n");
3533	3445	port->port_attached = 0;
3534	3446	break;
3535	3447	case PORT_LOSTCOMM:
3536		- PM8001_MSG_DBG(pm8001_ha,
3537		- pm8001_printk(" phy Down and PORT_LOSTCOMM\n"));
3538		- PM8001_MSG_DBG(pm8001_ha,
3539		- pm8001_printk(" Last phy Down and port invalid\n"));
	3448	+ pm8001_dbg(pm8001_ha, MSG, " phy Down and PORT_LOSTCOMM\n");
	3449	+ pm8001_dbg(pm8001_ha, MSG,
	3450	+ " Last phy Down and port invalid\n");
3540	3451	port->port_attached = 0;
3541	3452	pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
3542	3453	port_id, phy_id, 0, 0);
3543	3454	break;
3544	3455	default:
3545	3456	port->port_attached = 0;
3546		- PM8001_MSG_DBG(pm8001_ha,
3547		- pm8001_printk(" phy Down and(default) = %x\n",
3548		- portstate));
	3457	+ pm8001_dbg(pm8001_ha, DEVIO, " phy Down and(default) = %x\n",
	3458	+ portstate);
3549	3459	break;
3550	3460
3551	3461	}
..	..	@@ -3576,44 +3486,42 @@
3576	3486	pm8001_dev = ccb->device;
3577	3487	status = le32_to_cpu(registerRespPayload->status);
3578	3488	device_id = le32_to_cpu(registerRespPayload->device_id);
3579		- PM8001_MSG_DBG(pm8001_ha,
3580		- pm8001_printk(" register device is status = %d\n", status));
	3489	+ pm8001_dbg(pm8001_ha, MSG, " register device is status = %d\n",
	3490	+ status);
3581	3491	switch (status) {
3582	3492	case DEVREG_SUCCESS:
3583		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("DEVREG_SUCCESS\n"));
	3493	+ pm8001_dbg(pm8001_ha, MSG, "DEVREG_SUCCESS\n");
3584	3494	pm8001_dev->device_id = device_id;
3585	3495	break;
3586	3496	case DEVREG_FAILURE_OUT_OF_RESOURCE:
3587		- PM8001_MSG_DBG(pm8001_ha,
3588		- pm8001_printk("DEVREG_FAILURE_OUT_OF_RESOURCE\n"));
	3497	+ pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_OUT_OF_RESOURCE\n");
3589	3498	break;
3590	3499	case DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED:
3591		- PM8001_MSG_DBG(pm8001_ha,
3592		- pm8001_printk("DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED\n"));
	3500	+ pm8001_dbg(pm8001_ha, MSG,
	3501	+ "DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED\n");
3593	3502	break;
3594	3503	case DEVREG_FAILURE_INVALID_PHY_ID:
3595		- PM8001_MSG_DBG(pm8001_ha,
3596		- pm8001_printk("DEVREG_FAILURE_INVALID_PHY_ID\n"));
	3504	+ pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_INVALID_PHY_ID\n");
3597	3505	break;
3598	3506	case DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED:
3599		- PM8001_MSG_DBG(pm8001_ha,
3600		- pm8001_printk("DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED\n"));
	3507	+ pm8001_dbg(pm8001_ha, MSG,
	3508	+ "DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED\n");
3601	3509	break;
3602	3510	case DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE:
3603		- PM8001_MSG_DBG(pm8001_ha,
3604		- pm8001_printk("DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE\n"));
	3511	+ pm8001_dbg(pm8001_ha, MSG,
	3512	+ "DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE\n");
3605	3513	break;
3606	3514	case DEVREG_FAILURE_PORT_NOT_VALID_STATE:
3607		- PM8001_MSG_DBG(pm8001_ha,
3608		- pm8001_printk("DEVREG_FAILURE_PORT_NOT_VALID_STATE\n"));
	3515	+ pm8001_dbg(pm8001_ha, MSG,
	3516	+ "DEVREG_FAILURE_PORT_NOT_VALID_STATE\n");
3609	3517	break;
3610	3518	case DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID:
3611		- PM8001_MSG_DBG(pm8001_ha,
3612		- pm8001_printk("DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID\n"));
	3519	+ pm8001_dbg(pm8001_ha, MSG,
	3520	+ "DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID\n");
3613	3521	break;
3614	3522	default:
3615		- PM8001_MSG_DBG(pm8001_ha,
3616		- pm8001_printk("DEVREG_FAILURE_DEVICE_TYPE_NOT_SUPPORTED\n"));
	3523	+ pm8001_dbg(pm8001_ha, MSG,
	3524	+ "DEVREG_FAILURE_DEVICE_TYPE_NOT_SUPPORTED\n");
3617	3525	break;
3618	3526	}
3619	3527	complete(pm8001_dev->dcompletion);
..	..	@@ -3633,9 +3541,9 @@
3633	3541	status = le32_to_cpu(registerRespPayload->status);
3634	3542	device_id = le32_to_cpu(registerRespPayload->device_id);
3635	3543	if (status != 0)
3636		- PM8001_MSG_DBG(pm8001_ha,
3637		- pm8001_printk(" deregister device failed ,status = %x"
3638		- ", device_id = %x\n", status, device_id));
	3544	+ pm8001_dbg(pm8001_ha, MSG,
	3545	+ " deregister device failed ,status = %x, device_id = %x\n",
	3546	+ status, device_id);
3639	3547	return 0;
3640	3548	}
3641	3549
..	..	@@ -3655,44 +3563,37 @@
3655	3563	status = le32_to_cpu(ppayload->status);
3656	3564	switch (status) {
3657	3565	case FLASH_UPDATE_COMPLETE_PENDING_REBOOT:
3658		- PM8001_MSG_DBG(pm8001_ha,
3659		- pm8001_printk(": FLASH_UPDATE_COMPLETE_PENDING_REBOOT\n"));
	3566	+ pm8001_dbg(pm8001_ha, MSG,
	3567	+ ": FLASH_UPDATE_COMPLETE_PENDING_REBOOT\n");
3660	3568	break;
3661	3569	case FLASH_UPDATE_IN_PROGRESS:
3662		- PM8001_MSG_DBG(pm8001_ha,
3663		- pm8001_printk(": FLASH_UPDATE_IN_PROGRESS\n"));
	3570	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_IN_PROGRESS\n");
3664	3571	break;
3665	3572	case FLASH_UPDATE_HDR_ERR:
3666		- PM8001_MSG_DBG(pm8001_ha,
3667		- pm8001_printk(": FLASH_UPDATE_HDR_ERR\n"));
	3573	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HDR_ERR\n");
3668	3574	break;
3669	3575	case FLASH_UPDATE_OFFSET_ERR:
3670		- PM8001_MSG_DBG(pm8001_ha,
3671		- pm8001_printk(": FLASH_UPDATE_OFFSET_ERR\n"));
	3576	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_OFFSET_ERR\n");
3672	3577	break;
3673	3578	case FLASH_UPDATE_CRC_ERR:
3674		- PM8001_MSG_DBG(pm8001_ha,
3675		- pm8001_printk(": FLASH_UPDATE_CRC_ERR\n"));
	3579	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_CRC_ERR\n");
3676	3580	break;
3677	3581	case FLASH_UPDATE_LENGTH_ERR:
3678		- PM8001_MSG_DBG(pm8001_ha,
3679		- pm8001_printk(": FLASH_UPDATE_LENGTH_ERR\n"));
	3582	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_LENGTH_ERR\n");
3680	3583	break;
3681	3584	case FLASH_UPDATE_HW_ERR:
3682		- PM8001_MSG_DBG(pm8001_ha,
3683		- pm8001_printk(": FLASH_UPDATE_HW_ERR\n"));
	3585	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HW_ERR\n");
3684	3586	break;
3685	3587	case FLASH_UPDATE_DNLD_NOT_SUPPORTED:
3686		- PM8001_MSG_DBG(pm8001_ha,
3687		- pm8001_printk(": FLASH_UPDATE_DNLD_NOT_SUPPORTED\n"));
	3588	+ pm8001_dbg(pm8001_ha, MSG,
	3589	+ ": FLASH_UPDATE_DNLD_NOT_SUPPORTED\n");
3688	3590	break;
3689	3591	case FLASH_UPDATE_DISABLED:
3690		- PM8001_MSG_DBG(pm8001_ha,
3691		- pm8001_printk(": FLASH_UPDATE_DISABLED\n"));
	3592	+ pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_DISABLED\n");
3692	3593	break;
3693	3594	default:
3694		- PM8001_MSG_DBG(pm8001_ha,
3695		- pm8001_printk("No matched status = %d\n", status));
	3595	+ pm8001_dbg(pm8001_ha, DEVIO, "No matched status = %d\n",
	3596	+ status);
3696	3597	break;
3697	3598	}
3698	3599	kfree(ccb->fw_control_context);
..	..	@@ -3710,12 +3611,11 @@
3710	3611	struct general_event_resp *pPayload =
3711	3612	(struct general_event_resp *)(piomb + 4);
3712	3613	status = le32_to_cpu(pPayload->status);
3713		- PM8001_MSG_DBG(pm8001_ha,
3714		- pm8001_printk(" status = 0x%x\n", status));
	3614	+ pm8001_dbg(pm8001_ha, MSG, " status = 0x%x\n", status);
3715	3615	for (i = 0; i < GENERAL_EVENT_PAYLOAD; i++)
3716		- PM8001_MSG_DBG(pm8001_ha,
3717		- pm8001_printk("inb_IOMB_payload[0x%x] 0x%x,\n", i,
3718		- pPayload->inb_IOMB_payload[i]));
	3616	+ pm8001_dbg(pm8001_ha, MSG, "inb_IOMB_payload[0x%x] 0x%x,\n",
	3617	+ i,
	3618	+ pPayload->inb_IOMB_payload[i]);
3719	3619	return 0;
3720	3620	}
3721	3621
..	..	@@ -3735,8 +3635,7 @@
3735	3635	status = le32_to_cpu(pPayload->status);
3736	3636	tag = le32_to_cpu(pPayload->tag);
3737	3637	if (!tag) {
3738		- PM8001_FAIL_DBG(pm8001_ha,
3739		- pm8001_printk(" TAG NULL. RETURNING !!!"));
	3638	+ pm8001_dbg(pm8001_ha, FAIL, " TAG NULL. RETURNING !!!\n");
3740	3639	return -1;
3741	3640	}
3742	3641
..	..	@@ -3746,23 +3645,21 @@
3746	3645	pm8001_dev = ccb->device; /* retrieve device */
3747	3646
3748	3647	if (!t) {
3749		- PM8001_FAIL_DBG(pm8001_ha,
3750		- pm8001_printk(" TASK NULL. RETURNING !!!"));
	3648	+ pm8001_dbg(pm8001_ha, FAIL, " TASK NULL. RETURNING !!!\n");
3751	3649	return -1;
3752	3650	}
3753	3651	ts = &t->task_status;
3754	3652	if (status != 0)
3755		- PM8001_FAIL_DBG(pm8001_ha,
3756		- pm8001_printk("task abort failed status 0x%x ,"
3757		- "tag = 0x%x, scp= 0x%x\n", status, tag, scp));
	3653	+ pm8001_dbg(pm8001_ha, FAIL, "task abort failed status 0x%x ,tag = 0x%x, scp= 0x%x\n",
	3654	+ status, tag, scp);
3758	3655	switch (status) {
3759	3656	case IO_SUCCESS:
3760		- PM8001_EH_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
	3657	+ pm8001_dbg(pm8001_ha, EH, "IO_SUCCESS\n");
3761	3658	ts->resp = SAS_TASK_COMPLETE;
3762	3659	ts->stat = SAM_STAT_GOOD;
3763	3660	break;
3764	3661	case IO_NOT_VALID:
3765		- PM8001_EH_DBG(pm8001_ha, pm8001_printk("IO_NOT_VALID\n"));
	3662	+ pm8001_dbg(pm8001_ha, EH, "IO_NOT_VALID\n");
3766	3663	ts->resp = TMF_RESP_FUNC_FAILED;
3767	3664	break;
3768	3665	}
..	..	@@ -3775,12 +3672,11 @@
3775	3672	mb();
3776	3673
3777	3674	if (pm8001_dev->id & NCQ_ABORT_ALL_FLAG) {
3778		- pm8001_tag_free(pm8001_ha, tag);
3779	3675	sas_free_task(t);
3780		- /* clear the flag */
3781		- pm8001_dev->id &= 0xBFFFFFFF;
3782		- } else
	3676	+ pm8001_dev->id &= ~NCQ_ABORT_ALL_FLAG;
	3677	+ } else {
3783	3678	t->task_done(t);
	3679	+ }
3784	3680
3785	3681	return 0;
3786	3682	}
..	..	@@ -3807,192 +3703,177 @@
3807	3703	struct sas_ha_struct *sas_ha = pm8001_ha->sas;
3808	3704	struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
3809	3705	struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id];
3810		- PM8001_MSG_DBG(pm8001_ha,
3811		- pm8001_printk("outbound queue HW event & event type : "));
	3706	+ pm8001_dbg(pm8001_ha, DEVIO,
	3707	+ "SPC HW event for portid:%d, phyid:%d, event:%x, status:%x\n",
	3708	+ port_id, phy_id, eventType, status);
3812	3709	switch (eventType) {
3813	3710	case HW_EVENT_PHY_START_STATUS:
3814		- PM8001_MSG_DBG(pm8001_ha,
3815		- pm8001_printk("HW_EVENT_PHY_START_STATUS"
3816		- " status = %x\n", status));
3817		- if (status == 0) {
	3711	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS status = %x\n",
	3712	+ status);
	3713	+ if (status == 0)
3818	3714	phy->phy_state = 1;
3819		- if (pm8001_ha->flags == PM8001F_RUN_TIME)
3820		- complete(phy->enable_completion);
	3715	+
	3716	+ if (pm8001_ha->flags == PM8001F_RUN_TIME &&
	3717	+ phy->enable_completion != NULL) {
	3718	+ complete(phy->enable_completion);
	3719	+ phy->enable_completion = NULL;
3821	3720	}
3822	3721	break;
3823	3722	case HW_EVENT_SAS_PHY_UP:
3824		- PM8001_MSG_DBG(pm8001_ha,
3825		- pm8001_printk("HW_EVENT_PHY_START_STATUS\n"));
	3723	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n");
3826	3724	hw_event_sas_phy_up(pm8001_ha, piomb);
3827	3725	break;
3828	3726	case HW_EVENT_SATA_PHY_UP:
3829		- PM8001_MSG_DBG(pm8001_ha,
3830		- pm8001_printk("HW_EVENT_SATA_PHY_UP\n"));
	3727	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n");
3831	3728	hw_event_sata_phy_up(pm8001_ha, piomb);
3832	3729	break;
3833	3730	case HW_EVENT_PHY_STOP_STATUS:
3834		- PM8001_MSG_DBG(pm8001_ha,
3835		- pm8001_printk("HW_EVENT_PHY_STOP_STATUS "
3836		- "status = %x\n", status));
	3731	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_STOP_STATUS status = %x\n",
	3732	+ status);
3837	3733	if (status == 0)
3838	3734	phy->phy_state = 0;
3839	3735	break;
3840	3736	case HW_EVENT_SATA_SPINUP_HOLD:
3841		- PM8001_MSG_DBG(pm8001_ha,
3842		- pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n"));
3843		- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
	3737	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n");
	3738	+ sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
3844	3739	break;
3845	3740	case HW_EVENT_PHY_DOWN:
3846		- PM8001_MSG_DBG(pm8001_ha,
3847		- pm8001_printk("HW_EVENT_PHY_DOWN\n"));
3848		- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
	3741	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n");
	3742	+ sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
3849	3743	phy->phy_attached = 0;
3850	3744	phy->phy_state = 0;
3851	3745	hw_event_phy_down(pm8001_ha, piomb);
3852	3746	break;
3853	3747	case HW_EVENT_PORT_INVALID:
3854		- PM8001_MSG_DBG(pm8001_ha,
3855		- pm8001_printk("HW_EVENT_PORT_INVALID\n"));
	3748	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n");
3856	3749	sas_phy_disconnected(sas_phy);
3857	3750	phy->phy_attached = 0;
3858		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3751	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3859	3752	break;
3860	3753	/* the broadcast change primitive received, tell the LIBSAS this event
3861	3754	to revalidate the sas domain*/
3862	3755	case HW_EVENT_BROADCAST_CHANGE:
3863		- PM8001_MSG_DBG(pm8001_ha,
3864		- pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n"));
	3756	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n");
3865	3757	pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE,
3866	3758	port_id, phy_id, 1, 0);
3867	3759	spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
3868	3760	sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE;
3869	3761	spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3870		- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
	3762	+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3871	3763	break;
3872	3764	case HW_EVENT_PHY_ERROR:
3873		- PM8001_MSG_DBG(pm8001_ha,
3874		- pm8001_printk("HW_EVENT_PHY_ERROR\n"));
	3765	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n");
3875	3766	sas_phy_disconnected(&phy->sas_phy);
3876	3767	phy->phy_attached = 0;
3877		- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
	3768	+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
3878	3769	break;
3879	3770	case HW_EVENT_BROADCAST_EXP:
3880		- PM8001_MSG_DBG(pm8001_ha,
3881		- pm8001_printk("HW_EVENT_BROADCAST_EXP\n"));
	3771	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n");
3882	3772	spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
3883	3773	sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP;
3884	3774	spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3885		- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
	3775	+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3886	3776	break;
3887	3777	case HW_EVENT_LINK_ERR_INVALID_DWORD:
3888		- PM8001_MSG_DBG(pm8001_ha,
3889		- pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n"));
	3778	+ pm8001_dbg(pm8001_ha, MSG,
	3779	+ "HW_EVENT_LINK_ERR_INVALID_DWORD\n");
3890	3780	pm8001_hw_event_ack_req(pm8001_ha, 0,
3891	3781	HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0);
3892	3782	sas_phy_disconnected(sas_phy);
3893	3783	phy->phy_attached = 0;
3894		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3784	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3895	3785	break;
3896	3786	case HW_EVENT_LINK_ERR_DISPARITY_ERROR:
3897		- PM8001_MSG_DBG(pm8001_ha,
3898		- pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"));
	3787	+ pm8001_dbg(pm8001_ha, MSG,
	3788	+ "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n");
3899	3789	pm8001_hw_event_ack_req(pm8001_ha, 0,
3900	3790	HW_EVENT_LINK_ERR_DISPARITY_ERROR,
3901	3791	port_id, phy_id, 0, 0);
3902	3792	sas_phy_disconnected(sas_phy);
3903	3793	phy->phy_attached = 0;
3904		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3794	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3905	3795	break;
3906	3796	case HW_EVENT_LINK_ERR_CODE_VIOLATION:
3907		- PM8001_MSG_DBG(pm8001_ha,
3908		- pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n"));
	3797	+ pm8001_dbg(pm8001_ha, MSG,
	3798	+ "HW_EVENT_LINK_ERR_CODE_VIOLATION\n");
3909	3799	pm8001_hw_event_ack_req(pm8001_ha, 0,
3910	3800	HW_EVENT_LINK_ERR_CODE_VIOLATION,
3911	3801	port_id, phy_id, 0, 0);
3912	3802	sas_phy_disconnected(sas_phy);
3913	3803	phy->phy_attached = 0;
3914		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3804	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3915	3805	break;
3916	3806	case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH:
3917		- PM8001_MSG_DBG(pm8001_ha,
3918		- pm8001_printk("HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"));
	3807	+ pm8001_dbg(pm8001_ha, MSG,
	3808	+ "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n");
3919	3809	pm8001_hw_event_ack_req(pm8001_ha, 0,
3920	3810	HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH,
3921	3811	port_id, phy_id, 0, 0);
3922	3812	sas_phy_disconnected(sas_phy);
3923	3813	phy->phy_attached = 0;
3924		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3814	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3925	3815	break;
3926	3816	case HW_EVENT_MALFUNCTION:
3927		- PM8001_MSG_DBG(pm8001_ha,
3928		- pm8001_printk("HW_EVENT_MALFUNCTION\n"));
	3817	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n");
3929	3818	break;
3930	3819	case HW_EVENT_BROADCAST_SES:
3931		- PM8001_MSG_DBG(pm8001_ha,
3932		- pm8001_printk("HW_EVENT_BROADCAST_SES\n"));
	3820	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n");
3933	3821	spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
3934	3822	sas_phy->sas_prim = HW_EVENT_BROADCAST_SES;
3935	3823	spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3936		- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
	3824	+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3937	3825	break;
3938	3826	case HW_EVENT_INBOUND_CRC_ERROR:
3939		- PM8001_MSG_DBG(pm8001_ha,
3940		- pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n"));
	3827	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n");
3941	3828	pm8001_hw_event_ack_req(pm8001_ha, 0,
3942	3829	HW_EVENT_INBOUND_CRC_ERROR,
3943	3830	port_id, phy_id, 0, 0);
3944	3831	break;
3945	3832	case HW_EVENT_HARD_RESET_RECEIVED:
3946		- PM8001_MSG_DBG(pm8001_ha,
3947		- pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n"));
3948		- sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET);
	3833	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n");
	3834	+ sas_notify_port_event(sas_phy, PORTE_HARD_RESET);
3949	3835	break;
3950	3836	case HW_EVENT_ID_FRAME_TIMEOUT:
3951		- PM8001_MSG_DBG(pm8001_ha,
3952		- pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n"));
	3837	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n");
3953	3838	sas_phy_disconnected(sas_phy);
3954	3839	phy->phy_attached = 0;
3955		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3840	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3956	3841	break;
3957	3842	case HW_EVENT_LINK_ERR_PHY_RESET_FAILED:
3958		- PM8001_MSG_DBG(pm8001_ha,
3959		- pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"));
	3843	+ pm8001_dbg(pm8001_ha, MSG,
	3844	+ "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n");
3960	3845	pm8001_hw_event_ack_req(pm8001_ha, 0,
3961	3846	HW_EVENT_LINK_ERR_PHY_RESET_FAILED,
3962	3847	port_id, phy_id, 0, 0);
3963	3848	sas_phy_disconnected(sas_phy);
3964	3849	phy->phy_attached = 0;
3965		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3850	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3966	3851	break;
3967	3852	case HW_EVENT_PORT_RESET_TIMER_TMO:
3968		- PM8001_MSG_DBG(pm8001_ha,
3969		- pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n"));
	3853	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n");
3970	3854	sas_phy_disconnected(sas_phy);
3971	3855	phy->phy_attached = 0;
3972		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3856	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3973	3857	break;
3974	3858	case HW_EVENT_PORT_RECOVERY_TIMER_TMO:
3975		- PM8001_MSG_DBG(pm8001_ha,
3976		- pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"));
	3859	+ pm8001_dbg(pm8001_ha, MSG,
	3860	+ "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n");
3977	3861	sas_phy_disconnected(sas_phy);
3978	3862	phy->phy_attached = 0;
3979		- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
	3863	+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3980	3864	break;
3981	3865	case HW_EVENT_PORT_RECOVER:
3982		- PM8001_MSG_DBG(pm8001_ha,
3983		- pm8001_printk("HW_EVENT_PORT_RECOVER\n"));
	3866	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n");
3984	3867	break;
3985	3868	case HW_EVENT_PORT_RESET_COMPLETE:
3986		- PM8001_MSG_DBG(pm8001_ha,
3987		- pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n"));
	3869	+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n");
3988	3870	break;
3989	3871	case EVENT_BROADCAST_ASYNCH_EVENT:
3990		- PM8001_MSG_DBG(pm8001_ha,
3991		- pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n"));
	3872	+ pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n");
3992	3873	break;
3993	3874	default:
3994		- PM8001_MSG_DBG(pm8001_ha,
3995		- pm8001_printk("Unknown event type = %x\n", eventType));
	3875	+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type = %x\n",
	3876	+ eventType);
3996	3877	break;
3997	3878	}
3998	3879	return 0;
..	..	@@ -4008,163 +3889,132 @@
4008	3889	__le32 pHeader = (__le32 )piomb;
4009	3890	u8 opc = (u8)((le32_to_cpu(pHeader)) & 0xFFF);
4010	3891
4011		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("process_one_iomb:"));
	3892	+ pm8001_dbg(pm8001_ha, MSG, "process_one_iomb:\n");
4012	3893
4013	3894	switch (opc) {
4014	3895	case OPC_OUB_ECHO:
4015		- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n"));
	3896	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n");
4016	3897	break;
4017	3898	case OPC_OUB_HW_EVENT:
4018		- PM8001_MSG_DBG(pm8001_ha,
4019		- pm8001_printk("OPC_OUB_HW_EVENT\n"));
	3899	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n");
4020	3900	mpi_hw_event(pm8001_ha, piomb);
4021	3901	break;
4022	3902	case OPC_OUB_SSP_COMP:
4023		- PM8001_MSG_DBG(pm8001_ha,
4024		- pm8001_printk("OPC_OUB_SSP_COMP\n"));
	3903	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n");
4025	3904	mpi_ssp_completion(pm8001_ha, piomb);
4026	3905	break;
4027	3906	case OPC_OUB_SMP_COMP:
4028		- PM8001_MSG_DBG(pm8001_ha,
4029		- pm8001_printk("OPC_OUB_SMP_COMP\n"));
	3907	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n");
4030	3908	mpi_smp_completion(pm8001_ha, piomb);
4031	3909	break;
4032	3910	case OPC_OUB_LOCAL_PHY_CNTRL:
4033		- PM8001_MSG_DBG(pm8001_ha,
4034		- pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n"));
	3911	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n");
4035	3912	pm8001_mpi_local_phy_ctl(pm8001_ha, piomb);
4036	3913	break;
4037	3914	case OPC_OUB_DEV_REGIST:
4038		- PM8001_MSG_DBG(pm8001_ha,
4039		- pm8001_printk("OPC_OUB_DEV_REGIST\n"));
	3915	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n");
4040	3916	pm8001_mpi_reg_resp(pm8001_ha, piomb);
4041	3917	break;
4042	3918	case OPC_OUB_DEREG_DEV:
4043		- PM8001_MSG_DBG(pm8001_ha,
4044		- pm8001_printk("unregister the device\n"));
	3919	+ pm8001_dbg(pm8001_ha, MSG, "unregister the device\n");
4045	3920	pm8001_mpi_dereg_resp(pm8001_ha, piomb);
4046	3921	break;
4047	3922	case OPC_OUB_GET_DEV_HANDLE:
4048		- PM8001_MSG_DBG(pm8001_ha,
4049		- pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n"));
	3923	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n");
4050	3924	break;
4051	3925	case OPC_OUB_SATA_COMP:
4052		- PM8001_MSG_DBG(pm8001_ha,
4053		- pm8001_printk("OPC_OUB_SATA_COMP\n"));
	3926	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n");
4054	3927	mpi_sata_completion(pm8001_ha, piomb);
4055	3928	break;
4056	3929	case OPC_OUB_SATA_EVENT:
4057		- PM8001_MSG_DBG(pm8001_ha,
4058		- pm8001_printk("OPC_OUB_SATA_EVENT\n"));
	3930	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n");
4059	3931	mpi_sata_event(pm8001_ha, piomb);
4060	3932	break;
4061	3933	case OPC_OUB_SSP_EVENT:
4062		- PM8001_MSG_DBG(pm8001_ha,
4063		- pm8001_printk("OPC_OUB_SSP_EVENT\n"));
	3934	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n");
4064	3935	mpi_ssp_event(pm8001_ha, piomb);
4065	3936	break;
4066	3937	case OPC_OUB_DEV_HANDLE_ARRIV:
4067		- PM8001_MSG_DBG(pm8001_ha,
4068		- pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n"));
	3938	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n");
4069	3939	/This is for target/
4070	3940	break;
4071	3941	case OPC_OUB_SSP_RECV_EVENT:
4072		- PM8001_MSG_DBG(pm8001_ha,
4073		- pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n"));
	3942	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n");
4074	3943	/This is for target/
4075	3944	break;
4076	3945	case OPC_OUB_DEV_INFO:
4077		- PM8001_MSG_DBG(pm8001_ha,
4078		- pm8001_printk("OPC_OUB_DEV_INFO\n"));
	3946	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_INFO\n");
4079	3947	break;
4080	3948	case OPC_OUB_FW_FLASH_UPDATE:
4081		- PM8001_MSG_DBG(pm8001_ha,
4082		- pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n"));
	3949	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n");
4083	3950	pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb);
4084	3951	break;
4085	3952	case OPC_OUB_GPIO_RESPONSE:
4086		- PM8001_MSG_DBG(pm8001_ha,
4087		- pm8001_printk("OPC_OUB_GPIO_RESPONSE\n"));
	3953	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n");
4088	3954	break;
4089	3955	case OPC_OUB_GPIO_EVENT:
4090		- PM8001_MSG_DBG(pm8001_ha,
4091		- pm8001_printk("OPC_OUB_GPIO_EVENT\n"));
	3956	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n");
4092	3957	break;
4093	3958	case OPC_OUB_GENERAL_EVENT:
4094		- PM8001_MSG_DBG(pm8001_ha,
4095		- pm8001_printk("OPC_OUB_GENERAL_EVENT\n"));
	3959	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n");
4096	3960	pm8001_mpi_general_event(pm8001_ha, piomb);
4097	3961	break;
4098	3962	case OPC_OUB_SSP_ABORT_RSP:
4099		- PM8001_MSG_DBG(pm8001_ha,
4100		- pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n"));
	3963	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n");
4101	3964	pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
4102	3965	break;
4103	3966	case OPC_OUB_SATA_ABORT_RSP:
4104		- PM8001_MSG_DBG(pm8001_ha,
4105		- pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n"));
	3967	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n");
4106	3968	pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
4107	3969	break;
4108	3970	case OPC_OUB_SAS_DIAG_MODE_START_END:
4109		- PM8001_MSG_DBG(pm8001_ha,
4110		- pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n"));
	3971	+ pm8001_dbg(pm8001_ha, MSG,
	3972	+ "OPC_OUB_SAS_DIAG_MODE_START_END\n");
4111	3973	break;
4112	3974	case OPC_OUB_SAS_DIAG_EXECUTE:
4113		- PM8001_MSG_DBG(pm8001_ha,
4114		- pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n"));
	3975	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n");
4115	3976	break;
4116	3977	case OPC_OUB_GET_TIME_STAMP:
4117		- PM8001_MSG_DBG(pm8001_ha,
4118		- pm8001_printk("OPC_OUB_GET_TIME_STAMP\n"));
	3978	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n");
4119	3979	break;
4120	3980	case OPC_OUB_SAS_HW_EVENT_ACK:
4121		- PM8001_MSG_DBG(pm8001_ha,
4122		- pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n"));
	3981	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n");
4123	3982	break;
4124	3983	case OPC_OUB_PORT_CONTROL:
4125		- PM8001_MSG_DBG(pm8001_ha,
4126		- pm8001_printk("OPC_OUB_PORT_CONTROL\n"));
	3984	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n");
4127	3985	break;
4128	3986	case OPC_OUB_SMP_ABORT_RSP:
4129		- PM8001_MSG_DBG(pm8001_ha,
4130		- pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n"));
	3987	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n");
4131	3988	pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
4132	3989	break;
4133	3990	case OPC_OUB_GET_NVMD_DATA:
4134		- PM8001_MSG_DBG(pm8001_ha,
4135		- pm8001_printk("OPC_OUB_GET_NVMD_DATA\n"));
	3991	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n");
4136	3992	pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb);
4137	3993	break;
4138	3994	case OPC_OUB_SET_NVMD_DATA:
4139		- PM8001_MSG_DBG(pm8001_ha,
4140		- pm8001_printk("OPC_OUB_SET_NVMD_DATA\n"));
	3995	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n");
4141	3996	pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb);
4142	3997	break;
4143	3998	case OPC_OUB_DEVICE_HANDLE_REMOVAL:
4144		- PM8001_MSG_DBG(pm8001_ha,
4145		- pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n"));
	3999	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n");
4146	4000	break;
4147	4001	case OPC_OUB_SET_DEVICE_STATE:
4148		- PM8001_MSG_DBG(pm8001_ha,
4149		- pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n"));
	4002	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n");
4150	4003	pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb);
4151	4004	break;
4152	4005	case OPC_OUB_GET_DEVICE_STATE:
4153		- PM8001_MSG_DBG(pm8001_ha,
4154		- pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n"));
	4006	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n");
4155	4007	break;
4156	4008	case OPC_OUB_SET_DEV_INFO:
4157		- PM8001_MSG_DBG(pm8001_ha,
4158		- pm8001_printk("OPC_OUB_SET_DEV_INFO\n"));
	4009	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");
4159	4010	break;
4160	4011	case OPC_OUB_SAS_RE_INITIALIZE:
4161		- PM8001_MSG_DBG(pm8001_ha,
4162		- pm8001_printk("OPC_OUB_SAS_RE_INITIALIZE\n"));
	4012	+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_RE_INITIALIZE\n");
4163	4013	break;
4164	4014	default:
4165		- PM8001_MSG_DBG(pm8001_ha,
4166		- pm8001_printk("Unknown outbound Queue IOMB OPC = %x\n",
4167		- opc));
	4015	+ pm8001_dbg(pm8001_ha, DEVIO,
	4016	+ "Unknown outbound Queue IOMB OPC = %x\n",
	4017	+ opc);
4168	4018	break;
4169	4019	}
4170	4020	}
..	..	@@ -4173,7 +4023,7 @@
4173	4023	{
4174	4024	struct outbound_queue_table *circularQ;
4175	4025	void *pMsg1 = NULL;
4176		- u8 uninitialized_var(bc);
	4026	+ u8 bc;
4177	4027	u32 ret = MPI_IO_STATUS_FAIL;
4178	4028	unsigned long flags;
4179	4029
..	..	@@ -4202,12 +4052,12 @@
4202	4052	return ret;
4203	4053	}
4204	4054
4205		-/* PCI_DMA_... to our direction translation. */
	4055	+/* DMA_... to our direction translation. */
4206	4056	static const u8 data_dir_flags[] = {
4207		- [PCI_DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT,/* UNSPECIFIED */
4208		- [PCI_DMA_TODEVICE] = DATA_DIR_OUT,/* OUTBOUND */
4209		- [PCI_DMA_FROMDEVICE] = DATA_DIR_IN,/* INBOUND */
4210		- [PCI_DMA_NONE] = DATA_DIR_NONE,/* NO TRANSFER */
	4057	+ [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */
	4058	+ [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */
	4059	+ [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */
	4060	+ [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */
4211	4061	};
4212	4062	void
4213	4063	pm8001_chip_make_sg(struct scatterlist scatter, int nr, void prd)
..	..	@@ -4254,13 +4104,13 @@
4254	4104	* DMA-map SMP request, response buffers
4255	4105	*/
4256	4106	sg_req = &task->smp_task.smp_req;
4257		- elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, PCI_DMA_TODEVICE);
	4107	+ elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE);
4258	4108	if (!elem)
4259	4109	return -ENOMEM;
4260	4110	req_len = sg_dma_len(sg_req);
4261	4111
4262	4112	sg_resp = &task->smp_task.smp_resp;
4263		- elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
	4113	+ elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE);
4264	4114	if (!elem) {
4265	4115	rc = -ENOMEM;
4266	4116	goto err_out;
..	..	@@ -4285,7 +4135,7 @@
4285	4135	cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_resp)-4);
4286	4136	build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, &smp_cmd);
4287	4137	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
4288		- (u32 *)&smp_cmd, 0);
	4138	+ &smp_cmd, sizeof(smp_cmd), 0);
4289	4139	if (rc)
4290	4140	goto err_out_2;
4291	4141
..	..	@@ -4293,10 +4143,10 @@
4293	4143
4294	4144	err_out_2:
4295	4145	dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1,
4296		- PCI_DMA_FROMDEVICE);
	4146	+ DMA_FROM_DEVICE);
4297	4147	err_out:
4298	4148	dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1,
4299		- PCI_DMA_TODEVICE);
	4149	+ DMA_TO_DEVICE);
4300	4150	return rc;
4301	4151	}
4302	4152
..	..	@@ -4336,8 +4186,7 @@
4336	4186	/* fill in PRD (scatter/gather) table, if any */
4337	4187	if (task->num_scatter > 1) {
4338	4188	pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd);
4339		- phys_addr = ccb->ccb_dma_handle +
4340		- offsetof(struct pm8001_ccb_info, buf_prd[0]);
	4189	+ phys_addr = ccb->ccb_dma_handle;
4341	4190	ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(phys_addr));
4342	4191	ssp_cmd.addr_high = cpu_to_le32(upper_32_bits(phys_addr));
4343	4192	ssp_cmd.esgl = cpu_to_le32(1<<31);
..	..	@@ -4353,7 +4202,8 @@
4353	4202	ssp_cmd.len = cpu_to_le32(task->total_xfer_len);
4354	4203	ssp_cmd.esgl = 0;
4355	4204	}
4356		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &ssp_cmd, 0);
	4205	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &ssp_cmd,
	4206	+ sizeof(ssp_cmd), 0);
4357	4207	return ret;
4358	4208	}
4359	4209
..	..	@@ -4375,21 +4225,21 @@
4375	4225	u32 opc = OPC_INB_SATA_HOST_OPSTART;
4376	4226	memset(&sata_cmd, 0, sizeof(sata_cmd));
4377	4227	circularQ = &pm8001_ha->inbnd_q_tbl[0];
4378		- if (task->data_dir == PCI_DMA_NONE) {
	4228	+
	4229	+ if (task->data_dir == DMA_NONE && !task->ata_task.use_ncq) {
4379	4230	ATAP = 0x04; /* no data*/
4380		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n"));
	4231	+ pm8001_dbg(pm8001_ha, IO, "no data\n");
4381	4232	} else if (likely(!task->ata_task.device_control_reg_update)) {
4382		- if (task->ata_task.dma_xfer) {
	4233	+ if (task->ata_task.use_ncq &&
	4234	+ dev->sata_dev.class != ATA_DEV_ATAPI) {
	4235	+ ATAP = 0x07; /* FPDMA */
	4236	+ pm8001_dbg(pm8001_ha, IO, "FPDMA\n");
	4237	+ } else if (task->ata_task.dma_xfer) {
4383	4238	ATAP = 0x06; /* DMA */
4384		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n"));
	4239	+ pm8001_dbg(pm8001_ha, IO, "DMA\n");
4385	4240	} else {
4386	4241	ATAP = 0x05; /* PIO*/
4387		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n"));
4388		- }
4389		- if (task->ata_task.use_ncq &&
4390		- dev->sata_dev.class != ATA_DEV_ATAPI) {
4391		- ATAP = 0x07; /* FPDMA */
4392		- PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n"));
	4242	+ pm8001_dbg(pm8001_ha, IO, "PIO\n");
4393	4243	}
4394	4244	}
4395	4245	if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) {
..	..	@@ -4409,8 +4259,7 @@
4409	4259	/* fill in PRD (scatter/gather) table, if any */
4410	4260	if (task->num_scatter > 1) {
4411	4261	pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd);
4412		- phys_addr = ccb->ccb_dma_handle +
4413		- offsetof(struct pm8001_ccb_info, buf_prd[0]);
	4262	+ phys_addr = ccb->ccb_dma_handle;
4414	4263	sata_cmd.addr_low = lower_32_bits(phys_addr);
4415	4264	sata_cmd.addr_high = upper_32_bits(phys_addr);
4416	4265	sata_cmd.esgl = cpu_to_le32(1 << 31);
..	..	@@ -4447,10 +4296,10 @@
4447	4296	SAS_TASK_STATE_ABORTED))) {
4448	4297	spin_unlock_irqrestore(&task->task_state_lock,
4449	4298	flags);
4450		- PM8001_FAIL_DBG(pm8001_ha,
4451		- pm8001_printk("task 0x%p resp 0x%x "
4452		- " stat 0x%x but aborted by upper layer "
4453		- "\n", task, ts->resp, ts->stat));
	4299	+ pm8001_dbg(pm8001_ha, FAIL,
	4300	+ "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n",
	4301	+ task, ts->resp,
	4302	+ ts->stat);
4454	4303	pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
4455	4304	} else {
4456	4305	spin_unlock_irqrestore(&task->task_state_lock,
..	..	@@ -4462,14 +4311,14 @@
4462	4311	}
4463	4312	}
4464	4313
4465		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 0);
	4314	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd,
	4315	+ sizeof(sata_cmd), 0);
4466	4316	return ret;
4467	4317	}
4468	4318
4469	4319	/**
4470	4320	* pm8001_chip_phy_start_req - start phy via PHY_START COMMAND
4471	4321	* @pm8001_ha: our hba card information.
4472		- * @num: the inbound queue number
4473	4322	* @phy_id: the phy id which we wanted to start up.
4474	4323	*/
4475	4324	static int
..	..	@@ -4497,14 +4346,14 @@
4497	4346	memcpy(payload.sas_identify.sas_addr,
4498	4347	pm8001_ha->sas_addr, SAS_ADDR_SIZE);
4499	4348	payload.sas_identify.phy_id = phy_id;
4500		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0);
	4349	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload,
	4350	+ sizeof(payload), 0);
4501	4351	return ret;
4502	4352	}
4503	4353
4504	4354	/**
4505	4355	* pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND
4506	4356	* @pm8001_ha: our hba card information.
4507		- * @num: the inbound queue number
4508	4357	* @phy_id: the phy id which we wanted to start up.
4509	4358	*/
4510	4359	static int pm8001_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -4519,11 +4368,12 @@
4519	4368	memset(&payload, 0, sizeof(payload));
4520	4369	payload.tag = cpu_to_le32(tag);
4521	4370	payload.phy_id = cpu_to_le32(phy_id);
4522		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0);
	4371	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload,
	4372	+ sizeof(payload), 0);
4523	4373	return ret;
4524	4374	}
4525	4375
4526		-/**
	4376	+/*
4527	4377	* see comments on pm8001_mpi_reg_resp.
4528	4378	*/
4529	4379	static int pm8001_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -4561,7 +4411,7 @@
4561	4411	pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE)
4562	4412	stp_sspsmp_sata = 0x01; /ssp or smp/
4563	4413	}
4564		- if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type))
	4414	+ if (parent_dev && dev_is_expander(parent_dev->dev_type))
4565	4415	phy_id = parent_dev->ex_dev.ex_phy->phy_id;
4566	4416	else
4567	4417	phy_id = pm8001_dev->attached_phy;
..	..	@@ -4578,11 +4428,15 @@
4578	4428	cpu_to_le32(ITNT \| (firstBurstSize * 0x10000));
4579	4429	memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr,
4580	4430	SAS_ADDR_SIZE);
4581		- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4431	+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4432	+ sizeof(payload), 0);
	4433	+ if (rc)
	4434	+ pm8001_tag_free(pm8001_ha, tag);
	4435	+
4582	4436	return rc;
4583	4437	}
4584	4438
4585		-/**
	4439	+/*
4586	4440	* see comments on pm8001_mpi_reg_resp.
4587	4441	*/
4588	4442	int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -4597,18 +4451,18 @@
4597	4451	memset(&payload, 0, sizeof(payload));
4598	4452	payload.tag = cpu_to_le32(1);
4599	4453	payload.device_id = cpu_to_le32(device_id);
4600		- PM8001_MSG_DBG(pm8001_ha,
4601		- pm8001_printk("unregister device device_id = %d\n", device_id));
4602		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4454	+ pm8001_dbg(pm8001_ha, MSG, "unregister device device_id = %d\n",
	4455	+ device_id);
	4456	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4457	+ sizeof(payload), 0);
4603	4458	return ret;
4604	4459	}
4605	4460
4606	4461	/**
4607	4462	* pm8001_chip_phy_ctl_req - support the local phy operation
4608	4463	* @pm8001_ha: our hba card information.
4609		- * @num: the inbound queue number
4610		- * @phy_id: the phy id which we wanted to operate
4611		- * @phy_op:
	4464	+ * @phyId: the phy id which we wanted to operate
	4465	+ * @phy_op: the phy operation to request
4612	4466	*/
4613	4467	static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
4614	4468	u32 phyId, u32 phy_op)
..	..	@@ -4622,33 +4476,37 @@
4622	4476	payload.tag = cpu_to_le32(1);
4623	4477	payload.phyop_phyid =
4624	4478	cpu_to_le32(((phy_op & 0xff) << 8) \| (phyId & 0x0F));
4625		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4479	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4480	+ sizeof(payload), 0);
4626	4481	return ret;
4627	4482	}
4628	4483
4629		-static u32 pm8001_chip_is_our_interupt(struct pm8001_hba_info *pm8001_ha)
	4484	+static u32 pm8001_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
4630	4485	{
4631		- u32 value;
4632	4486	#ifdef PM8001_USE_MSIX
4633	4487	return 1;
4634		-#endif
	4488	+#else
	4489	+ u32 value;
	4490	+
4635	4491	value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
4636	4492	if (value)
4637	4493	return 1;
4638	4494	return 0;
4639		-
	4495	+#endif
4640	4496	}
4641	4497
4642	4498	/**
4643	4499	* pm8001_chip_isr - PM8001 isr handler.
4644	4500	* @pm8001_ha: our hba card information.
4645		- * @irq: irq number.
4646		- * @stat: stat.
	4501	+ * @vec: IRQ number
4647	4502	*/
4648	4503	static irqreturn_t
4649	4504	pm8001_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec)
4650	4505	{
4651	4506	pm8001_chip_interrupt_disable(pm8001_ha, vec);
	4507	+ pm8001_dbg(pm8001_ha, DEVIO,
	4508	+ "irq vec %d, ODMR:0x%x\n",
	4509	+ vec, pm8001_cr32(pm8001_ha, 0, 0x30));
4652	4510	process_oq(pm8001_ha, vec);
4653	4511	pm8001_chip_interrupt_enable(pm8001_ha, vec);
4654	4512	return IRQ_HANDLED;
..	..	@@ -4672,23 +4530,21 @@
4672	4530	task_abort.device_id = cpu_to_le32(dev_id);
4673	4531	task_abort.tag = cpu_to_le32(cmd_tag);
4674	4532	}
4675		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 0);
	4533	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort,
	4534	+ sizeof(task_abort), 0);
4676	4535	return ret;
4677	4536	}
4678	4537
4679		-/**
	4538	+/*
4680	4539	* pm8001_chip_abort_task - SAS abort task when error or exception happened.
4681		- * @task: the task we wanted to aborted.
4682		- * @flag: the abort flag.
4683	4540	*/
4684	4541	int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
4685	4542	struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag, u32 cmd_tag)
4686	4543	{
4687	4544	u32 opc, device_id;
4688	4545	int rc = TMF_RESP_FUNC_FAILED;
4689		- PM8001_EH_DBG(pm8001_ha,
4690		- pm8001_printk("cmd_tag = %x, abort task tag = 0x%x",
4691		- cmd_tag, task_tag));
	4546	+ pm8001_dbg(pm8001_ha, EH, "cmd_tag = %x, abort task tag = 0x%x\n",
	4547	+ cmd_tag, task_tag);
4692	4548	if (pm8001_dev->dev_type == SAS_END_DEVICE)
4693	4549	opc = OPC_INB_SSP_ABORT;
4694	4550	else if (pm8001_dev->dev_type == SAS_SATA_DEV)
..	..	@@ -4699,7 +4555,7 @@
4699	4555	rc = send_task_abort(pm8001_ha, opc, device_id, flag,
4700	4556	task_tag, cmd_tag);
4701	4557	if (rc != TMF_RESP_FUNC_COMPLETE)
4702		- PM8001_EH_DBG(pm8001_ha, pm8001_printk("rc= %d\n", rc));
	4558	+ pm8001_dbg(pm8001_ha, EH, "rc= %d\n", rc);
4703	4559	return rc;
4704	4560	}
4705	4561
..	..	@@ -4727,9 +4583,10 @@
4727	4583	memcpy(sspTMCmd.lun, task->ssp_task.LUN, 8);
4728	4584	sspTMCmd.tag = cpu_to_le32(ccb->ccb_tag);
4729	4585	if (pm8001_ha->chip_id != chip_8001)
4730		- sspTMCmd.ds_ads_m = 0x08;
	4586	+ sspTMCmd.ds_ads_m = cpu_to_le32(0x08);
4731	4587	circularQ = &pm8001_ha->inbnd_q_tbl[0];
4732		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sspTMCmd, 0);
	4588	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sspTMCmd,
	4589	+ sizeof(sspTMCmd), 0);
4733	4590	return ret;
4734	4591	}
4735	4592
..	..	@@ -4751,7 +4608,7 @@
4751	4608	if (!fw_control_context)
4752	4609	return -ENOMEM;
4753	4610	fw_control_context->usrAddr = (u8 *)ioctl_payload->func_specific;
4754		- fw_control_context->len = ioctl_payload->length;
	4611	+ fw_control_context->len = ioctl_payload->rd_length;
4755	4612	circularQ = &pm8001_ha->inbnd_q_tbl[0];
4756	4613	memset(&nvmd_req, 0, sizeof(nvmd_req));
4757	4614	rc = pm8001_tag_alloc(pm8001_ha, &tag);
..	..	@@ -4772,7 +4629,7 @@
4772	4629
4773	4630	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| twi_addr << 16 \|
4774	4631	twi_page_size << 8 \| TWI_DEVICE);
4775		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4632	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length);
4776	4633	nvmd_req.resp_addr_hi =
4777	4634	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
4778	4635	nvmd_req.resp_addr_lo =
..	..	@@ -4781,7 +4638,7 @@
4781	4638	}
4782	4639	case C_SEEPROM: {
4783	4640	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| C_SEEPROM);
4784		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4641	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length);
4785	4642	nvmd_req.resp_addr_hi =
4786	4643	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
4787	4644	nvmd_req.resp_addr_lo =
..	..	@@ -4790,7 +4647,7 @@
4790	4647	}
4791	4648	case VPD_FLASH: {
4792	4649	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| VPD_FLASH);
4793		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4650	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length);
4794	4651	nvmd_req.resp_addr_hi =
4795	4652	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
4796	4653	nvmd_req.resp_addr_lo =
..	..	@@ -4799,7 +4656,7 @@
4799	4656	}
4800	4657	case EXPAN_ROM: {
4801	4658	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| EXPAN_ROM);
4802		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4659	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length);
4803	4660	nvmd_req.resp_addr_hi =
4804	4661	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
4805	4662	nvmd_req.resp_addr_lo =
..	..	@@ -4808,7 +4665,7 @@
4808	4665	}
4809	4666	case IOP_RDUMP: {
4810	4667	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| IOP_RDUMP);
4811		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4668	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length);
4812	4669	nvmd_req.vpd_offset = cpu_to_le32(ioctl_payload->offset);
4813	4670	nvmd_req.resp_addr_hi =
4814	4671	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
..	..	@@ -4819,7 +4676,8 @@
4819	4676	default:
4820	4677	break;
4821	4678	}
4822		- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &nvmd_req, 0);
	4679	+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &nvmd_req,
	4680	+ sizeof(nvmd_req), 0);
4823	4681	if (rc) {
4824	4682	kfree(fw_control_context);
4825	4683	pm8001_tag_free(pm8001_ha, tag);
..	..	@@ -4847,7 +4705,7 @@
4847	4705	circularQ = &pm8001_ha->inbnd_q_tbl[0];
4848	4706	memcpy(pm8001_ha->memoryMap.region[NVMD].virt_ptr,
4849	4707	&ioctl_payload->func_specific,
4850		- ioctl_payload->length);
	4708	+ ioctl_payload->wr_length);
4851	4709	memset(&nvmd_req, 0, sizeof(nvmd_req));
4852	4710	rc = pm8001_tag_alloc(pm8001_ha, &tag);
4853	4711	if (rc) {
..	..	@@ -4866,7 +4724,7 @@
4866	4724	nvmd_req.reserved[0] = cpu_to_le32(0xFEDCBA98);
4867	4725	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| twi_addr << 16 \|
4868	4726	twi_page_size << 8 \| TWI_DEVICE);
4869		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4727	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length);
4870	4728	nvmd_req.resp_addr_hi =
4871	4729	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
4872	4730	nvmd_req.resp_addr_lo =
..	..	@@ -4875,7 +4733,7 @@
4875	4733	}
4876	4734	case C_SEEPROM:
4877	4735	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| C_SEEPROM);
4878		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4736	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length);
4879	4737	nvmd_req.reserved[0] = cpu_to_le32(0xFEDCBA98);
4880	4738	nvmd_req.resp_addr_hi =
4881	4739	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
..	..	@@ -4884,7 +4742,7 @@
4884	4742	break;
4885	4743	case VPD_FLASH:
4886	4744	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| VPD_FLASH);
4887		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4745	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length);
4888	4746	nvmd_req.reserved[0] = cpu_to_le32(0xFEDCBA98);
4889	4747	nvmd_req.resp_addr_hi =
4890	4748	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
..	..	@@ -4893,7 +4751,7 @@
4893	4751	break;
4894	4752	case EXPAN_ROM:
4895	4753	nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode \| EXPAN_ROM);
4896		- nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
	4754	+ nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length);
4897	4755	nvmd_req.reserved[0] = cpu_to_le32(0xFEDCBA98);
4898	4756	nvmd_req.resp_addr_hi =
4899	4757	cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
..	..	@@ -4903,7 +4761,8 @@
4903	4761	default:
4904	4762	break;
4905	4763	}
4906		- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &nvmd_req, 0);
	4764	+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &nvmd_req,
	4765	+ sizeof(nvmd_req), 0);
4907	4766	if (rc) {
4908	4767	kfree(fw_control_context);
4909	4768	pm8001_tag_free(pm8001_ha, tag);
..	..	@@ -4915,6 +4774,7 @@
4915	4774	* pm8001_chip_fw_flash_update_build - support the firmware update operation
4916	4775	* @pm8001_ha: our hba card information.
4917	4776	* @fw_flash_updata_info: firmware flash update param
	4777	+ * @tag: Tag to apply to the payload
4918	4778	*/
4919	4779	int
4920	4780	pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
..	..	@@ -4938,7 +4798,8 @@
4938	4798	cpu_to_le32(lower_32_bits(le64_to_cpu(info->sgl.addr)));
4939	4799	payload.sgl_addr_hi =
4940	4800	cpu_to_le32(upper_32_bits(le64_to_cpu(info->sgl.addr)));
4941		- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4801	+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4802	+ sizeof(payload), 0);
4942	4803	return ret;
4943	4804	}
4944	4805
..	..	@@ -4960,6 +4821,9 @@
4960	4821	if (!fw_control_context)
4961	4822	return -ENOMEM;
4962	4823	fw_control = (struct fw_control_info *)&ioctl_payload->func_specific;
	4824	+ pm8001_dbg(pm8001_ha, DEVIO,
	4825	+ "dma fw_control context input length :%x\n",
	4826	+ fw_control->len);
4963	4827	memcpy(buffer, fw_control->buffer, fw_control->len);
4964	4828	flash_update_info.sgl.addr = cpu_to_le64(phys_addr);
4965	4829	flash_update_info.sgl.im_len.len = cpu_to_le32(fw_control->len);
..	..	@@ -4981,6 +4845,11 @@
4981	4845	ccb->ccb_tag = tag;
4982	4846	rc = pm8001_chip_fw_flash_update_build(pm8001_ha, &flash_update_info,
4983	4847	tag);
	4848	+ if (rc) {
	4849	+ kfree(fw_control_context);
	4850	+ pm8001_tag_free(pm8001_ha, tag);
	4851	+ }
	4852	+
4984	4853	return rc;
4985	4854	}
4986	4855
..	..	@@ -5083,7 +4952,11 @@
5083	4952	payload.tag = cpu_to_le32(tag);
5084	4953	payload.device_id = cpu_to_le32(pm8001_dev->device_id);
5085	4954	payload.nds = cpu_to_le32(state);
5086		- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4955	+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4956	+ sizeof(payload), 0);
	4957	+ if (rc)
	4958	+ pm8001_tag_free(pm8001_ha, tag);
	4959	+
5087	4960	return rc;
5088	4961
5089	4962	}
..	..	@@ -5108,7 +4981,8 @@
5108	4981	payload.SSAHOLT = cpu_to_le32(0xd << 25);
5109	4982	payload.sata_hol_tmo = cpu_to_le32(80);
5110	4983	payload.open_reject_cmdretries_data_retries = cpu_to_le32(0xff00ff);
5111		- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
	4984	+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
	4985	+ sizeof(payload), 0);
5112	4986	if (rc)
5113	4987	pm8001_tag_free(pm8001_ha, tag);
5114	4988	return rc;
..	..	@@ -5122,7 +4996,7 @@
5122	4996	.chip_rst = pm8001_hw_chip_rst,
5123	4997	.chip_iounmap = pm8001_chip_iounmap,
5124	4998	.isr = pm8001_chip_isr,
5125		- .is_our_interupt = pm8001_chip_is_our_interupt,
	4999	+ .is_our_interrupt = pm8001_chip_is_our_interrupt,
5126	5000	.isr_process_oq = process_oq,
5127	5001	.interrupt_enable = pm8001_chip_interrupt_enable,
5128	5002	.interrupt_disable = pm8001_chip_interrupt_disable,