| .. | .. |
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| 124 | 124 | |
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| 125 | 125 | while (n--) { |
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| 126 | 126 | buf->len = sge->sge_fl_buf_size[sreg]; |
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| 127 | | - buf->vaddr = pci_alloc_consistent(hw->pdev, buf->len, |
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| 128 | | - &buf->paddr); |
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| 127 | + buf->vaddr = dma_alloc_coherent(&hw->pdev->dev, buf->len, |
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| 128 | + &buf->paddr, GFP_KERNEL); |
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| 129 | 129 | if (!buf->vaddr) { |
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| 130 | 130 | csio_err(hw, "Could only fill %d buffers!\n", n + 1); |
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| 131 | 131 | return -ENOMEM; |
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| .. | .. |
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| 233 | 233 | |
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| 234 | 234 | q = wrm->q_arr[free_idx]; |
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| 235 | 235 | |
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| 236 | | - q->vstart = pci_zalloc_consistent(hw->pdev, qsz, &q->pstart); |
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| 236 | + q->vstart = dma_alloc_coherent(&hw->pdev->dev, qsz, &q->pstart, |
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| 237 | + GFP_KERNEL); |
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| 237 | 238 | if (!q->vstart) { |
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| 238 | 239 | csio_err(hw, |
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| 239 | 240 | "Failed to allocate DMA memory for " |
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| .. | .. |
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| 807 | 808 | |
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| 808 | 809 | csio_q_eqid(hw, i) = CSIO_MAX_QID; |
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| 809 | 810 | } |
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| 811 | + fallthrough; |
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| 810 | 812 | case CSIO_INGRESS: |
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| 811 | 813 | if (csio_q_iqid(hw, i) != CSIO_MAX_QID) { |
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| 812 | 814 | csio_wr_cleanup_iq_ftr(hw, i); |
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| .. | .. |
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| 1314 | 1316 | u32 fl_align = clsz < 32 ? 32 : clsz; |
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| 1315 | 1317 | u32 pack_align; |
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| 1316 | 1318 | u32 ingpad, ingpack; |
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| 1317 | | - int pcie_cap; |
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| 1318 | 1319 | |
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| 1319 | 1320 | csio_wr_reg32(hw, HOSTPAGESIZEPF0_V(s_hps) | HOSTPAGESIZEPF1_V(s_hps) | |
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| 1320 | 1321 | HOSTPAGESIZEPF2_V(s_hps) | HOSTPAGESIZEPF3_V(s_hps) | |
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| .. | .. |
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| 1345 | 1346 | * multiple of the Maximum Payload Size. |
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| 1346 | 1347 | */ |
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| 1347 | 1348 | pack_align = fl_align; |
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| 1348 | | - pcie_cap = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP); |
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| 1349 | | - if (pcie_cap) { |
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| 1349 | + if (pci_is_pcie(hw->pdev)) { |
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| 1350 | 1350 | u32 mps, mps_log; |
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| 1351 | 1351 | u16 devctl; |
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| 1352 | 1352 | |
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| .. | .. |
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| 1354 | 1354 | * [bits 7:5] encodes sizes as powers of 2 starting at |
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| 1355 | 1355 | * 128 bytes. |
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| 1356 | 1356 | */ |
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| 1357 | | - pci_read_config_word(hw->pdev, |
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| 1358 | | - pcie_cap + PCI_EXP_DEVCTL, |
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| 1359 | | - &devctl); |
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| 1357 | + pcie_capability_read_word(hw->pdev, PCI_EXP_DEVCTL, &devctl); |
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| 1360 | 1358 | mps_log = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5) + 7; |
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| 1361 | 1359 | mps = 1 << mps_log; |
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| 1362 | 1360 | if (mps > pack_align) |
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| .. | .. |
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| 1703 | 1701 | buf = &q->un.fl.bufs[j]; |
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| 1704 | 1702 | if (!buf->vaddr) |
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| 1705 | 1703 | continue; |
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| 1706 | | - pci_free_consistent(hw->pdev, buf->len, |
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| 1707 | | - buf->vaddr, |
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| 1708 | | - buf->paddr); |
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| 1704 | + dma_free_coherent(&hw->pdev->dev, |
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| 1705 | + buf->len, buf->vaddr, |
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| 1706 | + buf->paddr); |
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| 1709 | 1707 | } |
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| 1710 | 1708 | kfree(q->un.fl.bufs); |
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| 1711 | 1709 | } |
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| 1712 | | - pci_free_consistent(hw->pdev, q->size, |
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| 1713 | | - q->vstart, q->pstart); |
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| 1710 | + dma_free_coherent(&hw->pdev->dev, q->size, |
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| 1711 | + q->vstart, q->pstart); |
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| 1714 | 1712 | } |
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| 1715 | 1713 | kfree(q); |
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| 1716 | 1714 | } |
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