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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h
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@@ -8,9 +8,18 @@
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 #ifndef _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_
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 #define _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_
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+#include <linux/rk-camera-module.h>
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+
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+#define PHY_MAX 16
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+#define MAX_DEV_NAME_LEN 32
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+
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 /* add new chip id in tail by time order */
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 enum csi2_dphy_chip_id {
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 	CHIP_ID_RK3568 = 0x0,
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+	CHIP_ID_RK3588 = 0x1,
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+	CHIP_ID_RK3588_DCPHY = 0x2,
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+	CHIP_ID_RV1106 = 0x3,
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+	CHIP_ID_RK3562 = 0x4,
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 };
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 enum csi2_dphy_rx_pads {
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@@ -46,11 +55,18 @@
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 };
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 struct csi2_dphy_hw;
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+struct samsung_mipi_dcphy;
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+
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+struct dphy_drv_data {
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+	const char dev_name[MAX_DEV_NAME_LEN];
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+	enum csi2_dphy_vendor vendor;
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+};
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 struct csi2_dphy {
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 	struct device *dev;
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 	struct list_head list;
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 	struct csi2_dphy_hw *dphy_hw;
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+	struct samsung_mipi_dcphy *samsung_phy;
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 	struct v4l2_async_notifier notifier;
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 	struct v4l2_subdev sd;
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 	struct mutex mutex; /* lock for updating protection */
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@@ -61,29 +77,35 @@
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 	int phy_index;
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 	bool is_streaming;
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 	enum csi2_dphy_lane_mode lane_mode;
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+	const struct dphy_drv_data *drv_data;
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+	struct rkmodule_csi_dphy_param dphy_param;
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 };
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 struct dphy_hw_drv_data {
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-	const struct	clk_bulk_data *clks;
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-	int num_clks;
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 	const struct hsfreq_range *hsfreq_ranges;
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 	int num_hsfreq_ranges;
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+	const struct hsfreq_range *hsfreq_ranges_cphy;
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+	int num_hsfreq_ranges_cphy;
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 	const struct grf_reg *grf_regs;
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 	const struct txrx_reg *txrx_regs;
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 	const struct csi2dphy_reg *csi2dphy_regs;
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 	void (*individual_init)(struct csi2_dphy_hw *hw);
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+	int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
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+	int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
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 	enum csi2_dphy_chip_id chip_id;
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 };
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 struct csi2_dphy_hw {
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 	struct device *dev;
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 	struct regmap *regmap_grf;
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+	struct regmap *regmap_sys_grf;
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 	const struct grf_reg *grf_regs;
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 	const struct txrx_reg *txrx_regs;
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 	const struct csi2dphy_reg *csi2dphy_regs;
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 	const struct dphy_hw_drv_data *drv_data;
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 	void __iomem *hw_base_addr;
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-	struct clk_bulk_data	*clks;
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+	struct clk_bulk_data	*clks_bulk;
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+	struct reset_control	*rsts_bulk;
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 	struct csi2_dphy *dphy_dev[MAX_NUM_CSI2_DPHY];
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 	struct v4l2_subdev sd;
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 	struct mutex mutex; /* lock for updating protection */
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@@ -95,8 +117,11 @@
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 	int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
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 	int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
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+	int (*ttl_mode_enable)(struct csi2_dphy_hw *hw);
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+	void (*ttl_mode_disable)(struct csi2_dphy_hw *hw);
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 };
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-extern struct platform_driver rockchip_csi2_dphy_driver;
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+int rockchip_csi2_dphy_hw_init(void);
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+int rockchip_csi2_dphy_init(void);
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 #endif