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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/drivers/mtd/nand/raw/qcom_nandc.c
....@@ -1,14 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3
- *
4
- * This software is licensed under the terms of the GNU General Public
5
- * License version 2, as published by the Free Software Foundation, and
6
- * may be copied, distributed, and modified under those terms.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
124  */
135 #include <linux/clk.h>
146 #include <linux/slab.h>
....@@ -348,7 +340,8 @@
348340  * @data_buffer:		our local DMA buffer for page read/writes,
349341  *				used when we can't use the buffer provided
350342  *				by upper layers directly
351
- * @buf_size/count/start:	markers for chip->read_buf/write_buf functions
343
+ * @buf_size/count/start:	markers for chip->legacy.read_buf/write_buf
344
+ *				functions
352345  * @reg_read_buf:		local buffer for reading back registers via DMA
353346  * @reg_read_dma:		contains dma address for register read buffer
354347  * @reg_read_pos:		marker for data read in reg_read_buf
....@@ -1155,8 +1148,8 @@
11551148 }
11561149 
11571150 /*
1158
- * the following functions are used within chip->cmdfunc() to perform different
1159
- * NAND_CMD_* commands
1151
+ * the following functions are used within chip->legacy.cmdfunc() to
1152
+ * perform different NAND_CMD_* commands
11601153  */
11611154 
11621155 /* sets up descriptors for NAND_CMD_PARAM */
....@@ -1436,15 +1429,14 @@
14361429 }
14371430 
14381431 /*
1439
- * Implements chip->cmdfunc. It's  only used for a limited set of commands.
1440
- * The rest of the commands wouldn't be called by upper layers. For example,
1441
- * NAND_CMD_READOOB would never be called because we have our own versions
1442
- * of read_oob ops for nand_ecc_ctrl.
1432
+ * Implements chip->legacy.cmdfunc. It's  only used for a limited set of
1433
+ * commands. The rest of the commands wouldn't be called by upper layers.
1434
+ * For example, NAND_CMD_READOOB would never be called because we have our own
1435
+ * versions of read_oob ops for nand_ecc_ctrl.
14431436  */
1444
-static void qcom_nandc_command(struct mtd_info *mtd, unsigned int command,
1437
+static void qcom_nandc_command(struct nand_chip *chip, unsigned int command,
14451438 			       int column, int page_addr)
14461439 {
1447
-	struct nand_chip *chip = mtd_to_nand(mtd);
14481440 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
14491441 	struct nand_ecc_ctrl *ecc = &chip->ecc;
14501442 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
....@@ -1683,14 +1675,12 @@
16831675 	u8 *cw_data_buf, *cw_oob_buf;
16841676 	int cw, data_size, oob_size, ret = 0;
16851677 
1686
-	if (!data_buf) {
1687
-		data_buf = chip->data_buf;
1688
-		chip->pagebuf = -1;
1689
-	}
1678
+	if (!data_buf)
1679
+		data_buf = nand_get_data_buf(chip);
16901680 
16911681 	if (!oob_buf) {
1682
+		nand_get_data_buf(chip);
16921683 		oob_buf = chip->oob_poi;
1693
-		chip->pagebuf = -1;
16941684 	}
16951685 
16961686 	for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
....@@ -1951,8 +1941,8 @@
19511941 }
19521942 
19531943 /* implements ecc->read_page() */
1954
-static int qcom_nandc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1955
-				uint8_t *buf, int oob_required, int page)
1944
+static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
1945
+				int oob_required, int page)
19561946 {
19571947 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
19581948 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
....@@ -1968,10 +1958,10 @@
19681958 }
19691959 
19701960 /* implements ecc->read_page_raw() */
1971
-static int qcom_nandc_read_page_raw(struct mtd_info *mtd,
1972
-				    struct nand_chip *chip, uint8_t *buf,
1961
+static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
19731962 				    int oob_required, int page)
19741963 {
1964
+	struct mtd_info *mtd = nand_to_mtd(chip);
19751965 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
19761966 	struct nand_ecc_ctrl *ecc = &chip->ecc;
19771967 	int cw, ret;
....@@ -1991,8 +1981,7 @@
19911981 }
19921982 
19931983 /* implements ecc->read_oob() */
1994
-static int qcom_nandc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1995
-			       int page)
1984
+static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
19961985 {
19971986 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
19981987 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
....@@ -2009,8 +1998,8 @@
20091998 }
20101999 
20112000 /* implements ecc->write_page() */
2012
-static int qcom_nandc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2013
-				 const uint8_t *buf, int oob_required, int page)
2001
+static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
2002
+				 int oob_required, int page)
20142003 {
20152004 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
20162005 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
....@@ -2079,10 +2068,11 @@
20792068 }
20802069 
20812070 /* implements ecc->write_page_raw() */
2082
-static int qcom_nandc_write_page_raw(struct mtd_info *mtd,
2083
-				     struct nand_chip *chip, const uint8_t *buf,
2084
-				     int oob_required, int page)
2071
+static int qcom_nandc_write_page_raw(struct nand_chip *chip,
2072
+				     const uint8_t *buf, int oob_required,
2073
+				     int page)
20852074 {
2075
+	struct mtd_info *mtd = nand_to_mtd(chip);
20862076 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
20872077 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
20882078 	struct nand_ecc_ctrl *ecc = &chip->ecc;
....@@ -2157,9 +2147,9 @@
21572147  * since ECC is calculated for the combined codeword. So update the OOB from
21582148  * chip->oob_poi, and pad the data area with OxFF before writing.
21592149  */
2160
-static int qcom_nandc_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
2161
-				int page)
2150
+static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
21622151 {
2152
+	struct mtd_info *mtd = nand_to_mtd(chip);
21632153 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
21642154 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
21652155 	struct nand_ecc_ctrl *ecc = &chip->ecc;
....@@ -2199,9 +2189,9 @@
21992189 	return nand_prog_page_end_op(chip);
22002190 }
22012191 
2202
-static int qcom_nandc_block_bad(struct mtd_info *mtd, loff_t ofs)
2192
+static int qcom_nandc_block_bad(struct nand_chip *chip, loff_t ofs)
22032193 {
2204
-	struct nand_chip *chip = mtd_to_nand(mtd);
2194
+	struct mtd_info *mtd = nand_to_mtd(chip);
22052195 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
22062196 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
22072197 	struct nand_ecc_ctrl *ecc = &chip->ecc;
....@@ -2237,9 +2227,8 @@
22372227 	return bad;
22382228 }
22392229 
2240
-static int qcom_nandc_block_markbad(struct mtd_info *mtd, loff_t ofs)
2230
+static int qcom_nandc_block_markbad(struct nand_chip *chip, loff_t ofs)
22412231 {
2242
-	struct nand_chip *chip = mtd_to_nand(mtd);
22432232 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
22442233 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
22452234 	struct nand_ecc_ctrl *ecc = &chip->ecc;
....@@ -2280,14 +2269,13 @@
22802269 }
22812270 
22822271 /*
2283
- * the three functions below implement chip->read_byte(), chip->read_buf()
2284
- * and chip->write_buf() respectively. these aren't used for
2285
- * reading/writing page data, they are used for smaller data like reading
2286
- * id, status etc
2272
+ * the three functions below implement chip->legacy.read_byte(),
2273
+ * chip->legacy.read_buf() and chip->legacy.write_buf() respectively. these
2274
+ * aren't used for reading/writing page data, they are used for smaller data
2275
+ * like reading	id, status etc
22872276  */
2288
-static uint8_t qcom_nandc_read_byte(struct mtd_info *mtd)
2277
+static uint8_t qcom_nandc_read_byte(struct nand_chip *chip)
22892278 {
2290
-	struct nand_chip *chip = mtd_to_nand(mtd);
22912279 	struct qcom_nand_host *host = to_qcom_nand_host(chip);
22922280 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
22932281 	u8 *buf = nandc->data_buffer;
....@@ -2307,9 +2295,8 @@
23072295 	return ret;
23082296 }
23092297 
2310
-static void qcom_nandc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
2298
+static void qcom_nandc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
23112299 {
2312
-	struct nand_chip *chip = mtd_to_nand(mtd);
23132300 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
23142301 	int real_len = min_t(size_t, len, nandc->buf_count - nandc->buf_start);
23152302 
....@@ -2317,10 +2304,9 @@
23172304 	nandc->buf_start += real_len;
23182305 }
23192306 
2320
-static void qcom_nandc_write_buf(struct mtd_info *mtd, const uint8_t *buf,
2307
+static void qcom_nandc_write_buf(struct nand_chip *chip, const uint8_t *buf,
23212308 				 int len)
23222309 {
2323
-	struct nand_chip *chip = mtd_to_nand(mtd);
23242310 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
23252311 	int real_len = min_t(size_t, len, nandc->buf_count - nandc->buf_start);
23262312 
....@@ -2330,9 +2316,8 @@
23302316 }
23312317 
23322318 /* we support only one external chip for now */
2333
-static void qcom_nandc_select_chip(struct mtd_info *mtd, int chipnr)
2319
+static void qcom_nandc_select_chip(struct nand_chip *chip, int chipnr)
23342320 {
2335
-	struct nand_chip *chip = mtd_to_nand(mtd);
23362321 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
23372322 
23382323 	if (chipnr <= 0)
....@@ -2566,7 +2551,7 @@
25662551 	ecc->write_page_raw	= qcom_nandc_write_page_raw;
25672552 	ecc->write_oob		= qcom_nandc_write_oob;
25682553 
2569
-	ecc->mode = NAND_ECC_HW;
2554
+	ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
25702555 
25712556 	mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
25722557 
....@@ -2646,6 +2631,29 @@
26462631 	.attach_chip = qcom_nand_attach_chip,
26472632 };
26482633 
2634
+static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
2635
+{
2636
+	if (nandc->props->is_bam) {
2637
+		if (!dma_mapping_error(nandc->dev, nandc->reg_read_dma))
2638
+			dma_unmap_single(nandc->dev, nandc->reg_read_dma,
2639
+					 MAX_REG_RD *
2640
+					 sizeof(*nandc->reg_read_buf),
2641
+					 DMA_FROM_DEVICE);
2642
+
2643
+		if (nandc->tx_chan)
2644
+			dma_release_channel(nandc->tx_chan);
2645
+
2646
+		if (nandc->rx_chan)
2647
+			dma_release_channel(nandc->rx_chan);
2648
+
2649
+		if (nandc->cmd_chan)
2650
+			dma_release_channel(nandc->cmd_chan);
2651
+	} else {
2652
+		if (nandc->chan)
2653
+			dma_release_channel(nandc->chan);
2654
+	}
2655
+}
2656
+
26492657 static int qcom_nandc_alloc(struct qcom_nand_controller *nandc)
26502658 {
26512659 	int ret;
....@@ -2691,22 +2699,31 @@
26912699 			return -EIO;
26922700 		}
26932701 
2694
-		nandc->tx_chan = dma_request_slave_channel(nandc->dev, "tx");
2695
-		if (!nandc->tx_chan) {
2696
-			dev_err(nandc->dev, "failed to request tx channel\n");
2697
-			return -ENODEV;
2702
+		nandc->tx_chan = dma_request_chan(nandc->dev, "tx");
2703
+		if (IS_ERR(nandc->tx_chan)) {
2704
+			ret = PTR_ERR(nandc->tx_chan);
2705
+			nandc->tx_chan = NULL;
2706
+			dev_err_probe(nandc->dev, ret,
2707
+				      "tx DMA channel request failed\n");
2708
+			goto unalloc;
26982709 		}
26992710 
2700
-		nandc->rx_chan = dma_request_slave_channel(nandc->dev, "rx");
2701
-		if (!nandc->rx_chan) {
2702
-			dev_err(nandc->dev, "failed to request rx channel\n");
2703
-			return -ENODEV;
2711
+		nandc->rx_chan = dma_request_chan(nandc->dev, "rx");
2712
+		if (IS_ERR(nandc->rx_chan)) {
2713
+			ret = PTR_ERR(nandc->rx_chan);
2714
+			nandc->rx_chan = NULL;
2715
+			dev_err_probe(nandc->dev, ret,
2716
+				      "rx DMA channel request failed\n");
2717
+			goto unalloc;
27042718 		}
27052719 
2706
-		nandc->cmd_chan = dma_request_slave_channel(nandc->dev, "cmd");
2707
-		if (!nandc->cmd_chan) {
2708
-			dev_err(nandc->dev, "failed to request cmd channel\n");
2709
-			return -ENODEV;
2720
+		nandc->cmd_chan = dma_request_chan(nandc->dev, "cmd");
2721
+		if (IS_ERR(nandc->cmd_chan)) {
2722
+			ret = PTR_ERR(nandc->cmd_chan);
2723
+			nandc->cmd_chan = NULL;
2724
+			dev_err_probe(nandc->dev, ret,
2725
+				      "cmd DMA channel request failed\n");
2726
+			goto unalloc;
27102727 		}
27112728 
27122729 		/*
....@@ -2720,14 +2737,17 @@
27202737 		if (!nandc->bam_txn) {
27212738 			dev_err(nandc->dev,
27222739 				"failed to allocate bam transaction\n");
2723
-			return -ENOMEM;
2740
+			ret = -ENOMEM;
2741
+			goto unalloc;
27242742 		}
27252743 	} else {
2726
-		nandc->chan = dma_request_slave_channel(nandc->dev, "rxtx");
2727
-		if (!nandc->chan) {
2728
-			dev_err(nandc->dev,
2729
-				"failed to request slave channel\n");
2730
-			return -ENODEV;
2744
+		nandc->chan = dma_request_chan(nandc->dev, "rxtx");
2745
+		if (IS_ERR(nandc->chan)) {
2746
+			ret = PTR_ERR(nandc->chan);
2747
+			nandc->chan = NULL;
2748
+			dev_err_probe(nandc->dev, ret,
2749
+				      "rxtx DMA channel request failed\n");
2750
+			return ret;
27312751 		}
27322752 	}
27332753 
....@@ -2738,29 +2758,9 @@
27382758 	nandc->controller.ops = &qcom_nandc_ops;
27392759 
27402760 	return 0;
2741
-}
2742
-
2743
-static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
2744
-{
2745
-	if (nandc->props->is_bam) {
2746
-		if (!dma_mapping_error(nandc->dev, nandc->reg_read_dma))
2747
-			dma_unmap_single(nandc->dev, nandc->reg_read_dma,
2748
-					 MAX_REG_RD *
2749
-					 sizeof(*nandc->reg_read_buf),
2750
-					 DMA_FROM_DEVICE);
2751
-
2752
-		if (nandc->tx_chan)
2753
-			dma_release_channel(nandc->tx_chan);
2754
-
2755
-		if (nandc->rx_chan)
2756
-			dma_release_channel(nandc->rx_chan);
2757
-
2758
-		if (nandc->cmd_chan)
2759
-			dma_release_channel(nandc->cmd_chan);
2760
-	} else {
2761
-		if (nandc->chan)
2762
-			dma_release_channel(nandc->chan);
2763
-	}
2761
+unalloc:
2762
+	qcom_nandc_unalloc(nandc);
2763
+	return ret;
27642764 }
27652765 
27662766 /* one time setup of a few nand controller registers */
....@@ -2777,7 +2777,16 @@
27772777 	/* enable ADM or BAM DMA */
27782778 	if (nandc->props->is_bam) {
27792779 		nand_ctrl = nandc_read(nandc, NAND_CTRL);
2780
-		nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN);
2780
+
2781
+		/*
2782
+		 *NAND_CTRL is an operational registers, and CPU
2783
+		 * access to operational registers are read only
2784
+		 * in BAM mode. So update the NAND_CTRL register
2785
+		 * only if it is not in BAM mode. In most cases BAM
2786
+		 * mode will be enabled in bootloader
2787
+		 */
2788
+		if (!(nand_ctrl & BAM_MODE_EN))
2789
+			nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN);
27812790 	} else {
27822791 		nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN);
27832792 	}
....@@ -2812,13 +2821,13 @@
28122821 	mtd->owner = THIS_MODULE;
28132822 	mtd->dev.parent = dev;
28142823 
2815
-	chip->cmdfunc		= qcom_nandc_command;
2816
-	chip->select_chip	= qcom_nandc_select_chip;
2817
-	chip->read_byte		= qcom_nandc_read_byte;
2818
-	chip->read_buf		= qcom_nandc_read_buf;
2819
-	chip->write_buf		= qcom_nandc_write_buf;
2820
-	chip->set_features	= nand_get_set_features_notsupp;
2821
-	chip->get_features	= nand_get_set_features_notsupp;
2824
+	chip->legacy.cmdfunc	= qcom_nandc_command;
2825
+	chip->legacy.select_chip	= qcom_nandc_select_chip;
2826
+	chip->legacy.read_byte	= qcom_nandc_read_byte;
2827
+	chip->legacy.read_buf	= qcom_nandc_read_buf;
2828
+	chip->legacy.write_buf	= qcom_nandc_write_buf;
2829
+	chip->legacy.set_features	= nand_get_set_features_notsupp;
2830
+	chip->legacy.get_features	= nand_get_set_features_notsupp;
28222831 
28232832 	/*
28242833 	 * the bad block marker is readable only when we read the last codeword
....@@ -2828,11 +2837,11 @@
28282837 	 * and block_markbad helpers until we permanently switch to using
28292838 	 * MTD_OPS_RAW for all drivers (with the help of badblockbits)
28302839 	 */
2831
-	chip->block_bad		= qcom_nandc_block_bad;
2832
-	chip->block_markbad	= qcom_nandc_block_markbad;
2840
+	chip->legacy.block_bad		= qcom_nandc_block_bad;
2841
+	chip->legacy.block_markbad	= qcom_nandc_block_markbad;
28332842 
28342843 	chip->controller = &nandc->controller;
2835
-	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER |
2844
+	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA |
28362845 			 NAND_SKIP_BBTSCAN;
28372846 
28382847 	/* set up initial status value */
....@@ -2997,10 +3006,15 @@
29973006 	struct qcom_nand_controller *nandc = platform_get_drvdata(pdev);
29983007 	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
29993008 	struct qcom_nand_host *host;
3009
+	struct nand_chip *chip;
3010
+	int ret;
30003011 
3001
-	list_for_each_entry(host, &nandc->host_list, node)
3002
-		nand_release(&host->chip);
3003
-
3012
+	list_for_each_entry(host, &nandc->host_list, node) {
3013
+		chip = &host->chip;
3014
+		ret = mtd_device_unregister(nand_to_mtd(chip));
3015
+		WARN_ON(ret);
3016
+		nand_cleanup(chip);
3017
+	}
30043018 
30053019 	qcom_nandc_unalloc(nandc);
30063020