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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/drivers/mtd/nand/raw/hisi504_nand.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Hisilicon NAND Flash controller driver
34  *
....@@ -7,16 +8,6 @@
78  * Author: Zhou Wang <wangzhou.bry@gmail.com>
89  * The initial developer of the original code is Zhiyong Cai
910  * <caizhiyong@huawei.com>
10
- *
11
- * This program is free software; you can redistribute it and/or modify
12
- * it under the terms of the GNU General Public License as published by
13
- * the Free Software Foundation; either version 2 of the License, or
14
- * (at your option) any later version.
15
- *
16
- * This program is distributed in the hope that it will be useful,
17
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
18
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
- * GNU General Public License for more details.
2011  */
2112 #include <linux/of.h>
2213 #include <linux/mtd/mtd.h>
....@@ -195,7 +186,7 @@
195186 	hinfc_write(host, host->dma_buffer, HINFC504_DMA_ADDR_DATA);
196187 	hinfc_write(host, host->dma_oob, HINFC504_DMA_ADDR_OOB);
197188 
198
-	if (chip->ecc.mode == NAND_ECC_NONE) {
189
+	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_NONE) {
199190 		hinfc_write(host, ((mtd->oobsize & HINFC504_DMA_LEN_OOB_MASK)
200191 			<< HINFC504_DMA_LEN_OOB_SHIFT), HINFC504_DMA_LEN);
201192 
....@@ -353,9 +344,8 @@
353344 	return 0;
354345 }
355346 
356
-static void hisi_nfc_select_chip(struct mtd_info *mtd, int chipselect)
347
+static void hisi_nfc_select_chip(struct nand_chip *chip, int chipselect)
357348 {
358
-	struct nand_chip *chip = mtd_to_nand(mtd);
359349 	struct hinfc_host *host = nand_get_controller_data(chip);
360350 
361351 	if (chipselect < 0)
....@@ -364,9 +354,8 @@
364354 	host->chipselect = chipselect;
365355 }
366356 
367
-static uint8_t hisi_nfc_read_byte(struct mtd_info *mtd)
357
+static uint8_t hisi_nfc_read_byte(struct nand_chip *chip)
368358 {
369
-	struct nand_chip *chip = mtd_to_nand(mtd);
370359 	struct hinfc_host *host = nand_get_controller_data(chip);
371360 
372361 	if (host->command == NAND_CMD_STATUS)
....@@ -380,28 +369,17 @@
380369 	return *(uint8_t *)(host->buffer + host->offset - 1);
381370 }
382371 
383
-static u16 hisi_nfc_read_word(struct mtd_info *mtd)
384
-{
385
-	struct nand_chip *chip = mtd_to_nand(mtd);
386
-	struct hinfc_host *host = nand_get_controller_data(chip);
387
-
388
-	host->offset += 2;
389
-	return *(u16 *)(host->buffer + host->offset - 2);
390
-}
391
-
392372 static void
393
-hisi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
373
+hisi_nfc_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
394374 {
395
-	struct nand_chip *chip = mtd_to_nand(mtd);
396375 	struct hinfc_host *host = nand_get_controller_data(chip);
397376 
398377 	memcpy(host->buffer + host->offset, buf, len);
399378 	host->offset += len;
400379 }
401380 
402
-static void hisi_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
381
+static void hisi_nfc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
403382 {
404
-	struct nand_chip *chip = mtd_to_nand(mtd);
405383 	struct hinfc_host *host = nand_get_controller_data(chip);
406384 
407385 	memcpy(buf, host->buffer + host->offset, len);
....@@ -442,10 +420,10 @@
442420 	}
443421 }
444422 
445
-static void hisi_nfc_cmdfunc(struct mtd_info *mtd, unsigned command, int column,
446
-		int page_addr)
423
+static void hisi_nfc_cmdfunc(struct nand_chip *chip, unsigned command,
424
+			     int column, int page_addr)
447425 {
448
-	struct nand_chip *chip = mtd_to_nand(mtd);
426
+	struct mtd_info *mtd = nand_to_mtd(chip);
449427 	struct hinfc_host *host = nand_get_controller_data(chip);
450428 	int is_cache_invalid = 1;
451429 	unsigned int flag = 0;
....@@ -490,7 +468,7 @@
490468 
491469 	case NAND_CMD_STATUS:
492470 		flag = hinfc_read(host, HINFC504_CON);
493
-		if (chip->ecc.mode == NAND_ECC_HW)
471
+		if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
494472 			hinfc_write(host,
495473 				    flag & ~(HINFC504_CON_ECCTYPE_MASK <<
496474 				    HINFC504_CON_ECCTYPE_SHIFT), HINFC504_CON);
....@@ -537,15 +515,16 @@
537515 	return IRQ_HANDLED;
538516 }
539517 
540
-static int hisi_nand_read_page_hwecc(struct mtd_info *mtd,
541
-	struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
518
+static int hisi_nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
519
+				     int oob_required, int page)
542520 {
521
+	struct mtd_info *mtd = nand_to_mtd(chip);
543522 	struct hinfc_host *host = nand_get_controller_data(chip);
544523 	int max_bitflips = 0, stat = 0, stat_max = 0, status_ecc;
545524 	int stat_1, stat_2;
546525 
547526 	nand_read_page_op(chip, page, 0, buf, mtd->writesize);
548
-	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
527
+	chip->legacy.read_buf(chip, chip->oob_poi, mtd->oobsize);
549528 
550529 	/* errors which can not be corrected by ECC */
551530 	if (host->irq_status & HINFC504_INTS_UE) {
....@@ -569,9 +548,9 @@
569548 	return max_bitflips;
570549 }
571550 
572
-static int hisi_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
573
-				int page)
551
+static int hisi_nand_read_oob(struct nand_chip *chip, int page)
574552 {
553
+	struct mtd_info *mtd = nand_to_mtd(chip);
575554 	struct hinfc_host *host = nand_get_controller_data(chip);
576555 
577556 	nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
....@@ -585,13 +564,15 @@
585564 	return 0;
586565 }
587566 
588
-static int hisi_nand_write_page_hwecc(struct mtd_info *mtd,
589
-		struct nand_chip *chip, const uint8_t *buf, int oob_required,
590
-		int page)
567
+static int hisi_nand_write_page_hwecc(struct nand_chip *chip,
568
+				      const uint8_t *buf, int oob_required,
569
+				      int page)
591570 {
571
+	struct mtd_info *mtd = nand_to_mtd(chip);
572
+
592573 	nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
593574 	if (oob_required)
594
-		chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
575
+		chip->legacy.write_buf(chip, chip->oob_poi, mtd->oobsize);
595576 
596577 	return nand_prog_page_end_op(chip);
597578 }
....@@ -740,7 +721,7 @@
740721 	}
741722 	hinfc_write(host, flag, HINFC504_CON);
742723 
743
-	if (chip->ecc.mode == NAND_ECC_HW)
724
+	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)
744725 		hisi_nfc_ecc_probe(host);
745726 
746727 	return 0;
....@@ -770,10 +751,8 @@
770751 	mtd  = nand_to_mtd(chip);
771752 
772753 	irq = platform_get_irq(pdev, 0);
773
-	if (irq < 0) {
774
-		dev_err(dev, "no IRQ resource defined\n");
754
+	if (irq < 0)
775755 		return -ENXIO;
776
-	}
777756 
778757 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
779758 	host->iobase = devm_ioremap_resource(dev, res);
....@@ -792,15 +771,14 @@
792771 
793772 	nand_set_controller_data(chip, host);
794773 	nand_set_flash_node(chip, np);
795
-	chip->cmdfunc		= hisi_nfc_cmdfunc;
796
-	chip->select_chip	= hisi_nfc_select_chip;
797
-	chip->read_byte		= hisi_nfc_read_byte;
798
-	chip->read_word		= hisi_nfc_read_word;
799
-	chip->write_buf		= hisi_nfc_write_buf;
800
-	chip->read_buf		= hisi_nfc_read_buf;
801
-	chip->chip_delay	= HINFC504_CHIP_DELAY;
802
-	chip->set_features	= nand_get_set_features_notsupp;
803
-	chip->get_features	= nand_get_set_features_notsupp;
774
+	chip->legacy.cmdfunc	= hisi_nfc_cmdfunc;
775
+	chip->legacy.select_chip	= hisi_nfc_select_chip;
776
+	chip->legacy.read_byte	= hisi_nfc_read_byte;
777
+	chip->legacy.write_buf	= hisi_nfc_write_buf;
778
+	chip->legacy.read_buf	= hisi_nfc_read_buf;
779
+	chip->legacy.chip_delay	= HINFC504_CHIP_DELAY;
780
+	chip->legacy.set_features	= nand_get_set_features_notsupp;
781
+	chip->legacy.get_features	= nand_get_set_features_notsupp;
804782 
805783 	hisi_nfc_host_init(host);
806784 
....@@ -810,7 +788,7 @@
810788 		return ret;
811789 	}
812790 
813
-	chip->dummy_controller.ops = &hisi_nfc_controller_ops;
791
+	chip->legacy.dummy_controller.ops = &hisi_nfc_controller_ops;
814792 	ret = nand_scan(chip, max_chips);
815793 	if (ret)
816794 		return ret;
....@@ -828,8 +806,12 @@
828806 static int hisi_nfc_remove(struct platform_device *pdev)
829807 {
830808 	struct hinfc_host *host = platform_get_drvdata(pdev);
809
+	struct nand_chip *chip = &host->chip;
810
+	int ret;
831811 
832
-	nand_release(&host->chip);
812
+	ret = mtd_device_unregister(nand_to_mtd(chip));
813
+	WARN_ON(ret);
814
+	nand_cleanup(chip);
833815 
834816 	return 0;
835817 }
....@@ -860,7 +842,7 @@
860842 	struct hinfc_host *host = dev_get_drvdata(dev);
861843 	struct nand_chip *chip = &host->chip;
862844 
863
-	for (cs = 0; cs < chip->numchips; cs++)
845
+	for (cs = 0; cs < nanddev_ntargets(&chip->base); cs++)
864846 		hisi_nfc_send_cmd_reset(host, cs);
865847 	hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH,
866848 		    HINFC504_R_LATCH, HINFC504_RW_LATCH), HINFC504_PWIDTH);