| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Driver for Marvell Xenon SDHC as a platform device |
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| 3 | 4 | * |
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| .. | .. |
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| 5 | 6 | * |
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| 6 | 7 | * Author: Hu Ziji <huziji@marvell.com> |
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| 7 | 8 | * Date: 2016-8-24 |
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| 8 | | - * |
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| 9 | | - * This program is free software; you can redistribute it and/or |
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| 10 | | - * modify it under the terms of the GNU General Public License as |
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| 11 | | - * published by the Free Software Foundation version 2. |
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| 12 | 9 | * |
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| 13 | 10 | * Inspired by Jisheng Zhang <jszhang@marvell.com> |
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| 14 | 11 | * Special thanks to Video BG4 project team. |
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| .. | .. |
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| 243 | 240 | { |
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| 244 | 241 | /* Wait for 5ms after set 1.8V signal enable bit */ |
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| 245 | 242 | usleep_range(5000, 5500); |
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| 246 | | - |
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| 247 | | - /* |
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| 248 | | - * For some reason the controller's Host Control2 register reports |
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| 249 | | - * the bit representing 1.8V signaling as 0 when read after it was |
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| 250 | | - * written as 1. Subsequent read reports 1. |
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| 251 | | - * |
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| 252 | | - * Since this may cause some issues, do an empty read of the Host |
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| 253 | | - * Control2 register here to circumvent this. |
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| 254 | | - */ |
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| 255 | | - sdhci_readw(host, SDHCI_HOST_CONTROL2); |
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| 256 | 243 | } |
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| 257 | 244 | |
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| 258 | 245 | static const struct sdhci_ops sdhci_xenon_ops = { |
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| .. | .. |
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| 656 | 643 | priv->restore_needed = false; |
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| 657 | 644 | } |
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| 658 | 645 | |
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| 659 | | - ret = sdhci_runtime_resume_host(host); |
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| 646 | + ret = sdhci_runtime_resume_host(host, 0); |
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| 660 | 647 | if (ret) |
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| 661 | 648 | goto out; |
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| 662 | 649 | return 0; |
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| .. | .. |
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| 685 | 672 | static struct platform_driver sdhci_xenon_driver = { |
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| 686 | 673 | .driver = { |
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| 687 | 674 | .name = "xenon-sdhci", |
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| 675 | + .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
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| 688 | 676 | .of_match_table = sdhci_xenon_dt_ids, |
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| 689 | 677 | .pm = &sdhci_xenon_dev_pm_ops, |
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| 690 | 678 | }, |
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