forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87
kernel/drivers/media/i2c/imx415.c
....@@ -23,6 +23,12 @@
2323 * V0.0X01.0X06
2424 * 1. support DOL3 10bit 20fps 1485Mbps
2525 * 2. fixed linkfreq error
26
+ * V0.0X01.0X07
27
+ * 1. fix set_fmt & ioctl get mode unmatched issue.
28
+ * 2. need to set default vblank when change format.
29
+ * 3. enum all supported mode mbus_code, not just cur_mode.
30
+ * V0.0X01.0X08
31
+ * 1. add dcphy param for hdrx2 mode.
2632 */
2733
2834 #define DEBUG
....@@ -46,7 +52,7 @@
4652 #include <linux/rk-preisp.h>
4753 #include "../platform/rockchip/isp/rkisp_tb_helper.h"
4854
49
-#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x06)
55
+#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x08)
5056
5157 #ifndef V4L2_CID_DIGITAL_GAIN
5258 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
....@@ -169,14 +175,6 @@
169175
170176 #define IMX415_NUM_SUPPLIES ARRAY_SIZE(imx415_supply_names)
171177
172
-enum imx415_max_pad {
173
- PAD0, /* link to isp */
174
- PAD1, /* link to csi wr0 | hdr x2:L x3:M */
175
- PAD2, /* link to csi wr1 | hdr x3:L */
176
- PAD3, /* link to csi wr2 | hdr x2:M x3:S */
177
- PAD_MAX,
178
-};
179
-
180178 struct regval {
181179 u16 addr;
182180 u8 val;
....@@ -234,6 +232,17 @@
234232 u32 cur_vts;
235233 bool has_init_exp;
236234 struct preisp_hdrae_exp_s init_hdrae_exp;
235
+};
236
+
237
+static struct rkmodule_csi_dphy_param dcphy_param = {
238
+ .vendor = PHY_VENDOR_SAMSUNG,
239
+ .lp_vol_ref = 6,
240
+ .lp_hys_sw = {3, 0, 0, 0},
241
+ .lp_escclk_pol_sel = {1, 1, 1, 1},
242
+ .skew_data_cal_clk = {0, 3, 3, 3},
243
+ .clk_hs_term_sel = 2,
244
+ .data_hs_term_sel = {2, 2, 2, 2},
245
+ .reserved = {0},
237246 };
238247
239248 #define to_imx415(sd) container_of(sd, struct imx415, subdev)
....@@ -769,6 +778,7 @@
769778 .hdr_mode = NO_HDR,
770779 .mipi_freq_idx = 1,
771780 .bpp = 10,
781
+ .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
772782 },
773783 {
774784 .bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10,
....@@ -862,6 +872,7 @@
862872 .hdr_mode = NO_HDR,
863873 .mipi_freq_idx = 1,
864874 .bpp = 12,
875
+ .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
865876 },
866877 {
867878 .bus_fmt = MEDIA_BUS_FMT_SGBRG12_1X12,
....@@ -929,6 +940,7 @@
929940 .hdr_mode = NO_HDR,
930941 .mipi_freq_idx = 0,
931942 .bpp = 12,
943
+ .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
932944 },
933945 {
934946 .bus_fmt = MEDIA_BUS_FMT_SGBRG12_1X12,
....@@ -1059,12 +1071,14 @@
10591071
10601072 for (i = 0; i < imx415->cfg_num; i++) {
10611073 dist = imx415_get_reso_dist(&supported_modes[i], framefmt);
1062
- if ((cur_best_fit_dist == -1 || dist <= cur_best_fit_dist) &&
1074
+ if ((cur_best_fit_dist == -1 || dist < cur_best_fit_dist) &&
10631075 supported_modes[i].bus_fmt == framefmt->code) {
10641076 cur_best_fit_dist = dist;
10651077 cur_best_fit = i;
10661078 }
10671079 }
1080
+ dev_info(&imx415->client->dev, "%s: cur_best_fit(%d)",
1081
+ __func__, cur_best_fit);
10681082
10691083 return &supported_modes[cur_best_fit];
10701084 }
....@@ -1118,11 +1132,14 @@
11181132 __v4l2_ctrl_modify_range(imx415->vblank, vblank_min,
11191133 IMX415_VTS_MAX - mode->height,
11201134 1, vblank_def);
1135
+ __v4l2_ctrl_s_ctrl(imx415->vblank, vblank_def);
11211136 __v4l2_ctrl_s_ctrl(imx415->link_freq, mode->mipi_freq_idx);
11221137 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * IMX415_4LANES;
11231138 __v4l2_ctrl_s_ctrl_int64(imx415->pixel_rate,
11241139 pixel_rate);
11251140 }
1141
+ dev_info(&imx415->client->dev, "%s: mode->mipi_freq_idx(%d)",
1142
+ __func__, mode->mipi_freq_idx);
11261143
11271144 mutex_unlock(&imx415->mutex);
11281145
....@@ -1165,9 +1182,10 @@
11651182 {
11661183 struct imx415 *imx415 = to_imx415(sd);
11671184
1168
- if (code->index != 0)
1185
+ if (code->index >= imx415->cfg_num)
11691186 return -EINVAL;
1170
- code->code = imx415->cur_mode->bus_fmt;
1187
+
1188
+ code->code = supported_modes[code->index].bus_fmt;
11711189
11721190 return 0;
11731191 }
....@@ -1198,14 +1216,12 @@
11981216 struct imx415 *imx415 = to_imx415(sd);
11991217 const struct imx415_mode *mode = imx415->cur_mode;
12001218
1201
- mutex_lock(&imx415->mutex);
12021219 fi->interval = mode->max_fps;
1203
- mutex_unlock(&imx415->mutex);
12041220
12051221 return 0;
12061222 }
12071223
1208
-static int imx415_g_mbus_config(struct v4l2_subdev *sd,
1224
+static int imx415_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
12091225 struct v4l2_mbus_config *config)
12101226 {
12111227 struct imx415 *imx415 = to_imx415(sd);
....@@ -1219,7 +1235,7 @@
12191235 val |= V4L2_MBUS_CSI2_CHANNEL_1;
12201236 if (mode->hdr_mode == HDR_X3)
12211237 val |= V4L2_MBUS_CSI2_CHANNEL_2;
1222
- config->type = V4L2_MBUS_CSI2;
1238
+ config->type = V4L2_MBUS_CSI2_DPHY;
12231239 config->flags = val;
12241240
12251241 return 0;
....@@ -1650,14 +1666,27 @@
16501666 return ret;
16511667 }
16521668
1669
+static int imx415_get_channel_info(struct imx415 *imx415, struct rkmodule_channel_info *ch_info)
1670
+{
1671
+ if (ch_info->index < PAD0 || ch_info->index >= PAD_MAX)
1672
+ return -EINVAL;
1673
+ ch_info->vc = imx415->cur_mode->vc[ch_info->index];
1674
+ ch_info->width = imx415->cur_mode->width;
1675
+ ch_info->height = imx415->cur_mode->height;
1676
+ ch_info->bus_fmt = imx415->cur_mode->bus_fmt;
1677
+ return 0;
1678
+}
1679
+
16531680 static long imx415_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
16541681 {
16551682 struct imx415 *imx415 = to_imx415(sd);
16561683 struct rkmodule_hdr_cfg *hdr;
1684
+ struct rkmodule_channel_info *ch_info;
16571685 u32 i, h, w, stream;
16581686 long ret = 0;
16591687 const struct imx415_mode *mode;
16601688 u64 pixel_rate = 0;
1689
+ struct rkmodule_csi_dphy_param *dphy_param;
16611690
16621691 switch (cmd) {
16631692 case PREISP_CMD_SET_HDRAE_EXP:
....@@ -1706,6 +1735,7 @@
17061735 }
17071736 w = mode->hts_def - imx415->cur_mode->width;
17081737 h = mode->vts_def - mode->height;
1738
+ mutex_lock(&imx415->mutex);
17091739 __v4l2_ctrl_modify_range(imx415->hblank, w, w, 1, w);
17101740 __v4l2_ctrl_modify_range(imx415->vblank, h,
17111741 IMX415_VTS_MAX - mode->height,
....@@ -1714,6 +1744,7 @@
17141744 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * IMX415_4LANES;
17151745 __v4l2_ctrl_s_ctrl_int64(imx415->pixel_rate,
17161746 pixel_rate);
1747
+ mutex_unlock(&imx415->mutex);
17171748 }
17181749 break;
17191750 case RKMODULE_SET_QUICK_STREAM:
....@@ -1733,6 +1764,20 @@
17331764 else
17341765 *((u32 *)arg) = BRL_BINNING;
17351766 break;
1767
+ case RKMODULE_GET_CHANNEL_INFO:
1768
+ ch_info = (struct rkmodule_channel_info *)arg;
1769
+ ret = imx415_get_channel_info(imx415, ch_info);
1770
+ break;
1771
+ case RKMODULE_GET_CSI_DPHY_PARAM:
1772
+ if (imx415->cur_mode->hdr_mode == HDR_X2) {
1773
+ dphy_param = (struct rkmodule_csi_dphy_param *)arg;
1774
+ if (dphy_param->vendor == dcphy_param.vendor)
1775
+ *dphy_param = dcphy_param;
1776
+ dev_info(&imx415->client->dev,
1777
+ "get sensor dphy param\n");
1778
+ } else
1779
+ ret = -EINVAL;
1780
+ break;
17361781 default:
17371782 ret = -ENOIOCTLCMD;
17381783 break;
....@@ -1750,9 +1795,11 @@
17501795 struct rkmodule_awb_cfg *cfg;
17511796 struct rkmodule_hdr_cfg *hdr;
17521797 struct preisp_hdrae_exp_s *hdrae;
1798
+ struct rkmodule_channel_info *ch_info;
17531799 long ret;
17541800 u32 stream;
17551801 u32 brl = 0;
1802
+ struct rkmodule_csi_dphy_param *dphy_param;
17561803
17571804 switch (cmd) {
17581805 case RKMODULE_GET_MODULE_INFO:
....@@ -1841,6 +1888,37 @@
18411888 return -EFAULT;
18421889 }
18431890 break;
1891
+ case RKMODULE_GET_CHANNEL_INFO:
1892
+ ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
1893
+ if (!ch_info) {
1894
+ ret = -ENOMEM;
1895
+ return ret;
1896
+ }
1897
+
1898
+ ret = imx415_ioctl(sd, cmd, ch_info);
1899
+ if (!ret) {
1900
+ ret = copy_to_user(up, ch_info, sizeof(*ch_info));
1901
+ if (ret)
1902
+ ret = -EFAULT;
1903
+ }
1904
+ kfree(ch_info);
1905
+ break;
1906
+ case RKMODULE_GET_CSI_DPHY_PARAM:
1907
+ dphy_param = kzalloc(sizeof(*dphy_param), GFP_KERNEL);
1908
+ if (!dphy_param) {
1909
+ ret = -ENOMEM;
1910
+ return ret;
1911
+ }
1912
+
1913
+ ret = imx415_ioctl(sd, cmd, dphy_param);
1914
+ if (!ret) {
1915
+ ret = copy_to_user(up, dphy_param, sizeof(*dphy_param));
1916
+ if (ret)
1917
+ ret = -EFAULT;
1918
+ }
1919
+ kfree(dphy_param);
1920
+ break;
1921
+
18441922 default:
18451923 ret = -ENOIOCTLCMD;
18461924 break;
....@@ -1896,7 +1974,7 @@
18961974 struct i2c_client *client = imx415->client;
18971975 int ret = 0;
18981976
1899
- dev_dbg(&imx415->client->dev, "s_stream: %d. %dx%d, hdr: %d, bpp: %d\n",
1977
+ dev_info(&imx415->client->dev, "s_stream: %d. %dx%d, hdr: %d, bpp: %d\n",
19001978 on, imx415->cur_mode->width, imx415->cur_mode->height,
19011979 imx415->cur_mode->hdr_mode, imx415->cur_mode->bpp);
19021980
....@@ -2051,7 +2129,7 @@
20512129 regulator_bulk_disable(IMX415_NUM_SUPPLIES, imx415->supplies);
20522130 }
20532131
2054
-static int imx415_runtime_resume(struct device *dev)
2132
+static int __maybe_unused imx415_runtime_resume(struct device *dev)
20552133 {
20562134 struct i2c_client *client = to_i2c_client(dev);
20572135 struct v4l2_subdev *sd = i2c_get_clientdata(client);
....@@ -2060,7 +2138,7 @@
20602138 return __imx415_power_on(imx415);
20612139 }
20622140
2063
-static int imx415_runtime_suspend(struct device *dev)
2141
+static int __maybe_unused imx415_runtime_suspend(struct device *dev)
20642142 {
20652143 struct i2c_client *client = to_i2c_client(dev);
20662144 struct v4l2_subdev *sd = i2c_get_clientdata(client);
....@@ -2175,7 +2253,6 @@
21752253 static const struct v4l2_subdev_video_ops imx415_video_ops = {
21762254 .s_stream = imx415_s_stream,
21772255 .g_frame_interval = imx415_g_frame_interval,
2178
- .g_mbus_config = imx415_g_mbus_config,
21792256 };
21802257
21812258 static const struct v4l2_subdev_pad_ops imx415_pad_ops = {
....@@ -2185,6 +2262,7 @@
21852262 .get_fmt = imx415_get_fmt,
21862263 .set_fmt = imx415_set_fmt,
21872264 .get_selection = imx415_get_selection,
2265
+ .get_mbus_config = imx415_g_mbus_config,
21882266 };
21892267
21902268 static const struct v4l2_subdev_ops imx415_subdev_ops = {
....@@ -2223,7 +2301,7 @@
22232301 switch (ctrl->id) {
22242302 case V4L2_CID_EXPOSURE:
22252303 if (imx415->cur_mode->hdr_mode != NO_HDR)
2226
- return ret;
2304
+ goto ctrl_end;
22272305 shr0 = imx415->cur_vts - ctrl->val;
22282306 ret = imx415_write_reg(imx415->client, IMX415_LF_EXPO_REG_L,
22292307 IMX415_REG_VALUE_08BIT,
....@@ -2239,7 +2317,7 @@
22392317 break;
22402318 case V4L2_CID_ANALOGUE_GAIN:
22412319 if (imx415->cur_mode->hdr_mode != NO_HDR)
2242
- return ret;
2320
+ goto ctrl_end;
22432321 ret = imx415_write_reg(imx415->client, IMX415_LF_GAIN_REG_H,
22442322 IMX415_REG_VALUE_08BIT,
22452323 IMX415_FETCH_GAIN_H(ctrl->val));
....@@ -2308,6 +2386,7 @@
23082386 break;
23092387 }
23102388
2389
+ctrl_end:
23112390 pm_runtime_put(&client->dev);
23122391
23132392 return ret;
....@@ -2337,7 +2416,7 @@
23372416 V4L2_CID_LINK_FREQ,
23382417 ARRAY_SIZE(link_freq_items) - 1, 0,
23392418 link_freq_items);
2340
- __v4l2_ctrl_s_ctrl(imx415->link_freq, mode->mipi_freq_idx);
2419
+ v4l2_ctrl_s_ctrl(imx415->link_freq, mode->mipi_freq_idx);
23412420
23422421 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
23432422 pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * IMX415_4LANES;