forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87
kernel/drivers/iio/dac/ad5592r-base.c
....@@ -1,10 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * AD5592R Digital <-> Analog converters driver
34 *
45 * Copyright 2014-2016 Analog Devices Inc.
56 * Author: Paul Cercueil <paul.cercueil@analog.com>
6
- *
7
- * Licensed under the GPL-2.
87 */
98
109 #include <linux/bitops.h>
....@@ -16,7 +15,6 @@
1615 #include <linux/regulator/consumer.h>
1716 #include <linux/gpio/consumer.h>
1817 #include <linux/gpio/driver.h>
19
-#include <linux/gpio.h>
2018 #include <linux/property.h>
2119
2220 #include <dt-bindings/iio/adi,ad5592r.h>
....@@ -158,7 +156,6 @@
158156 static int ad5592r_reset(struct ad5592r_state *st)
159157 {
160158 struct gpio_desc *gpio;
161
- struct iio_dev *iio_dev = iio_priv_to_dev(st);
162159
163160 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
164161 if (IS_ERR(gpio))
....@@ -168,10 +165,10 @@
168165 udelay(1);
169166 gpiod_set_value(gpio, 1);
170167 } else {
171
- mutex_lock(&iio_dev->mlock);
168
+ mutex_lock(&st->lock);
172169 /* Writing this magic value resets the device */
173170 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
174
- mutex_unlock(&iio_dev->mlock);
171
+ mutex_unlock(&st->lock);
175172 }
176173
177174 udelay(250);
....@@ -199,7 +196,6 @@
199196 const struct ad5592r_rw_ops *ops = st->ops;
200197 int ret;
201198 unsigned i;
202
- struct iio_dev *iio_dev = iio_priv_to_dev(st);
203199 u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
204200 u16 read_back;
205201
....@@ -224,7 +220,6 @@
224220 break;
225221
226222 case CH_MODE_UNUSED:
227
- /* fall-through */
228223 default:
229224 switch (st->channel_offstate[i]) {
230225 case CH_OFFSTATE_OUT_TRISTATE:
....@@ -241,7 +236,6 @@
241236 break;
242237
243238 case CH_OFFSTATE_PULLDOWN:
244
- /* fall-through */
245239 default:
246240 pulldown |= BIT(i);
247241 break;
....@@ -249,7 +243,7 @@
249243 }
250244 }
251245
252
- mutex_lock(&iio_dev->mlock);
246
+ mutex_lock(&st->lock);
253247
254248 /* Pull down unused pins to GND */
255249 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
....@@ -287,7 +281,7 @@
287281 ret = -EIO;
288282
289283 err_unlock:
290
- mutex_unlock(&iio_dev->mlock);
284
+ mutex_unlock(&st->lock);
291285 return ret;
292286 }
293287
....@@ -316,11 +310,11 @@
316310 if (!chan->output)
317311 return -EINVAL;
318312
319
- mutex_lock(&iio_dev->mlock);
313
+ mutex_lock(&st->lock);
320314 ret = st->ops->write_dac(st, chan->channel, val);
321315 if (!ret)
322316 st->cached_dac[chan->channel] = val;
323
- mutex_unlock(&iio_dev->mlock);
317
+ mutex_unlock(&st->lock);
324318 return ret;
325319 case IIO_CHAN_INFO_SCALE:
326320 if (chan->type == IIO_VOLTAGE) {
....@@ -335,12 +329,12 @@
335329 else
336330 return -EINVAL;
337331
338
- mutex_lock(&iio_dev->mlock);
332
+ mutex_lock(&st->lock);
339333
340334 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
341335 &st->cached_gp_ctrl);
342336 if (ret < 0) {
343
- mutex_unlock(&iio_dev->mlock);
337
+ mutex_unlock(&st->lock);
344338 return ret;
345339 }
346340
....@@ -362,7 +356,7 @@
362356
363357 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
364358 st->cached_gp_ctrl);
365
- mutex_unlock(&iio_dev->mlock);
359
+ mutex_unlock(&st->lock);
366360
367361 return ret;
368362 }
....@@ -380,36 +374,36 @@
380374 {
381375 struct ad5592r_state *st = iio_priv(iio_dev);
382376 u16 read_val;
383
- int ret;
377
+ int ret, mult;
384378
385379 switch (m) {
386380 case IIO_CHAN_INFO_RAW:
387
- mutex_lock(&iio_dev->mlock);
388
-
389381 if (!chan->output) {
382
+ mutex_lock(&st->lock);
390383 ret = st->ops->read_adc(st, chan->channel, &read_val);
384
+ mutex_unlock(&st->lock);
391385 if (ret)
392
- goto unlock;
386
+ return ret;
393387
394388 if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
395389 dev_err(st->dev, "Error while reading channel %u\n",
396390 chan->channel);
397
- ret = -EIO;
398
- goto unlock;
391
+ return -EIO;
399392 }
400393
401394 read_val &= GENMASK(11, 0);
402395
403396 } else {
397
+ mutex_lock(&st->lock);
404398 read_val = st->cached_dac[chan->channel];
399
+ mutex_unlock(&st->lock);
405400 }
406401
407402 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
408403 chan->channel, read_val);
409404
410405 *val = (int) read_val;
411
- ret = IIO_VAL_INT;
412
- break;
406
+ return IIO_VAL_INT;
413407 case IIO_CHAN_INFO_SCALE:
414408 *val = ad5592r_get_vref(st);
415409
....@@ -418,42 +412,40 @@
418412 *val = div_s64_rem(tmp, 1000000000LL, val2);
419413
420414 return IIO_VAL_INT_PLUS_MICRO;
421
- } else {
422
- int mult;
423
-
424
- mutex_lock(&iio_dev->mlock);
425
-
426
- if (chan->output)
427
- mult = !!(st->cached_gp_ctrl &
428
- AD5592R_REG_CTRL_DAC_RANGE);
429
- else
430
- mult = !!(st->cached_gp_ctrl &
431
- AD5592R_REG_CTRL_ADC_RANGE);
432
-
433
- *val *= ++mult;
434
-
435
- *val2 = chan->scan_type.realbits;
436
- ret = IIO_VAL_FRACTIONAL_LOG2;
437415 }
438
- break;
416
+
417
+ mutex_lock(&st->lock);
418
+
419
+ if (chan->output)
420
+ mult = !!(st->cached_gp_ctrl &
421
+ AD5592R_REG_CTRL_DAC_RANGE);
422
+ else
423
+ mult = !!(st->cached_gp_ctrl &
424
+ AD5592R_REG_CTRL_ADC_RANGE);
425
+
426
+ mutex_unlock(&st->lock);
427
+
428
+ *val *= ++mult;
429
+
430
+ *val2 = chan->scan_type.realbits;
431
+
432
+ return IIO_VAL_FRACTIONAL_LOG2;
439433 case IIO_CHAN_INFO_OFFSET:
440434 ret = ad5592r_get_vref(st);
441435
442
- mutex_lock(&iio_dev->mlock);
436
+ mutex_lock(&st->lock);
443437
444438 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
445439 *val = (-34365 * 25) / ret;
446440 else
447441 *val = (-75365 * 25) / ret;
448
- ret = IIO_VAL_INT;
449
- break;
442
+
443
+ mutex_unlock(&st->lock);
444
+
445
+ return IIO_VAL_INT;
450446 default:
451447 return -EINVAL;
452448 }
453
-
454
-unlock:
455
- mutex_unlock(&iio_dev->mlock);
456
- return ret;
457449 }
458450
459451 static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
....@@ -488,11 +480,11 @@
488480 st->scale_avail[1][0], st->scale_avail[1][1]);
489481 }
490482
491
-static struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
483
+static const struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
492484 {
493485 .name = "scale_available",
494486 .read = ad5592r_show_scale_available,
495
- .shared = true,
487
+ .shared = IIO_SHARED_BY_TYPE,
496488 },
497489 {},
498490 };
....@@ -512,11 +504,11 @@
512504 chan->ext_info = ad5592r_ext_info;
513505 }
514506
515
-static int ad5592r_alloc_channels(struct ad5592r_state *st)
507
+static int ad5592r_alloc_channels(struct iio_dev *iio_dev)
516508 {
509
+ struct ad5592r_state *st = iio_priv(iio_dev);
517510 unsigned i, curr_channel = 0,
518511 num_channels = st->num_channels;
519
- struct iio_dev *iio_dev = iio_priv_to_dev(st);
520512 struct iio_chan_spec *channels;
521513 struct fwnode_handle *child;
522514 u32 reg, tmp;
....@@ -531,7 +523,7 @@
531523 if (!ret)
532524 st->channel_modes[reg] = tmp;
533525
534
- fwnode_property_read_u32(child, "adi,off-state", &tmp);
526
+ ret = fwnode_property_read_u32(child, "adi,off-state", &tmp);
535527 if (!ret)
536528 st->channel_offstate[reg] = tmp;
537529 }
....@@ -622,10 +614,11 @@
622614 return ret;
623615 }
624616
625
- iio_dev->dev.parent = dev;
626617 iio_dev->name = name;
627618 iio_dev->info = &ad5592r_info;
628619 iio_dev->modes = INDIO_DIRECT_MODE;
620
+
621
+ mutex_init(&st->lock);
629622
630623 ad5592r_init_scales(st, ad5592r_get_vref(st));
631624
....@@ -638,7 +631,7 @@
638631 if (ret)
639632 goto error_disable_reg;
640633
641
- ret = ad5592r_alloc_channels(st);
634
+ ret = ad5592r_alloc_channels(iio_dev);
642635 if (ret)
643636 goto error_disable_reg;
644637