~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,59 +1,56 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3	4	* Author:Mark Yao <mark.yao@rock-chips.com>
4		- *
5		- * This software is licensed under the terms of the GNU General Public
6		- * License version 2, as published by the Free Software Foundation, and
7		- * may be copied, distributed, and modified under those terms.
8		- *
9		- * This program is distributed in the hope that it will be useful,
10		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12		- * GNU General Public License for more details.
13	5	*/
14	6
	7	+#include <linux/clk.h>
	8	+#include <linux/component.h>
	9	+#include <linux/debugfs.h>
	10	+#include <linux/delay.h>
	11	+#include <linux/fixp-arith.h>
	12	+#include <linux/iopoll.h>
	13	+#include <linux/kernel.h>
	14	+#include <linux/mfd/syscon.h>
	15	+#include <linux/module.h>
	16	+#include <linux/of.h>
	17	+#include <linux/of_device.h>
	18	+#include <linux/overflow.h>
	19	+#include <linux/platform_device.h>
	20	+#include <linux/pm_runtime.h>
	21	+#include <linux/regmap.h>
	22	+#include <linux/reset.h>
	23	+#include <linux/sort.h>
	24	+
15	25	#include <drm/drm.h>
16		-#include <drm/drmP.h>
17	26	#include <drm/drm_atomic.h>
	27	+#include <drm/drm_atomic_uapi.h>
18	28	#include <drm/drm_crtc.h>
19	29	#include <drm/drm_crtc_helper.h>
	30	+#include <drm/drm_debugfs.h>
20	31	#include <drm/drm_flip_work.h>
	32	+#include <drm/drm_fourcc.h>
	33	+#include <drm/drm_gem_framebuffer_helper.h>
21	34	#include <drm/drm_plane_helper.h>
	35	+#include <drm/drm_probe_helper.h>
	36	+#include <drm/drm_self_refresh_helper.h>
	37	+#include <drm/drm_vblank.h>
	38	+
22	39	#ifdef CONFIG_DRM_ANALOGIX_DP
23	40	#include <drm/bridge/analogix_dp.h>
24	41	#endif
25	42	#include <dt-bindings/soc/rockchip-system-status.h>
26	43
27		-#include <linux/debugfs.h>
28		-#include <linux/fixp-arith.h>
29		-#include <linux/iopoll.h>
30		-#include <linux/kernel.h>
31		-#include <linux/module.h>
32		-#include <linux/platform_device.h>
33		-#include <linux/clk.h>
34		-#include <linux/iopoll.h>
35		-#include <linux/of.h>
36		-#include <linux/of_device.h>
37		-#include <linux/pm_runtime.h>
38		-#include <linux/component.h>
39		-#include <linux/overflow.h>
40		-#include <linux/regmap.h>
41		-#include <linux/mfd/syscon.h>
42		-
43		-#include <linux/reset.h>
44		-#include <linux/delay.h>
45		-#include <linux/sort.h>
46	44	#include <soc/rockchip/rockchip_dmc.h>
47	45	#include <soc/rockchip/rockchip-system-status.h>
48	46	#include <uapi/linux/videodev2.h>
49		-
50		-#include "../drm_internal.h"
	47	+#include "../drm_crtc_internal.h"
51	48
52	49	#include "rockchip_drm_drv.h"
53	50	#include "rockchip_drm_gem.h"
54	51	#include "rockchip_drm_fb.h"
55		-#include "rockchip_drm_psr.h"
56	52	#include "rockchip_drm_vop.h"
	53	+#include "rockchip_rgb.h"
57	54
58	55	#define VOP_REG_SUPPORT(vop, reg) \
59	56	(reg.mask && \
..	..	@@ -151,7 +148,6 @@
151	148	} \
152	149	} while (0)
153	150
154		-#define to_vop(x) container_of(x, struct vop, crtc)
155	151	#define to_vop_win(x) container_of(x, struct vop_win, base)
156	152	#define to_vop_plane_state(x) container_of(x, struct vop_plane_state, base)
157	153
..	..	@@ -172,7 +168,6 @@
172	168	struct drm_rect dest;
173	169	dma_addr_t yrgb_mst;
174	170	dma_addr_t uv_mst;
175		- void *yrgb_kvaddr;
176	171	const uint32_t *y2r_table;
177	172	const uint32_t *r2r_table;
178	173	const uint32_t *r2y_table;
..	..	@@ -181,7 +176,7 @@
181	176	bool r2r_en;
182	177	bool r2y_en;
183	178	int color_space;
184		- int color_key;
	179	+ u32 color_key;
185	180	unsigned int csc_mode;
186	181	int global_alpha;
187	182	int blend_mode;
..	..	@@ -191,21 +186,15 @@
191	186	struct vop_dump_list *planlist;
192	187	};
193	188
194		-struct rockchip_mcu_timing {
195		- int mcu_pix_total;
196		- int mcu_cs_pst;
197		- int mcu_cs_pend;
198		- int mcu_rw_pst;
199		- int mcu_rw_pend;
200		- int mcu_hold_mode;
201		-};
202		-
203	189	struct vop_win {
204	190	struct vop_win *parent;
205	191	struct drm_plane base;
206	192
207	193	int win_id;
208	194	int area_id;
	195	+ u8 plane_id; /* unique plane id */
	196	+ const char *name;
	197	+
209	198	int zpos;
210	199	uint32_t offset;
211	200	enum drm_plane_type type;
..	..	@@ -213,28 +202,45 @@
213	202	const struct vop_csc *csc;
214	203	const uint32_t *data_formats;
215	204	uint32_t nformats;
	205	+ const uint64_t *format_modifiers;
216	206	u64 feature;
217	207	struct vop *vop;
218	208	struct vop_plane_state state;
219	209
	210	+ struct drm_property *input_width_prop;
	211	+ struct drm_property *input_height_prop;
	212	+ struct drm_property *output_width_prop;
	213	+ struct drm_property *output_height_prop;
220	214	struct drm_property *color_key_prop;
	215	+ struct drm_property *scale_prop;
	216	+ struct drm_property *name_prop;
221	217	};
222	218
223	219	struct vop {
224		- struct drm_crtc crtc;
	220	+ struct rockchip_crtc rockchip_crtc;
225	221	struct device *dev;
226	222	struct drm_device *drm_dev;
227	223	struct dentry *debugfs;
228	224	struct drm_info_list *debugfs_files;
229		- struct drm_property *plane_zpos_prop;
230	225	struct drm_property *plane_feature_prop;
	226	+ struct drm_property *plane_mask_prop;
231	227	struct drm_property *feature_prop;
	228	+
232	229	bool is_iommu_enabled;
233	230	bool is_iommu_needed;
234	231	bool is_enabled;
235	232	bool support_multi_area;
236	233
	234	+ bool aclk_rate_reset;
	235	+ unsigned long aclk_rate;
	236	+
237	237	u32 version;
	238	+ u32 background;
	239	+ u32 line_flag;
	240	+ u8 id;
	241	+ u8 plane_mask;
	242	+ u64 soc_id;
	243	+ struct drm_prop_enum_list *plane_name_list;
238	244
239	245	struct drm_tv_connector_state active_tv_state;
240	246	bool pre_overlay;
..	..	@@ -308,13 +314,12 @@
308	314	{ MEDIA_BUS_FMT_RGB666_1X18, "RGB666_1X18" },
309	315	{ MEDIA_BUS_FMT_RGB666_1X24_CPADHI, "RGB666_1X24_CPADHI" },
310	316	{ MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, "RGB666_1X7X3_SPWG" },
311		- { MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA, "RGB666_1X7X3_JEIDA" },
312	317	{ MEDIA_BUS_FMT_YUV8_1X24, "YUV8_1X24" },
313	318	{ MEDIA_BUS_FMT_UYYVYY8_0_5X24, "UYYVYY8_0_5X24" },
314	319	{ MEDIA_BUS_FMT_YUV10_1X30, "YUV10_1X30" },
315	320	{ MEDIA_BUS_FMT_UYYVYY10_0_5X30, "UYYVYY10_0_5X30" },
316		- { MEDIA_BUS_FMT_SRGB888_3X8, "SRGB888_3X8" },
317		- { MEDIA_BUS_FMT_SRGB888_DUMMY_4X8, "SRGB888_DUMMY_4X8" },
	321	+ { MEDIA_BUS_FMT_RGB888_3X8, "RGB888_3X8" },
	322	+ { MEDIA_BUS_FMT_RGB888_DUMMY_4X8, "RGB888_DUMMY_4X8" },
318	323	{ MEDIA_BUS_FMT_RGB888_1X24, "RGB888_1X24" },
319	324	{ MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, "RGB888_1X7X4_SPWG" },
320	325	{ MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, "RGB888_1X7X4_JEIDA" },
..	..	@@ -324,6 +329,15 @@
324	329	};
325	330
326	331	static DRM_ENUM_NAME_FN(drm_get_bus_format_name, drm_bus_format_enum_list)
	332	+
	333	+static inline struct vop to_vop(struct drm_crtc crtc)
	334	+{
	335	+ struct rockchip_crtc *rockchip_crtc;
	336	+
	337	+ rockchip_crtc = container_of(crtc, struct rockchip_crtc, crtc);
	338	+
	339	+ return container_of(rockchip_crtc, struct vop, rockchip_crtc);
	340	+}
327	341
328	342	static void vop_lock(struct vop *vop)
329	343	{
..	..	@@ -583,20 +597,46 @@
583	597	case DRM_FORMAT_BGR565:
584	598	return VOP_FMT_RGB565;
585	599	case DRM_FORMAT_NV12:
586		- case DRM_FORMAT_NV12_10:
	600	+ case DRM_FORMAT_NV15:
587	601	return VOP_FMT_YUV420SP;
588	602	case DRM_FORMAT_NV16:
589		- case DRM_FORMAT_NV16_10:
	603	+ case DRM_FORMAT_NV20:
590	604	return VOP_FMT_YUV422SP;
591	605	case DRM_FORMAT_NV24:
592		- case DRM_FORMAT_NV24_10:
	606	+ case DRM_FORMAT_NV30:
593	607	return VOP_FMT_YUV444SP;
	608	+ case DRM_FORMAT_YVYU:
	609	+ case DRM_FORMAT_VYUY:
594	610	case DRM_FORMAT_YUYV:
	611	+ case DRM_FORMAT_UYVY:
595	612	return VOP_FMT_YUYV;
596	613	default:
597	614	DRM_ERROR("unsupported format[%08x]\n", format);
598	615	return -EINVAL;
599	616	}
	617	+}
	618	+
	619	+static int vop_convert_afbc_format(uint32_t format)
	620	+{
	621	+ switch (format) {
	622	+ case DRM_FORMAT_XRGB8888:
	623	+ case DRM_FORMAT_ARGB8888:
	624	+ case DRM_FORMAT_XBGR8888:
	625	+ case DRM_FORMAT_ABGR8888:
	626	+ return AFBDC_FMT_U8U8U8U8;
	627	+ case DRM_FORMAT_RGB888:
	628	+ case DRM_FORMAT_BGR888:
	629	+ return AFBDC_FMT_U8U8U8;
	630	+ case DRM_FORMAT_RGB565:
	631	+ case DRM_FORMAT_BGR565:
	632	+ return AFBDC_FMT_RGB565;
	633	+ /* either of the below should not be reachable */
	634	+ default:
	635	+ DRM_WARN_ONCE("unsupported AFBC format[%08x]\n", format);
	636	+ return -EINVAL;
	637	+ }
	638	+
	639	+ return -EINVAL;
600	640	}
601	641
602	642	static bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
..	..	@@ -618,6 +658,19 @@
618	658	bus_format == MEDIA_BUS_FMT_YUV10_1X30) &&
619	659	(output_mode == ROCKCHIP_OUT_MODE_AAAA \|\|
620	660	output_mode == ROCKCHIP_OUT_MODE_P888)))
	661	+ return true;
	662	+ else
	663	+ return false;
	664	+}
	665	+
	666	+static bool is_rb_swap(uint32_t bus_format, uint32_t output_mode)
	667	+{
	668	+ /*
	669	+ * The default component order of serial rgb3x8 formats
	670	+ * is BGR. So it is needed to enable RB swap.
	671	+ */
	672	+ if (bus_format == MEDIA_BUS_FMT_RGB888_3X8 \|\|
	673	+ bus_format == MEDIA_BUS_FMT_RGB888_DUMMY_4X8)
621	674	return true;
622	675	else
623	676	return false;
..	..	@@ -661,12 +714,15 @@
661	714	{
662	715	switch (format) {
663	716	case DRM_FORMAT_NV12:
664		- case DRM_FORMAT_NV12_10:
	717	+ case DRM_FORMAT_NV15:
665	718	case DRM_FORMAT_NV16:
666		- case DRM_FORMAT_NV16_10:
	719	+ case DRM_FORMAT_NV20:
667	720	case DRM_FORMAT_NV24:
668		- case DRM_FORMAT_NV24_10:
	721	+ case DRM_FORMAT_NV30:
	722	+ case DRM_FORMAT_YVYU:
	723	+ case DRM_FORMAT_VYUY:
669	724	case DRM_FORMAT_YUYV:
	725	+ case DRM_FORMAT_UYVY:
670	726	return true;
671	727	default:
672	728	return false;
..	..	@@ -676,7 +732,10 @@
676	732	static bool is_yuyv_format(uint32_t format)
677	733	{
678	734	switch (format) {
	735	+ case DRM_FORMAT_YVYU:
	736	+ case DRM_FORMAT_VYUY:
679	737	case DRM_FORMAT_YUYV:
	738	+ case DRM_FORMAT_UYVY:
680	739	return true;
681	740	default:
682	741	return false;
..	..	@@ -686,9 +745,9 @@
686	745	static bool is_yuv_10bit(uint32_t format)
687	746	{
688	747	switch (format) {
689		- case DRM_FORMAT_NV12_10:
690		- case DRM_FORMAT_NV16_10:
691		- case DRM_FORMAT_NV24_10:
	748	+ case DRM_FORMAT_NV15:
	749	+ case DRM_FORMAT_NV20:
	750	+ case DRM_FORMAT_NV30:
692	751	return true;
693	752	default:
694	753	return false;
..	..	@@ -704,6 +763,20 @@
704	763	default:
705	764	return false;
706	765	}
	766	+}
	767	+
	768	+static inline bool rockchip_afbc(struct drm_plane *plane, u64 modifier)
	769	+{
	770	+ int i;
	771	+
	772	+ if (modifier == DRM_FORMAT_MOD_LINEAR)
	773	+ return false;
	774	+
	775	+ for (i = 0 ; i < plane->modifier_count; i++)
	776	+ if (plane->modifiers[i] == modifier)
	777	+ break;
	778	+
	779	+ return (i < plane->modifier_count) ? true : false;
707	780	}
708	781
709	782	static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
..	..	@@ -747,9 +820,9 @@
747	820	uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode;
748	821	uint16_t cbcr_hor_scl_mode = SCALE_NONE;
749	822	uint16_t cbcr_ver_scl_mode = SCALE_NONE;
750		- int hsub = drm_format_horz_chroma_subsampling(pixel_format);
751		- int vsub = drm_format_vert_chroma_subsampling(pixel_format);
752		- const struct drm_format_info *info;
	823	+ const struct drm_format_info *info = drm_format_info(pixel_format);
	824	+ uint8_t hsub = info->hsub;
	825	+ uint8_t vsub = info->vsub;
753	826	bool is_yuv = false;
754	827	uint16_t cbcr_src_w = src_w / hsub;
755	828	uint16_t cbcr_src_h = src_h / vsub;
..	..	@@ -757,17 +830,27 @@
757	830	uint16_t lb_mode;
758	831	uint32_t val;
759	832	const struct vop_data *vop_data = vop->data;
	833	+ struct drm_display_mode *adjusted_mode = &vop->rockchip_crtc.crtc.state->adjusted_mode;
760	834	int vskiplines;
761	835
762	836	if (!win->phy->scl)
763	837	return;
	838	+
	839	+ if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) && vop->version == VOP_VERSION(2, 2)) {
	840	+ VOP_SCL_SET(vop, win, scale_yrgb_x, ((src_w << 12) / dst_w));
	841	+ VOP_SCL_SET(vop, win, scale_yrgb_y, ((src_h << 12) / dst_h));
	842	+ if (is_yuv) {
	843	+ VOP_SCL_SET(vop, win, scale_cbcr_x, ((cbcr_src_w << 12) / dst_w));
	844	+ VOP_SCL_SET(vop, win, scale_cbcr_y, ((cbcr_src_h << 12) / dst_h));
	845	+ }
	846	+ return;
	847	+ }
764	848
765	849	if (!(vop_data->feature & VOP_FEATURE_ALPHA_SCALE)) {
766	850	if (is_alpha_support(pixel_format) &&
767	851	(src_w != dst_w \|\| src_h != dst_h))
768	852	DRM_ERROR("ERROR: unsupported ppixel alpha&scale\n");
769	853	}
770		- info = drm_format_info(pixel_format);
771	854
772	855	if (info->is_yuv)
773	856	is_yuv = true;
..	..	@@ -1193,7 +1276,7 @@
1193	1276	* UI(rgbx) -> yuv -> rgb ->hdr2sdr -> overlay -> output.
1194	1277	*/
1195	1278	if (s->hdr.hdr2sdr_en &&
1196		- vop_plane_state->eotf == SMPTE_ST2084 &&
	1279	+ vop_plane_state->eotf == HDMI_EOTF_SMPTE_ST2084 &&
1197	1280	!is_yuv_support(pstate->fb->format->format))
1198	1281	vop_plane_state->r2y_en = true;
1199	1282	if (win->feature & WIN_FEATURE_PRE_OVERLAY)
..	..	@@ -1533,6 +1616,18 @@
1533	1616	vop_enable_debug_irq(crtc);
1534	1617	}
1535	1618
	1619	+static void vop_crtc_atomic_disable_for_psr(struct drm_crtc *crtc,
	1620	+ struct drm_crtc_state *old_state)
	1621	+{
	1622	+ struct vop *vop = to_vop(crtc);
	1623	+
	1624	+ vop_disable_all_planes(vop);
	1625	+ drm_crtc_vblank_off(crtc);
	1626	+ vop->aclk_rate = clk_get_rate(vop->aclk);
	1627	+ clk_set_rate(vop->aclk, vop->aclk_rate / 3);
	1628	+ vop->aclk_rate_reset = true;
	1629	+}
	1630	+
1536	1631	static void vop_crtc_atomic_disable(struct drm_crtc *crtc,
1537	1632	struct drm_crtc_state *old_state)
1538	1633	{
..	..	@@ -1541,6 +1636,11 @@
1541	1636	SYS_STATUS_LCDC1 : SYS_STATUS_LCDC0;
1542	1637
1543	1638	WARN_ON(vop->event);
	1639	+
	1640	+ if (crtc->state->self_refresh_active) {
	1641	+ vop_crtc_atomic_disable_for_psr(crtc, old_state);
	1642	+ goto out;
	1643	+ }
1544	1644
1545	1645	vop_lock(vop);
1546	1646	VOP_CTRL_SET(vop, reg_done_frm, 1);
..	..	@@ -1589,6 +1689,7 @@
1589	1689
1590	1690	rockchip_clear_system_status(sys_status);
1591	1691
	1692	+out:
1592	1693	if (crtc->state->event && !crtc->state->active) {
1593	1694	spin_lock_irq(&crtc->dev->event_lock);
1594	1695	drm_crtc_send_vblank_event(crtc, crtc->state->event);
..	..	@@ -1614,6 +1715,21 @@
1614	1715	drm_framebuffer_put(old_state->fb);
1615	1716	}
1616	1717
	1718	+static bool rockchip_vop_mod_supported(struct drm_plane *plane,
	1719	+ u32 format, u64 modifier)
	1720	+{
	1721	+ if (modifier == DRM_FORMAT_MOD_LINEAR)
	1722	+ return true;
	1723	+
	1724	+ if (!rockchip_afbc(plane, modifier)) {
	1725	+ DRM_DEBUG_KMS("Unsupported format modifier 0x%llx\n", modifier);
	1726	+
	1727	+ return false;
	1728	+ }
	1729	+
	1730	+ return vop_convert_afbc_format(format) >= 0;
	1731	+}
	1732	+
1617	1733	static int vop_plane_atomic_check(struct drm_plane *plane,
1618	1734	struct drm_plane_state *state)
1619	1735	{
..	..	@@ -1627,13 +1743,14 @@
1627	1743	int ret;
1628	1744	struct drm_rect *dest = &vop_plane_state->dest;
1629	1745	struct drm_rect *src = &vop_plane_state->src;
	1746	+ struct drm_gem_object obj, uv_obj;
	1747	+ struct rockchip_gem_object rk_obj, rk_uv_obj;
1630	1748	int min_scale = win->phy->scl ? FRAC_16_16(1, 8) :
1631	1749	DRM_PLANE_HELPER_NO_SCALING;
1632	1750	int max_scale = win->phy->scl ? FRAC_16_16(8, 1) :
1633	1751	DRM_PLANE_HELPER_NO_SCALING;
1634	1752	unsigned long offset;
1635	1753	dma_addr_t dma_addr;
1636		- void *kvaddr;
1637	1754
1638	1755	crtc = crtc ? crtc : plane->state->crtc;
1639	1756	if (!crtc \|\| !fb) {
..	..	@@ -1645,14 +1762,8 @@
1645	1762	if (WARN_ON(!crtc_state))
1646	1763	return -EINVAL;
1647	1764
1648		- src->x1 = state->src_x;
1649		- src->y1 = state->src_y;
1650		- src->x2 = state->src_x + state->src_w;
1651		- src->y2 = state->src_y + state->src_h;
1652		- dest->x1 = state->crtc_x;
1653		- dest->y1 = state->crtc_y;
1654		- dest->x2 = state->crtc_x + state->crtc_w;
1655		- dest->y2 = state->crtc_y + state->crtc_h;
	1765	+ vop_plane_state->zpos = state->zpos;
	1766	+ vop_plane_state->blend_mode = state->pixel_blend_mode;
1656	1767
1657	1768	ret = drm_atomic_helper_check_plane_state(state, crtc_state,
1658	1769	min_scale, max_scale,
..	..	@@ -1660,8 +1771,22 @@
1660	1771	if (ret)
1661	1772	return ret;
1662	1773
1663		- if (!state->visible)
	1774	+ if (!state->visible) {
	1775	+ DRM_ERROR("%s is invisible(src: pos[%d, %d] rect[%d x %d] dst: pos[%d, %d] rect[%d x %d]\n",
	1776	+ plane->name, state->src_x >> 16, state->src_y >> 16, state->src_w >> 16,
	1777	+ state->src_h >> 16, state->crtc_x, state->crtc_y, state->crtc_w,
	1778	+ state->crtc_h);
1664	1779	return 0;
	1780	+ }
	1781	+
	1782	+ src->x1 = state->src.x1;
	1783	+ src->y1 = state->src.y1;
	1784	+ src->x2 = state->src.x2;
	1785	+ src->y2 = state->src.y2;
	1786	+ dest->x1 = state->dst.x1;
	1787	+ dest->y1 = state->dst.y1;
	1788	+ dest->x2 = state->dst.x2;
	1789	+ dest->y2 = state->dst.y2;
1665	1790
1666	1791	vop_plane_state->format = vop_convert_format(fb->format->format);
1667	1792	if (vop_plane_state->format < 0)
..	..	@@ -1670,12 +1795,19 @@
1670	1795	vop = to_vop(crtc);
1671	1796	vop_data = vop->data;
1672	1797
1673		- if (state->src_w >> 16 < 4 \|\| state->src_h >> 16 < 4 \|\|
1674		- state->crtc_w < 4 \|\| state->crtc_h < 4) {
1675		- DRM_ERROR("Invalid size: %dx%d->%dx%d, min size is 4x4\n",
1676		- state->src_w >> 16, state->src_h >> 16,
1677		- state->crtc_w, state->crtc_h);
	1798	+ if (VOP_MAJOR(vop->version) == 2 && is_alpha_support(fb->format->format) &&
	1799	+ vop_plane_state->global_alpha != 0xff) {
	1800	+ DRM_ERROR("Pixel alpha and global alpha can't be enabled at the same time\n");
1678	1801	return -EINVAL;
	1802	+ }
	1803	+
	1804	+ if (drm_rect_width(src) >> 16 < 4 \|\| drm_rect_height(src) >> 16 < 4 \|\|
	1805	+ drm_rect_width(dest) < 4 \|\| drm_rect_width(dest) < 4) {
	1806	+ DRM_ERROR("Invalid size: %dx%d->%dx%d, min size is 4x4\n",
	1807	+ drm_rect_width(src) >> 16, drm_rect_height(src) >> 16,
	1808	+ drm_rect_width(dest), drm_rect_height(dest));
	1809	+ state->visible = false;
	1810	+ return 0;
1679	1811	}
1680	1812
1681	1813	if (drm_rect_width(src) >> 16 > vop_data->max_input.width \|\|
..	..	@@ -1702,26 +1834,27 @@
1702	1834	return -EINVAL;
1703	1835	}
1704	1836
1705		- offset = (src->x1 >> 16) * fb->format->bpp[0] / 8;
	1837	+ offset = (src->x1 >> 16) * fb->format->cpp[0];
1706	1838	vop_plane_state->offset = offset + fb->offsets[0];
1707	1839	if (state->rotation & DRM_MODE_REFLECT_Y)
1708	1840	offset += ((src->y2 >> 16) - 1) * fb->pitches[0];
1709	1841	else
1710	1842	offset += (src->y1 >> 16) * fb->pitches[0];
1711	1843
1712		- dma_addr = rockchip_fb_get_dma_addr(fb, 0);
1713		- kvaddr = rockchip_fb_get_kvaddr(fb, 0);
1714		- vop_plane_state->yrgb_mst = dma_addr + offset + fb->offsets[0];
1715		- vop_plane_state->yrgb_kvaddr = kvaddr + offset + fb->offsets[0];
	1844	+ obj = fb->obj[0];
	1845	+ rk_obj = to_rockchip_obj(obj);
	1846	+ vop_plane_state->yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0];
1716	1847	if (fb->format->is_yuv) {
1717		- int hsub = drm_format_horz_chroma_subsampling(fb->format->format);
1718		- int vsub = drm_format_vert_chroma_subsampling(fb->format->format);
	1848	+ int hsub = fb->format->hsub;
	1849	+ int vsub = fb->format->vsub;
1719	1850
1720		- offset = (src->x1 >> 16) * fb->format->bpp[1] / hsub / 8;
	1851	+ offset = (src->x1 >> 16) * fb->format->cpp[1] / hsub;
1721	1852	offset += (src->y1 >> 16) * fb->pitches[1] / vsub;
1722	1853
1723		- dma_addr = rockchip_fb_get_dma_addr(fb, 1);
1724		- dma_addr += offset + fb->offsets[1];
	1854	+ uv_obj = fb->obj[1];
	1855	+ rk_uv_obj = to_rockchip_obj(uv_obj);
	1856	+
	1857	+ dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1];
1725	1858	vop_plane_state->uv_mst = dma_addr;
1726	1859	}
1727	1860
..	..	@@ -1853,14 +1986,12 @@
1853	1986	struct vop_dump_list *planlist;
1854	1987	unsigned long num_pages;
1855	1988	struct page **pages;
1856		- struct rockchip_drm_fb *rk_fb;
1857	1989	struct drm_gem_object *obj;
1858	1990	struct rockchip_gem_object *rk_obj;
1859	1991
1860	1992	num_pages = 0;
1861	1993	pages = NULL;
1862		- rk_fb = to_rockchip_fb(fb);
1863		- obj = rk_fb->obj[0];
	1994	+ obj = fb->obj[0];
1864	1995	rk_obj = to_rockchip_obj(obj);
1865	1996	if (rk_obj) {
1866	1997	num_pages = rk_obj->num_pages;
..	..	@@ -1908,6 +2039,8 @@
1908	2039	dsp_h = 4;
1909	2040	actual_h = dsp_h * actual_h / drm_rect_height(dest);
1910	2041	}
	2042	+ if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) && vop->version == VOP_VERSION(2, 2))
	2043	+ dsp_h = dsp_h / 2;
1911	2044
1912	2045	act_info = (actual_h - 1) << 16 \| ((actual_w - 1) & 0xffff);
1913	2046
..	..	@@ -1916,12 +2049,18 @@
1916	2049
1917	2050	dsp_stx = dest->x1 + mode->crtc_htotal - mode->crtc_hsync_start;
1918	2051	dsp_sty = dest->y1 + mode->crtc_vtotal - mode->crtc_vsync_start;
	2052	+ if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) && vop->version == VOP_VERSION(2, 2))
	2053	+ dsp_sty = dest->y1 / 2 + mode->crtc_vtotal - mode->crtc_vsync_start;
1919	2054	dsp_st = dsp_sty << 16 \| (dsp_stx & 0xffff);
1920	2055
1921	2056	s = to_rockchip_crtc_state(crtc->state);
1922	2057	spin_lock(&vop->reg_lock);
1923	2058
1924	2059	VOP_WIN_SET(vop, win, format, vop_plane_state->format);
	2060	+
	2061	+ VOP_WIN_SET(vop, win, interlace_read,
	2062	+ (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0);
	2063	+
1925	2064	VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
1926	2065	VOP_WIN_SET(vop, win, yrgb_mst, vop_plane_state->yrgb_mst);
1927	2066
..	..	@@ -1939,7 +2078,7 @@
1939	2078
1940	2079	if (win->phy->scl)
1941	2080	scl_vop_cal_scl_fac(vop, win, actual_w, actual_h,
1942		- drm_rect_width(dest), drm_rect_height(dest),
	2081	+ drm_rect_width(dest), dsp_h,
1943	2082	fb->format->format);
1944	2083
1945	2084	if (VOP_WIN_SUPPORT(vop, win, color_key))
..	..	@@ -1970,7 +2109,6 @@
1970	2109	src_blend_m0 = ALPHA_PER_PIX;
1971	2110	else
1972	2111	src_blend_m0 = ALPHA_GLOBAL;
1973		-
1974	2112
1975	2113	if (vop_plane_state->blend_mode == 0 \|\| src_blend_m0 == ALPHA_GLOBAL)
1976	2114	pre_multi_alpha = ALPHA_SRC_NO_PRE_MUL;
..	..	@@ -2027,17 +2165,17 @@
2027	2165	planlist->dump_info.offset = vop_plane_state->offset;
2028	2166	planlist->dump_info.pitches = fb->pitches[0];
2029	2167	planlist->dump_info.height = actual_h;
2030		- planlist->dump_info.pixel_format = fb->format->format;
2031		- list_add_tail(&planlist->entry, &crtc->vop_dump_list_head);
	2168	+ planlist->dump_info.format = fb->format;
	2169	+ list_add_tail(&planlist->entry, &vop->rockchip_crtc.vop_dump_list_head);
2032	2170	vop_plane_state->planlist = planlist;
2033	2171	} else {
2034	2172	DRM_ERROR("can't alloc a node of planlist %p\n", planlist);
2035	2173	return;
2036	2174	}
2037		- if (crtc->vop_dump_status == DUMP_KEEP \|\|
2038		- crtc->vop_dump_times > 0) {
2039		- vop_plane_dump(&planlist->dump_info, crtc->frame_count);
2040		- crtc->vop_dump_times--;
	2175	+ if (vop->rockchip_crtc.vop_dump_status == DUMP_KEEP \|\|
	2176	+ vop->rockchip_crtc.vop_dump_times > 0) {
	2177	+ rockchip_drm_dump_plane_buffer(&planlist->dump_info, vop->rockchip_crtc.frame_count);
	2178	+ vop->rockchip_crtc.vop_dump_times--;
2041	2179	}
2042	2180	#endif
2043	2181	}
..	..	@@ -2186,10 +2324,9 @@
2186	2324	if (!vop_plane_state)
2187	2325	return;
2188	2326
	2327	+ __drm_atomic_helper_plane_reset(plane, &vop_plane_state->base);
2189	2328	win->state.zpos = win->zpos;
2190	2329	vop_plane_state->global_alpha = 0xff;
2191		- plane->state = &vop_plane_state->base;
2192		- plane->state->plane = plane;
2193	2330	}
2194	2331
2195	2332	static struct drm_plane_state *
..	..	@@ -2232,11 +2369,6 @@
2232	2369	struct vop_win *win = to_vop_win(plane);
2233	2370	struct vop_plane_state *plane_state = to_vop_plane_state(state);
2234	2371
2235		- if (property == win->vop->plane_zpos_prop) {
2236		- plane_state->zpos = val;
2237		- return 0;
2238		- }
2239		-
2240	2372	if (property == private->eotf_prop) {
2241	2373	plane_state->eotf = val;
2242	2374	return 0;
..	..	@@ -2244,16 +2376,6 @@
2244	2376
2245	2377	if (property == private->color_space_prop) {
2246	2378	plane_state->color_space = val;
2247		- return 0;
2248		- }
2249		-
2250		- if (property == private->global_alpha_prop) {
2251		- plane_state->global_alpha = val;
2252		- return 0;
2253		- }
2254		-
2255		- if (property == private->blend_mode_prop) {
2256		- plane_state->blend_mode = val;
2257	2379	return 0;
2258	2380	}
2259	2381
..	..	@@ -2282,11 +2404,6 @@
2282	2404	struct vop_win *win = to_vop_win(plane);
2283	2405	struct rockchip_drm_private *private = plane->dev->dev_private;
2284	2406
2285		- if (property == win->vop->plane_zpos_prop) {
2286		- *val = plane_state->zpos;
2287		- return 0;
2288		- }
2289		-
2290	2407	if (property == private->eotf_prop) {
2291	2408	*val = plane_state->eotf;
2292	2409	return 0;
..	..	@@ -2294,16 +2411,6 @@
2294	2411
2295	2412	if (property == private->color_space_prop) {
2296	2413	*val = plane_state->color_space;
2297		- return 0;
2298		- }
2299		-
2300		- if (property == private->global_alpha_prop) {
2301		- *val = plane_state->global_alpha;
2302		- return 0;
2303		- }
2304		-
2305		- if (property == private->blend_mode_prop) {
2306		- *val = plane_state->blend_mode;
2307	2414	return 0;
2308	2415	}
2309	2416
..	..	@@ -2344,6 +2451,7 @@
2344	2451	.atomic_destroy_state = vop_atomic_plane_destroy_state,
2345	2452	.atomic_set_property = vop_atomic_plane_set_property,
2346	2453	.atomic_get_property = vop_atomic_plane_get_property,
	2454	+ .format_mod_supported = rockchip_vop_mod_supported,
2347	2455	};
2348	2456
2349	2457	static int vop_crtc_enable_vblank(struct drm_crtc *crtc)
..	..	@@ -2400,7 +2508,7 @@
2400	2508	if (e && e->base.file_priv == file_priv) {
2401	2509	vop->event = NULL;
2402	2510
2403		- //e->base.destroy(&e->base);//todo
	2511	+ /* e->base.destroy(&e->base);//todo */
2404	2512	file_priv->event_space += sizeof(e->event);
2405	2513	}
2406	2514	spin_unlock_irqrestore(&drm->event_lock, flags);
..	..	@@ -2465,6 +2573,9 @@
2465	2573	struct drm_framebuffer *fb = state->fb;
2466	2574	struct drm_format_name_buf format_name;
2467	2575	int i;
	2576	+ struct drm_gem_object *obj;
	2577	+ struct rockchip_gem_object *rk_obj;
	2578	+ dma_addr_t fb_addr;
2468	2579	u64 afbdc_format =
2469	2580	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16);
2470	2581
..	..	@@ -2492,14 +2603,30 @@
2492	2603	DEBUG_PRINT("\tdst: pos[%dx%d] rect[%dx%d]\n", dest->x1, dest->y1,
2493	2604	drm_rect_width(dest), drm_rect_height(dest));
2494	2605
2495		- for (i = 0; i < drm_format_num_planes(fb->format->format); i++) {
2496		- dma_addr_t fb_addr = rockchip_fb_get_dma_addr(fb, i);
	2606	+ for (i = 0; i < fb->format->num_planes; i++) {
	2607	+ obj = fb->obj[0];
	2608	+ rk_obj = to_rockchip_obj(obj);
	2609	+ fb_addr = rk_obj->dma_addr + fb->offsets[0];
2497	2610
2498	2611	DEBUG_PRINT("\tbuf[%d]: addr: %pad pitch: %d offset: %d\n",
2499	2612	i, &fb_addr, fb->pitches[i], fb->offsets[i]);
2500	2613	}
2501	2614
2502	2615	return 0;
	2616	+}
	2617	+
	2618	+static void vop_dump_connector_on_crtc(struct drm_crtc crtc, struct seq_file s)
	2619	+{
	2620	+ struct drm_connector_list_iter conn_iter;
	2621	+ struct drm_connector *connector;
	2622	+
	2623	+ drm_connector_list_iter_begin(crtc->dev, &conn_iter);
	2624	+ drm_for_each_connector_iter(connector, &conn_iter) {
	2625	+ if (crtc->state->connector_mask & drm_connector_mask(connector))
	2626	+ DEBUG_PRINT(" Connector: %s\n", connector->name);
	2627	+
	2628	+ }
	2629	+ drm_connector_list_iter_end(&conn_iter);
2503	2630	}
2504	2631
2505	2632	static int vop_crtc_debugfs_dump(struct drm_crtc crtc, struct seq_file s)
..	..	@@ -2518,8 +2645,7 @@
2518	2645	if (!crtc_state->active)
2519	2646	return 0;
2520	2647
2521		- DEBUG_PRINT(" Connector: %s\n",
2522		- drm_get_connector_name(state->output_type));
	2648	+ vop_dump_connector_on_crtc(crtc, s);
2523	2649	DEBUG_PRINT("\tbus_format[%x]: %s\n", state->bus_format,
2524	2650	drm_get_bus_format_name(state->bus_format));
2525	2651	DEBUG_PRINT("\toverlay_mode[%d] output_mode[%x]",
..	..	@@ -2613,24 +2739,15 @@
2613	2739	goto remove;
2614	2740	}
2615	2741	#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
2616		- drm_debugfs_vop_add(crtc, vop->debugfs);
	2742	+ rockchip_drm_add_dump_buffer(crtc, vop->debugfs);
2617	2743	#endif
2618	2744	for (i = 0; i < ARRAY_SIZE(vop_debugfs_files); i++)
2619	2745	vop->debugfs_files[i].data = vop;
2620	2746
2621		- ret = drm_debugfs_create_files(vop->debugfs_files,
2622		- ARRAY_SIZE(vop_debugfs_files),
2623		- vop->debugfs,
2624		- minor);
2625		- if (ret) {
2626		- dev_err(vop->dev, "could not install rockchip_debugfs_list\n");
2627		- goto free;
2628		- }
	2747	+ drm_debugfs_create_files(vop->debugfs_files, ARRAY_SIZE(vop_debugfs_files),
	2748	+ vop->debugfs, minor);
2629	2749
2630	2750	return 0;
2631		-free:
2632		- kfree(vop->debugfs_files);
2633		- vop->debugfs_files = NULL;
2634	2751	remove:
2635	2752	debugfs_remove(vop->debugfs);
2636	2753	vop->debugfs = NULL;
..	..	@@ -2638,10 +2755,10 @@
2638	2755	}
2639	2756
2640	2757	static enum drm_mode_status
2641		-vop_crtc_mode_valid(struct drm_crtc crtc, const struct drm_display_mode mode,
2642		- int output_type)
	2758	+vop_crtc_mode_valid(struct drm_crtc crtc, const struct drm_display_mode mode)
2643	2759	{
2644	2760	struct vop *vop = to_vop(crtc);
	2761	+ struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state);
2645	2762	const struct vop_data *vop_data = vop->data;
2646	2763	int request_clock = mode->clock;
2647	2764	int clock;
..	..	@@ -2654,15 +2771,20 @@
2654	2771	VOP_MINOR(vop->version) <= 2)
2655	2772	return MODE_BAD;
2656	2773
2657		- if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	2774	+ /*
	2775	+ * Dclk need to be double if BT656 interface and vop version >= 2.12.
	2776	+ */
	2777	+ if (mode->flags & DRM_MODE_FLAG_DBLCLK \|\|
	2778	+ (VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) >= 12 &&
	2779	+ s->output_if & VOP_OUTPUT_IF_BT656))
2658	2780	request_clock *= 2;
2659	2781	clock = clk_round_rate(vop->dclk, request_clock * 1000) / 1000;
2660	2782
2661	2783	/*
2662	2784	* Hdmi or DisplayPort request a Accurate clock.
2663	2785	*/
2664		- if (output_type == DRM_MODE_CONNECTOR_HDMIA \|\|
2665		- output_type == DRM_MODE_CONNECTOR_DisplayPort)
	2786	+ if (s->output_type == DRM_MODE_CONNECTOR_HDMIA \|\|
	2787	+ s->output_type == DRM_MODE_CONNECTOR_DisplayPort)
2666	2788	if (clock != request_clock)
2667	2789	return MODE_CLOCK_RANGE;
2668	2790
..	..	@@ -2692,7 +2814,7 @@
2692	2814	struct drm_framebuffer *fb = pstate->fb;
2693	2815	struct drm_rect *dest = &vop_plane_state->dest;
2694	2816	struct drm_rect *src = &vop_plane_state->src;
2695		- int bpp = fb->format->bpp[0];
	2817	+ int bpp = fb->format->cpp[0] << 3;
2696	2818	int src_width = drm_rect_width(src) >> 16;
2697	2819	int src_height = drm_rect_height(src) >> 16;
2698	2820	int dest_width = drm_rect_width(dest);
..	..	@@ -2741,8 +2863,7 @@
2741	2863
2742	2864	static size_t vop_crtc_bandwidth(struct drm_crtc *crtc,
2743	2865	struct drm_crtc_state *crtc_state,
2744		- size_t *frame_bw_mbyte,
2745		- unsigned int *plane_num_total)
	2866	+ struct dmcfreq_vop_info *vop_bw_info)
2746	2867	{
2747	2868	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
2748	2869	u16 htotal = adjusted_mode->crtc_htotal;
..	..	@@ -2752,64 +2873,77 @@
2752	2873	struct drm_plane_state *pstate;
2753	2874	struct vop_bandwidth *pbandwidth;
2754	2875	struct drm_plane *plane;
2755		- u64 bandwidth;
	2876	+ u64 line_bw_mbyte = 0;
2756	2877	int cnt = 0, plane_num = 0;
2757	2878	struct drm_atomic_state *state = crtc_state->state;
2758	2879	#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
2759	2880	struct vop_dump_list pos, n;
	2881	+ struct vop *vop = to_vop(crtc);
2760	2882	#endif
2761	2883
2762	2884	if (!htotal \|\| !vdisplay)
2763	2885	return 0;
2764	2886
2765	2887	#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
2766		- if (!crtc->vop_dump_list_init_flag) {
2767		- INIT_LIST_HEAD(&crtc->vop_dump_list_head);
2768		- crtc->vop_dump_list_init_flag = true;
	2888	+ if (!vop->rockchip_crtc.vop_dump_list_init_flag) {
	2889	+ INIT_LIST_HEAD(&vop->rockchip_crtc.vop_dump_list_head);
	2890	+ vop->rockchip_crtc.vop_dump_list_init_flag = true;
2769	2891	}
2770		- list_for_each_entry_safe(pos, n, &crtc->vop_dump_list_head, entry) {
	2892	+ list_for_each_entry_safe(pos, n, &vop->rockchip_crtc.vop_dump_list_head, entry) {
2771	2893	list_del(&pos->entry);
2772	2894	}
2773		- if (crtc->vop_dump_status == DUMP_KEEP \|\|
2774		- crtc->vop_dump_times > 0) {
2775		- crtc->frame_count++;
	2895	+ if (vop->rockchip_crtc.vop_dump_status == DUMP_KEEP \|\|
	2896	+ vop->rockchip_crtc.vop_dump_times > 0) {
	2897	+ vop->rockchip_crtc.frame_count++;
2776	2898	}
2777	2899	#endif
2778	2900
2779	2901	drm_atomic_crtc_state_for_each_plane(plane, crtc_state)
2780	2902	plane_num++;
2781	2903
2782		- if (plane_num_total)
2783		- *plane_num_total += plane_num;
	2904	+ vop_bw_info->plane_num += plane_num;
2784	2905	pbandwidth = kmalloc_array(plane_num, sizeof(*pbandwidth),
2785	2906	GFP_KERNEL);
2786	2907	if (!pbandwidth)
2787	2908	return -ENOMEM;
2788	2909
2789	2910	drm_atomic_crtc_state_for_each_plane(plane, crtc_state) {
	2911	+ int act_w, act_h, cpp, afbc_fac;
	2912	+
2790	2913	pstate = drm_atomic_get_existing_plane_state(state, plane);
2791	2914	if (pstate->crtc != crtc \|\| !pstate->fb)
2792	2915	continue;
2793	2916
	2917	+ /* This is an empirical value, if it's afbc format, the frame buffer size div 2 */
	2918	+ afbc_fac = rockchip_afbc(plane, pstate->fb->modifier) ? 2 : 1;
	2919	+
2794	2920	vop_plane_state = to_vop_plane_state(pstate);
2795	2921	pbandwidth[cnt].y1 = vop_plane_state->dest.y1;
2796	2922	pbandwidth[cnt].y2 = vop_plane_state->dest.y2;
2797		- pbandwidth[cnt++].bandwidth = vop_plane_line_bandwidth(pstate);
	2923	+ pbandwidth[cnt++].bandwidth = vop_plane_line_bandwidth(pstate) / afbc_fac;
	2924	+
	2925	+ act_w = drm_rect_width(&pstate->src) >> 16;
	2926	+ act_h = drm_rect_height(&pstate->src) >> 16;
	2927	+ cpp = pstate->fb->format->cpp[0];
	2928	+
	2929	+ vop_bw_info->frame_bw_mbyte += act_w * act_h / 1000 * cpp * drm_mode_vrefresh(adjusted_mode) / 1000;
	2930	+
2798	2931	}
2799	2932
2800	2933	sort(pbandwidth, cnt, sizeof(pbandwidth[0]), vop_bandwidth_cmp, NULL);
2801	2934
2802		- bandwidth = vop_calc_max_bandwidth(pbandwidth, 0, cnt, vdisplay);
	2935	+ vop_bw_info->line_bw_mbyte = vop_calc_max_bandwidth(pbandwidth, 0, cnt, vdisplay);
2803	2936	kfree(pbandwidth);
2804	2937	/*
2805		- * bandwidth(MB/s)
	2938	+ * line_bandwidth(MB/s)
2806	2939	* = line_bandwidth / line_time
2807	2940	* = line_bandwidth(Byte) * clock(KHZ) / 1000 / htotal
2808	2941	*/
2809		- bandwidth *= clock;
2810		- do_div(bandwidth, htotal * 1000);
	2942	+ line_bw_mbyte *= clock;
	2943	+ do_div(line_bw_mbyte, htotal * 1000);
	2944	+ vop_bw_info->line_bw_mbyte = line_bw_mbyte;
2811	2945
2812		- return bandwidth;
	2946	+ return vop_bw_info->line_bw_mbyte;
2813	2947	}
2814	2948
2815	2949	static void vop_crtc_close(struct drm_crtc *crtc)
..	..	@@ -2892,16 +3026,50 @@
2892	3026	vop_set_out_mode(vop, state->output_mode);
2893	3027	}
2894	3028
	3029	+static int vop_crtc_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)
	3030	+{
	3031	+ struct vop *vop = to_vop(crtc);
	3032	+ unsigned long jiffies_left;
	3033	+ int ret = 0;
	3034	+
	3035	+ if (!vop->is_enabled)
	3036	+ return -ENODEV;
	3037	+
	3038	+ mutex_lock(&vop->vop_lock);
	3039	+
	3040	+ if (vop_line_flag_irq_is_enabled(vop)) {
	3041	+ ret = -EBUSY;
	3042	+ goto out;
	3043	+ }
	3044	+
	3045	+ reinit_completion(&vop->line_flag_completion);
	3046	+ vop_line_flag_irq_enable(vop);
	3047	+
	3048	+ jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion,
	3049	+ msecs_to_jiffies(mstimeout));
	3050	+ vop_line_flag_irq_disable(vop);
	3051	+
	3052	+ if (jiffies_left == 0) {
	3053	+ DRM_DEV_ERROR(vop->dev, "timeout waiting for lineflag IRQ\n");
	3054	+ ret = -ETIMEDOUT;
	3055	+ goto out;
	3056	+ }
	3057	+
	3058	+out:
	3059	+ mutex_unlock(&vop->vop_lock);
	3060	+ return ret;
	3061	+}
	3062	+
2895	3063	static const struct rockchip_crtc_funcs private_crtc_funcs = {
2896	3064	.loader_protect = vop_crtc_loader_protect,
2897	3065	.cancel_pending_vblank = vop_crtc_cancel_pending_vblank,
2898	3066	.debugfs_init = vop_crtc_debugfs_init,
2899	3067	.debugfs_dump = vop_crtc_debugfs_dump,
2900	3068	.regs_dump = vop_crtc_regs_dump,
2901		- .mode_valid = vop_crtc_mode_valid,
2902	3069	.bandwidth = vop_crtc_bandwidth,
2903	3070	.crtc_close = vop_crtc_close,
2904	3071	.crtc_send_mcu_cmd = vop_crtc_send_mcu_cmd,
	3072	+ .wait_vact_end = vop_crtc_wait_vact_end,
2905	3073	};
2906	3074
2907	3075	static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
..	..	@@ -2910,6 +3078,8 @@
2910	3078	{
2911	3079	struct vop *vop = to_vop(crtc);
2912	3080	const struct vop_data *vop_data = vop->data;
	3081	+ struct rockchip_crtc_state *s =
	3082	+ to_rockchip_crtc_state(crtc->state);
2913	3083
2914	3084	if (mode->hdisplay > vop_data->max_output.width)
2915	3085	return false;
..	..	@@ -2917,7 +3087,12 @@
2917	3087	drm_mode_set_crtcinfo(adj_mode,
2918	3088	CRTC_INTERLACE_HALVE_V \| CRTC_STEREO_DOUBLE);
2919	3089
2920		- if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	3090	+ /*
	3091	+ * Dclk need to be double if BT656 interface and vop version >= 2.12.
	3092	+ */
	3093	+ if (mode->flags & DRM_MODE_FLAG_DBLCLK \|\|
	3094	+ (VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) >= 12 &&
	3095	+ s->output_if & VOP_OUTPUT_IF_BT656))
2921	3096	adj_mode->crtc_clock *= 2;
2922	3097
2923	3098	adj_mode->crtc_clock =
..	..	@@ -2949,7 +3124,6 @@
2949	3124	case MEDIA_BUS_FMT_RGB666_1X18:
2950	3125	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
2951	3126	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
2952		- case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:
2953	3127	VOP_CTRL_SET(vop, dither_down_en, 1);
2954	3128	VOP_CTRL_SET(vop, dither_down_mode, RGB888_TO_RGB666);
2955	3129	break;
..	..	@@ -2963,8 +3137,8 @@
2963	3137	VOP_CTRL_SET(vop, dither_down_en, 0);
2964	3138	VOP_CTRL_SET(vop, pre_dither_down_en, 0);
2965	3139	break;
2966		- case MEDIA_BUS_FMT_SRGB888_3X8:
2967		- case MEDIA_BUS_FMT_SRGB888_DUMMY_4X8:
	3140	+ case MEDIA_BUS_FMT_RGB888_3X8:
	3141	+ case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
2968	3142	case MEDIA_BUS_FMT_RGB888_1X24:
2969	3143	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
2970	3144	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
..	..	@@ -2986,12 +3160,15 @@
2986	3160	struct vop *vop = to_vop(crtc);
2987	3161	u32 val;
2988	3162
2989		- if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
2990		- !(vop->data->feature & VOP_FEATURE_OUTPUT_10BIT))
	3163	+ if ((s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
	3164	+ !(vop->data->feature & VOP_FEATURE_OUTPUT_10BIT)) \|\|
	3165	+ (VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) >= 12 &&
	3166	+ s->output_if & VOP_OUTPUT_IF_BT656))
2991	3167	s->output_mode = ROCKCHIP_OUT_MODE_P888;
2992	3168
2993		- if (is_uv_swap(s->bus_format, s->output_mode))
2994		- VOP_CTRL_SET(vop, dsp_data_swap, DSP_RB_SWAP);
	3169	+ if (is_uv_swap(s->bus_format, s->output_mode) \|\|
	3170	+ is_rb_swap(s->bus_format, s->output_mode))
	3171	+ VOP_CTRL_SET(vop, dsp_rb_swap, 1);
2995	3172	else
2996	3173	VOP_CTRL_SET(vop, dsp_data_swap, 0);
2997	3174
..	..	@@ -3097,11 +3274,20 @@
3097	3274	int for_ddr_freq = 0;
3098	3275	bool dclk_inv, yc_swap = false;
3099	3276
	3277	+ if (old_state && old_state->self_refresh_active) {
	3278	+ drm_crtc_vblank_on(crtc);
	3279	+ if (vop->aclk_rate_reset)
	3280	+ clk_set_rate(vop->aclk, vop->aclk_rate);
	3281	+ vop->aclk_rate_reset = false;
	3282	+
	3283	+ return;
	3284	+ }
	3285	+
3100	3286	rockchip_set_system_status(sys_status);
3101	3287	vop_lock(vop);
3102	3288	DRM_DEV_INFO(vop->dev, "Update mode to %dx%d%s%d, type: %d\n",
3103	3289	hdisplay, vdisplay, interlaced ? "i" : "p",
3104		- adjusted_mode->vrefresh, s->output_type);
	3290	+ drm_mode_vrefresh(adjusted_mode), s->output_type);
3105	3291	vop_initial(crtc);
3106	3292	vop_disable_allwin(vop);
3107	3293	VOP_CTRL_SET(vop, standby, 0);
..	..	@@ -3118,6 +3304,9 @@
3118	3304	vop_mcu_mode(crtc);
3119	3305
3120	3306	dclk_inv = (s->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) ? 1 : 0;
	3307	+ /* For improving signal quality, dclk need to be inverted by default on rv1106. */
	3308	+ if ((VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) == 12))
	3309	+ dclk_inv = !dclk_inv;
3121	3310
3122	3311	VOP_CTRL_SET(vop, dclk_pol, dclk_inv);
3123	3312	val = (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ?
..	..	@@ -3147,6 +3336,10 @@
3147	3336	yc_swap = is_yc_swap(s->bus_format);
3148	3337	VOP_CTRL_SET(vop, bt1120_yc_swap, yc_swap);
3149	3338	VOP_CTRL_SET(vop, yuv_clip, 1);
	3339	+ } else if (s->output_if & VOP_OUTPUT_IF_BT656) {
	3340	+ VOP_CTRL_SET(vop, bt656_en, 1);
	3341	+ yc_swap = is_yc_swap(s->bus_format);
	3342	+ VOP_CTRL_SET(vop, bt1120_yc_swap, yc_swap);
3150	3343	}
3151	3344	break;
3152	3345	case DRM_MODE_CONNECTOR_eDP:
..	..	@@ -3233,7 +3426,8 @@
3233	3426	VOP_CTRL_SET(vop, vtotal_pw, vtotal << 16 \| vsync_len);
3234	3427
3235	3428	VOP_CTRL_SET(vop, core_dclk_div,
3236		- !!(adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK));
	3429	+ !!(adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) \|\|
	3430	+ s->output_if & VOP_OUTPUT_IF_BT656);
3237	3431
3238	3432	VOP_CTRL_SET(vop, win_csc_mode_sel, 1);
3239	3433
..	..	@@ -3258,7 +3452,6 @@
3258	3452	struct drm_crtc_state *crtc_state)
3259	3453	{
3260	3454	struct vop *vop = to_vop(crtc);
3261		- const struct vop_data *vop_data = vop->data;
3262	3455	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
3263	3456	struct drm_atomic_state *state = crtc_state->state;
3264	3457	struct drm_plane *plane;
..	..	@@ -3288,8 +3481,8 @@
3288	3481	DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16))
3289	3482	continue;
3290	3483
3291		- if (!(vop_data->feature & VOP_FEATURE_AFBDC)) {
3292		- DRM_ERROR("not support afbdc\n");
	3484	+ if (!VOP_CTRL_SUPPORT(vop, afbdc_en)) {
	3485	+ DRM_INFO("not support afbdc\n");
3293	3486	return -EINVAL;
3294	3487	}
3295	3488
..	..	@@ -3329,10 +3522,17 @@
3329	3522
3330	3523	if (VOP_CTRL_SUPPORT(vop, afbdc_pic_vir_width)) {
3331	3524	u32 align_x1, align_x2, align_y1, align_y2, align_val;
	3525	+ struct drm_gem_object *obj;
	3526	+ struct rockchip_gem_object *rk_obj;
	3527	+ dma_addr_t fb_addr;
	3528	+
	3529	+ obj = fb->obj[0];
	3530	+ rk_obj = to_rockchip_obj(obj);
	3531	+ fb_addr = rk_obj->dma_addr + fb->offsets[0];
3332	3532
3333	3533	s->afbdc_win_format = afbdc_format;
3334	3534	s->afbdc_win_id = win->win_id;
3335		- s->afbdc_win_ptr = rockchip_fb_get_dma_addr(fb, 0);
	3535	+ s->afbdc_win_ptr = fb_addr;
3336	3536	s->afbdc_win_vir_width = fb->width;
3337	3537	s->afbdc_win_xoffset = (src->x1 >> 16);
3338	3538	s->afbdc_win_yoffset = (src->y1 >> 16);
..	..	@@ -3716,6 +3916,7 @@
3716	3916	struct rockchip_crtc_state *s =
3717	3917	to_rockchip_crtc_state(crtc->state);
3718	3918	struct vop *vop = to_vop(crtc);
	3919	+ const struct vop_data *vop_data = vop->data;
3719	3920
3720	3921	spin_lock(&vop->reg_lock);
3721	3922
..	..	@@ -3743,7 +3944,8 @@
3743	3944	VOP_CTRL_SET(vop, afbdc_en, s->afbdc_en);
3744	3945
3745	3946	VOP_CTRL_SET(vop, dsp_layer_sel, s->dsp_layer_sel);
3746		- vop_post_config(crtc);
	3947	+ if (vop_data->feature & VOP_FEATURE_OVERSCAN)
	3948	+ vop_post_config(crtc);
3747	3949
3748	3950	spin_unlock(&vop->reg_lock);
3749	3951	}
..	..	@@ -3854,21 +4056,6 @@
3854	4056	crtc->state->event = NULL;
3855	4057	}
3856	4058	spin_unlock_irq(&crtc->dev->event_lock);
3857		-
3858		-#if 0
3859		- for_each_plane_in_state(old_state, plane, old_plane_state, i) {
3860		- if (!old_plane_state->fb)
3861		- continue;
3862		-
3863		- if (old_plane_state->fb == plane->state->fb)
3864		- continue;
3865		-
3866		- drm_framebuffer_get(old_plane_state->fb);
3867		- WARN_ON(drm_crtc_vblank_get(crtc) != 0);
3868		- drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb);
3869		- set_bit(VOP_PENDING_FB_UNREF, &vop->pending);
3870		- }
3871		-#else
3872	4059	for_each_old_plane_in_state(old_state, plane, old_plane_state, i) {
3873	4060	if (!old_plane_state->fb)
3874	4061	continue;
..	..	@@ -3881,11 +4068,11 @@
3881	4068	drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb);
3882	4069	set_bit(VOP_PENDING_FB_UNREF, &vop->pending);
3883	4070	}
3884		-#endif
3885	4071	}
3886	4072
3887	4073	static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
3888	4074	.mode_fixup = vop_crtc_mode_fixup,
	4075	+ .mode_valid = vop_crtc_mode_valid,
3889	4076	.atomic_check = vop_crtc_atomic_check,
3890	4077	.atomic_flush = vop_crtc_atomic_flush,
3891	4078	.atomic_enable = vop_crtc_atomic_enable,
..	..	@@ -3921,6 +4108,9 @@
3921	4108	static struct drm_crtc_state vop_crtc_duplicate_state(struct drm_crtc crtc)
3922	4109	{
3923	4110	struct rockchip_crtc_state rockchip_state, old_state;
	4111	+
	4112	+ if (WARN_ON(!crtc->state))
	4113	+ return NULL;
3924	4114
3925	4115	old_state = to_rockchip_crtc_state(crtc->state);
3926	4116	rockchip_state = kmemdup(old_state, sizeof(*old_state), GFP_KERNEL);
..	..	@@ -4036,8 +4226,19 @@
4036	4226	return 0;
4037	4227	}
4038	4228
4039		- if (property == private->alpha_scale_prop) {
4040		- *val = (vop->data->feature & VOP_FEATURE_ALPHA_SCALE) ? 1 : 0;
	4229	+ if (property == private->aclk_prop) {
	4230	+ /* KHZ, keep align with mode->clock */
	4231	+ *val = clk_get_rate(vop->aclk) / 1000;
	4232	+ return 0;
	4233	+ }
	4234	+
	4235	+ if (property == private->bg_prop) {
	4236	+ *val = vop->background;
	4237	+ return 0;
	4238	+ }
	4239	+
	4240	+ if (property == private->line_flag_prop) {
	4241	+ *val = vop->line_flag;
4041	4242	return 0;
4042	4243	}
4043	4244
..	..	@@ -4051,9 +4252,10 @@
4051	4252	uint64_t val)
4052	4253	{
4053	4254	struct drm_device *drm_dev = crtc->dev;
	4255	+ struct rockchip_drm_private *private = drm_dev->dev_private;
4054	4256	struct drm_mode_config *mode_config = &drm_dev->mode_config;
4055	4257	struct rockchip_crtc_state *s = to_rockchip_crtc_state(state);
4056		- //struct vop *vop = to_vop(crtc);
	4258	+ struct vop *vop = to_vop(crtc);
4057	4259
4058	4260	if (property == mode_config->tv_left_margin_property) {
4059	4261	s->left_margin = val;
..	..	@@ -4072,6 +4274,16 @@
4072	4274
4073	4275	if (property == mode_config->tv_bottom_margin_property) {
4074	4276	s->bottom_margin = val;
	4277	+ return 0;
	4278	+ }
	4279	+
	4280	+ if (property == private->bg_prop) {
	4281	+ vop->background = val;
	4282	+ return 0;
	4283	+ }
	4284	+
	4285	+ if (property == private->line_flag_prop) {
	4286	+ vop->line_flag = val;
4075	4287	return 0;
4076	4288	}
4077	4289
..	..	@@ -4100,14 +4312,14 @@
4100	4312	struct vop *vop = container_of(work, struct vop, fb_unref_work);
4101	4313	struct drm_framebuffer *fb = val;
4102	4314
4103		- drm_crtc_vblank_put(&vop->crtc);
	4315	+ drm_crtc_vblank_put(&vop->rockchip_crtc.crtc);
4104	4316	drm_framebuffer_put(fb);
4105	4317	}
4106	4318
4107	4319	static void vop_handle_vblank(struct vop *vop)
4108	4320	{
4109	4321	struct drm_device *drm = vop->drm_dev;
4110		- struct drm_crtc *crtc = &vop->crtc;
	4322	+ struct drm_crtc *crtc = &vop->rockchip_crtc.crtc;
4111	4323	unsigned long flags;
4112	4324
4113	4325	spin_lock_irqsave(&drm->event_lock, flags);
..	..	@@ -4125,7 +4337,7 @@
4125	4337	static irqreturn_t vop_isr(int irq, void *data)
4126	4338	{
4127	4339	struct vop *vop = data;
4128		- struct drm_crtc *crtc = &vop->crtc;
	4340	+ struct drm_crtc *crtc = &vop->rockchip_crtc.crtc;
4129	4341	uint32_t active_irqs;
4130	4342	unsigned long flags;
4131	4343	int ret = IRQ_NONE;
..	..	@@ -4222,27 +4434,49 @@
4222	4434
4223	4435	flags \|= (VOP_WIN_SUPPORT(vop, win, xmirror)) ? DRM_MODE_REFLECT_X : 0;
4224	4436	flags \|= (VOP_WIN_SUPPORT(vop, win, ymirror)) ? DRM_MODE_REFLECT_Y : 0;
	4437	+
4225	4438	if (flags)
4226	4439	drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
4227	4440	DRM_MODE_ROTATE_0 \| flags);
	4441	+}
	4442	+
	4443	+static int vop_plane_create_name_property(struct vop vop, struct vop_win win)
	4444	+{
	4445	+ struct drm_prop_enum_list *props = vop->plane_name_list;
	4446	+ struct drm_property *prop;
	4447	+ uint64_t bits = BIT_ULL(win->plane_id);
	4448	+
	4449	+ prop = drm_property_create_bitmask(vop->drm_dev,
	4450	+ DRM_MODE_PROP_IMMUTABLE, "NAME",
	4451	+ props, vop->num_wins, bits);
	4452	+ if (!prop) {
	4453	+ DRM_DEV_ERROR(vop->dev, "create Name prop for %s failed\n", win->name);
	4454	+ return -ENOMEM;
	4455	+ }
	4456	+ win->name_prop = prop;
	4457	+ drm_object_attach_property(&win->base.base, win->name_prop, bits);
	4458	+
	4459	+ return 0;
4228	4460	}
4229	4461
4230	4462	static int vop_plane_init(struct vop vop, struct vop_win win,
4231	4463	unsigned long possible_crtcs)
4232	4464	{
4233	4465	struct rockchip_drm_private *private = vop->drm_dev->dev_private;
	4466	+ unsigned int blend_caps = BIT(DRM_MODE_BLEND_PIXEL_NONE) \| BIT(DRM_MODE_BLEND_PREMULTI) \|
	4467	+ BIT(DRM_MODE_BLEND_COVERAGE);
	4468	+ const struct vop_data *vop_data = vop->data;
4234	4469	uint64_t feature = 0;
4235	4470	int ret;
4236	4471
4237	4472	ret = drm_universal_plane_init(vop->drm_dev, &win->base, possible_crtcs, &vop_plane_funcs,
4238		- win->data_formats, win->nformats, NULL, win->type, NULL);
	4473	+ win->data_formats, win->nformats, win->format_modifiers,
	4474	+ win->type, win->name);
4239	4475	if (ret) {
4240	4476	DRM_ERROR("failed to initialize plane %d\n", ret);
4241	4477	return ret;
4242	4478	}
4243	4479	drm_plane_helper_add(&win->base, &plane_helper_funcs);
4244		- drm_object_attach_property(&win->base.base,
4245		- vop->plane_zpos_prop, win->win_id);
4246	4480
4247	4481	if (win->phy->scl)
4248	4482	feature \|= BIT(ROCKCHIP_DRM_PLANE_FEATURE_SCALE);
..	..	@@ -4262,15 +4496,9 @@
4262	4496	drm_object_attach_property(&win->base.base,
4263	4497	private->color_space_prop, 0);
4264	4498	if (VOP_WIN_SUPPORT(vop, win, global_alpha_val))
4265		- drm_object_attach_property(&win->base.base,
4266		- private->global_alpha_prop, 0xff);
4267		- drm_object_attach_property(&win->base.base,
4268		- private->blend_mode_prop, 0);
	4499	+ drm_plane_create_alpha_property(&win->base);
4269	4500	drm_object_attach_property(&win->base.base,
4270	4501	private->async_commit_prop, 0);
4271		- if (VOP_WIN_SUPPORT(vop, win, color_key))
4272		- drm_object_attach_property(&win->base.base,
4273		- win->color_key_prop, 0);
4274	4502
4275	4503	if (win->parent)
4276	4504	drm_object_attach_property(&win->base.base, private->share_id_prop,
..	..	@@ -4278,6 +4506,45 @@
4278	4506	else
4279	4507	drm_object_attach_property(&win->base.base, private->share_id_prop,
4280	4508	win->base.base.id);
	4509	+
	4510	+ drm_plane_create_blend_mode_property(&win->base, blend_caps);
	4511	+ drm_plane_create_zpos_property(&win->base, win->win_id, 0, vop->num_wins - 1);
	4512	+ vop_plane_create_name_property(vop, win);
	4513	+
	4514	+
	4515	+ win->input_width_prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_IMMUTABLE,
	4516	+ "INPUT_WIDTH", 0, vop_data->max_input.width);
	4517	+ win->input_height_prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_IMMUTABLE,
	4518	+ "INPUT_HEIGHT", 0, vop_data->max_input.height);
	4519	+
	4520	+ win->output_width_prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_IMMUTABLE,
	4521	+ "OUTPUT_WIDTH", 0, vop_data->max_input.width);
	4522	+ win->output_height_prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_IMMUTABLE,
	4523	+ "OUTPUT_HEIGHT", 0, vop_data->max_input.height);
	4524	+
	4525	+ win->scale_prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_IMMUTABLE,
	4526	+ "SCALE_RATE", 8, 8);
	4527	+ /*
	4528	+ * Support 24 bit(RGB888) or 16 bit(rgb565) color key.
	4529	+ * Bit 31 is used as a flag to disable (0) or enable
	4530	+ * color keying (1).
	4531	+ */
	4532	+ if (VOP_WIN_SUPPORT(vop, win, color_key))
	4533	+ win->color_key_prop = drm_property_create_range(vop->drm_dev, 0,
	4534	+ "colorkey", 0, 0x80ffffff);
	4535	+ if (!win->input_width_prop \|\| !win->input_height_prop \|\|
	4536	+ !win->scale_prop) {
	4537	+ DRM_ERROR("failed to create property\n");
	4538	+ return -ENOMEM;
	4539	+ }
	4540	+
	4541	+ drm_object_attach_property(&win->base.base, win->input_width_prop, 0);
	4542	+ drm_object_attach_property(&win->base.base, win->input_height_prop, 0);
	4543	+ drm_object_attach_property(&win->base.base, win->output_width_prop, 0);
	4544	+ drm_object_attach_property(&win->base.base, win->output_height_prop, 0);
	4545	+ drm_object_attach_property(&win->base.base, win->scale_prop, 0);
	4546	+ if (VOP_WIN_SUPPORT(vop, win, color_key))
	4547	+ drm_object_attach_property(&win->base.base, win->color_key_prop, 0);
4281	4548
4282	4549	return 0;
4283	4550	}
..	..	@@ -4339,16 +4606,75 @@
4339	4606	return 0;
4340	4607	}
4341	4608
	4609	+static int vop_crtc_create_plane_mask_property(struct vop vop, struct drm_crtc crtc)
	4610	+{
	4611	+ struct drm_property *prop;
	4612	+
	4613	+ static const struct drm_prop_enum_list props[] = {
	4614	+ { ROCKCHIP_VOP_WIN0, "Win0" },
	4615	+ { ROCKCHIP_VOP_WIN1, "Win1" },
	4616	+ { ROCKCHIP_VOP_WIN2, "Win2" },
	4617	+ { ROCKCHIP_VOP_WIN3, "Win3" },
	4618	+ };
	4619	+
	4620	+ prop = drm_property_create_bitmask(vop->drm_dev,
	4621	+ DRM_MODE_PROP_IMMUTABLE, "PLANE_MASK",
	4622	+ props, ARRAY_SIZE(props),
	4623	+ 0xffffffff);
	4624	+ if (!prop) {
	4625	+ DRM_DEV_ERROR(vop->dev, "create plane_mask prop for vp%d failed\n", vop->id);
	4626	+ return -ENOMEM;
	4627	+ }
	4628	+
	4629	+ vop->plane_mask_prop = prop;
	4630	+ drm_object_attach_property(&crtc->base, vop->plane_mask_prop, vop->plane_mask);
	4631	+
	4632	+ return 0;
	4633	+}
	4634	+
	4635	+static int vop_crtc_create_feature_property(struct vop vop, struct drm_crtc crtc)
	4636	+{
	4637	+ const struct vop_data *vop_data = vop->data;
	4638	+
	4639	+ struct drm_property *prop;
	4640	+ u64 feature = 0;
	4641	+
	4642	+ static const struct drm_prop_enum_list props[] = {
	4643	+ { ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE, "ALPHA_SCALE" },
	4644	+ { ROCKCHIP_DRM_CRTC_FEATURE_HDR10, "HDR10" },
	4645	+ { ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR, "NEXT_HDR" },
	4646	+ };
	4647	+
	4648	+ if (vop_data->feature & VOP_FEATURE_ALPHA_SCALE)
	4649	+ feature \|= BIT(ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE);
	4650	+ if (vop_data->feature & VOP_FEATURE_HDR10)
	4651	+ feature \|= BIT(ROCKCHIP_DRM_CRTC_FEATURE_HDR10);
	4652	+ if (vop_data->feature & VOP_FEATURE_NEXT_HDR)
	4653	+ feature \|= BIT(ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR);
	4654	+
	4655	+ prop = drm_property_create_bitmask(vop->drm_dev,
	4656	+ DRM_MODE_PROP_IMMUTABLE, "FEATURE",
	4657	+ props, ARRAY_SIZE(props),
	4658	+ 0xffffffff);
	4659	+ if (!prop) {
	4660	+ DRM_DEV_ERROR(vop->dev, "create FEATURE prop for vop%d failed\n", vop->id);
	4661	+ return -ENOMEM;
	4662	+ }
	4663	+
	4664	+ vop->feature_prop = prop;
	4665	+ drm_object_attach_property(&crtc->base, vop->feature_prop, feature);
	4666	+
	4667	+ return 0;
	4668	+}
	4669	+
4342	4670	static int vop_create_crtc(struct vop *vop)
4343	4671	{
4344	4672	struct device *dev = vop->dev;
4345		- const struct vop_data *vop_data = vop->data;
4346	4673	struct drm_device *drm_dev = vop->drm_dev;
4347	4674	struct rockchip_drm_private *private = drm_dev->dev_private;
4348	4675	struct drm_plane primary = NULL, cursor = NULL, plane, tmp;
4349		- struct drm_crtc *crtc = &vop->crtc;
	4676	+ struct drm_crtc *crtc = &vop->rockchip_crtc.crtc;
4350	4677	struct device_node *port;
4351		- uint64_t feature = 0;
4352	4678	int ret = 0;
4353	4679	int i;
4354	4680
..	..	@@ -4364,7 +4690,8 @@
4364	4690	win->type != DRM_PLANE_TYPE_CURSOR)
4365	4691	continue;
4366	4692
4367		- if (vop_plane_init(vop, win, 0)) {
	4693	+ ret = vop_plane_init(vop, win, 0);
	4694	+ if (ret) {
4368	4695	DRM_DEV_ERROR(vop->dev, "failed to init plane\n");
4369	4696	goto err_cleanup_planes;
4370	4697	}
..	..	@@ -4394,7 +4721,8 @@
4394	4721	if (win->type != DRM_PLANE_TYPE_OVERLAY)
4395	4722	continue;
4396	4723
4397		- if (vop_plane_init(vop, win, possible_crtcs)) {
	4724	+ ret = vop_plane_init(vop, win, possible_crtcs);
	4725	+ if (ret) {
4398	4726	DRM_DEV_ERROR(vop->dev, "failed to init overlay\n");
4399	4727	goto err_cleanup_crtc;
4400	4728	}
..	..	@@ -4417,6 +4745,12 @@
4417	4745	crtc->port = port;
4418	4746	rockchip_register_crtc_funcs(crtc, &private_crtc_funcs);
4419	4747
	4748	+ drm_object_attach_property(&crtc->base, private->soc_id_prop, vop->soc_id);
	4749	+ drm_object_attach_property(&crtc->base, private->port_id_prop, vop->id);
	4750	+ drm_object_attach_property(&crtc->base, private->aclk_prop, 0);
	4751	+ drm_object_attach_property(&crtc->base, private->bg_prop, 0);
	4752	+ drm_object_attach_property(&crtc->base, private->line_flag_prop, 0);
	4753	+
4420	4754	#define VOP_ATTACH_MODE_CONFIG_PROP(prop, v) \
4421	4755	drm_object_attach_property(&crtc->base, drm_dev->mode_config.prop, v)
4422	4756
..	..	@@ -4424,13 +4758,15 @@
4424	4758	VOP_ATTACH_MODE_CONFIG_PROP(tv_right_margin_property, 100);
4425	4759	VOP_ATTACH_MODE_CONFIG_PROP(tv_top_margin_property, 100);
4426	4760	VOP_ATTACH_MODE_CONFIG_PROP(tv_bottom_margin_property, 100);
4427		-
4428	4761	#undef VOP_ATTACH_MODE_CONFIG_PROP
4429		- drm_object_attach_property(&crtc->base, private->alpha_scale_prop, 0);
4430		- if (vop_data->feature & VOP_FEATURE_AFBDC)
4431		- feature \|= BIT(ROCKCHIP_DRM_CRTC_FEATURE_AFBDC);
4432		- drm_object_attach_property(&crtc->base, vop->feature_prop,
4433		- feature);
	4762	+ vop_crtc_create_plane_mask_property(vop, crtc);
	4763	+ vop_crtc_create_feature_property(vop, crtc);
	4764	+ ret = drm_self_refresh_helper_init(crtc);
	4765	+ if (ret)
	4766	+ DRM_DEV_DEBUG_KMS(vop->dev,
	4767	+ "Failed to init %s with SR helpers %d, ignoring\n",
	4768	+ crtc->name, ret);
	4769	+
4434	4770	if (vop->lut_regs) {
4435	4771	u16 r_base, g_base, *b_base;
4436	4772	u32 lut_len = vop->lut_len;
..	..	@@ -4477,9 +4813,11 @@
4477	4813
4478	4814	static void vop_destroy_crtc(struct vop *vop)
4479	4815	{
4480		- struct drm_crtc *crtc = &vop->crtc;
	4816	+ struct drm_crtc *crtc = &vop->rockchip_crtc.crtc;
4481	4817	struct drm_device *drm_dev = vop->drm_dev;
4482	4818	struct drm_plane plane, tmp;
	4819	+
	4820	+ drm_self_refresh_helper_cleanup(crtc);
4483	4821
4484	4822	of_node_put(crtc->port);
4485	4823
..	..	@@ -4531,16 +4869,15 @@
4531	4869	const struct vop_data *vop_data = vop->data;
4532	4870	unsigned int i, j;
4533	4871	unsigned int num_wins = 0;
4534		- struct drm_property *prop;
	4872	+ char name[DRM_PROP_NAME_LEN];
	4873	+ uint8_t plane_id = 0;
	4874	+ struct drm_prop_enum_list *plane_name_list;
4535	4875	static const struct drm_prop_enum_list props[] = {
4536	4876	{ ROCKCHIP_DRM_PLANE_FEATURE_SCALE, "scale" },
4537	4877	{ ROCKCHIP_DRM_PLANE_FEATURE_ALPHA, "alpha" },
4538	4878	{ ROCKCHIP_DRM_PLANE_FEATURE_HDR2SDR, "hdr2sdr" },
4539	4879	{ ROCKCHIP_DRM_PLANE_FEATURE_SDR2HDR, "sdr2hdr" },
4540	4880	{ ROCKCHIP_DRM_PLANE_FEATURE_AFBDC, "afbdc" },
4541		- };
4542		- static const struct drm_prop_enum_list crtc_props[] = {
4543		- { ROCKCHIP_DRM_CRTC_FEATURE_AFBDC, "afbdc" },
4544	4881	};
4545	4882
4546	4883	for (i = 0; i < vop_data->win_size; i++) {
..	..	@@ -4556,16 +4893,16 @@
4556	4893	vop_win->type = win_data->type;
4557	4894	vop_win->data_formats = win_data->phy->data_formats;
4558	4895	vop_win->nformats = win_data->phy->nformats;
	4896	+ vop_win->format_modifiers = win_data->format_modifiers;
4559	4897	vop_win->feature = win_data->feature;
4560	4898	vop_win->vop = vop;
4561	4899	vop_win->win_id = i;
4562	4900	vop_win->area_id = 0;
	4901	+ vop_win->plane_id = plane_id++;
	4902	+ snprintf(name, sizeof(name), "VOP%d-win%d-%d", vop->id, vop_win->win_id, vop_win->area_id);
	4903	+ vop_win->name = devm_kstrdup(vop->dev, name, GFP_KERNEL);
4563	4904	vop_win->zpos = vop_plane_get_zpos(win_data->type,
4564	4905	vop_data->win_size);
4565		- if (VOP_WIN_SUPPORT(vop, vop_win, color_key))
4566		- vop_win->color_key_prop = drm_property_create_range(vop->drm_dev, 0,
4567		- "colorkey", 0,
4568		- 0x80ffffff);
4569	4906
4570	4907	num_wins++;
4571	4908
..	..	@@ -4582,22 +4919,19 @@
4582	4919	vop_area->type = DRM_PLANE_TYPE_OVERLAY;
4583	4920	vop_area->data_formats = vop_win->data_formats;
4584	4921	vop_area->nformats = vop_win->nformats;
	4922	+ vop_area->format_modifiers = win_data->format_modifiers;
4585	4923	vop_area->vop = vop;
4586	4924	vop_area->win_id = i;
4587	4925	vop_area->area_id = j + 1;
	4926	+ vop_area->plane_id = plane_id++;
	4927	+ snprintf(name, sizeof(name), "VOP%d-win%d-%d", vop->id, vop_area->win_id, vop_area->area_id);
	4928	+ vop_area->name = devm_kstrdup(vop->dev, name, GFP_KERNEL);
4588	4929	num_wins++;
4589	4930	}
	4931	+ vop->plane_mask \|= BIT(vop_win->win_id);
4590	4932	}
4591	4933
4592	4934	vop->num_wins = num_wins;
4593		-
4594		- prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_ATOMIC,
4595		- "ZPOS", 0, vop->data->win_size - 1);
4596		- if (!prop) {
4597		- DRM_ERROR("failed to create zpos property\n");
4598		- return -EINVAL;
4599		- }
4600		- vop->plane_zpos_prop = prop;
4601	4935
4602	4936	vop->plane_feature_prop = drm_property_create_bitmask(vop->drm_dev,
4603	4937	DRM_MODE_PROP_IMMUTABLE, "FEATURE",
..	..	@@ -4612,66 +4946,25 @@
4612	4946	return -EINVAL;
4613	4947	}
4614	4948
4615		- vop->feature_prop = drm_property_create_bitmask(vop->drm_dev,
4616		- DRM_MODE_PROP_IMMUTABLE, "FEATURE",
4617		- crtc_props, ARRAY_SIZE(crtc_props),
4618		- BIT(ROCKCHIP_DRM_CRTC_FEATURE_AFBDC));
4619		- if (!vop->feature_prop) {
4620		- DRM_ERROR("failed to create vop feature property\n");
4621		- return -EINVAL;
	4949	+ plane_name_list = devm_kzalloc(vop->dev,
	4950	+ vop->num_wins * sizeof(*plane_name_list),
	4951	+ GFP_KERNEL);
	4952	+ if (!plane_name_list) {
	4953	+ DRM_DEV_ERROR(vop->dev, "failed to alloc memory for plane_name_list\n");
	4954	+ return -ENOMEM;
4622	4955	}
	4956	+
	4957	+ for (i = 0; i < vop->num_wins; i++) {
	4958	+ struct vop_win *vop_win = &vop->win[i];
	4959	+
	4960	+ plane_name_list[i].type = vop_win->plane_id;
	4961	+ plane_name_list[i].name = vop_win->name;
	4962	+ }
	4963	+
	4964	+ vop->plane_name_list = plane_name_list;
4623	4965
4624	4966	return 0;
4625	4967	}
4626		-
4627		-/**
4628		- * rockchip_drm_wait_vact_end
4629		- * @crtc: CRTC to enable line flag
4630		- * @mstimeout: millisecond for timeout
4631		- *
4632		- * Wait for vact_end line flag irq or timeout.
4633		- *
4634		- * Returns:
4635		- * Zero on success, negative errno on failure.
4636		- */
4637		-int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)
4638		-{
4639		- struct vop *vop = to_vop(crtc);
4640		- unsigned long jiffies_left;
4641		- int ret = 0;
4642		-
4643		- if (!crtc \|\| !vop->is_enabled)
4644		- return -ENODEV;
4645		-
4646		- mutex_lock(&vop->vop_lock);
4647		- if (mstimeout <= 0) {
4648		- ret = -EINVAL;
4649		- goto out;
4650		- }
4651		-
4652		- if (vop_line_flag_irq_is_enabled(vop)) {
4653		- ret = -EBUSY;
4654		- goto out;
4655		- }
4656		-
4657		- reinit_completion(&vop->line_flag_completion);
4658		- vop_line_flag_irq_enable(vop);
4659		-
4660		- jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion,
4661		- msecs_to_jiffies(mstimeout));
4662		- vop_line_flag_irq_disable(vop);
4663		-
4664		- if (jiffies_left == 0) {
4665		- DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n");
4666		- ret = -ETIMEDOUT;
4667		- goto out;
4668		- }
4669		-
4670		-out:
4671		- mutex_unlock(&vop->vop_lock);
4672		- return ret;
4673		-}
4674		-EXPORT_SYMBOL(rockchip_drm_wait_vact_end);
4675	4968
4676	4969	static int vop_bind(struct device dev, struct device master, void *data)
4677	4970	{
..	..	@@ -4707,6 +5000,8 @@
4707	5000	vop->drm_dev = drm_dev;
4708	5001	vop->num_wins = num_wins;
4709	5002	vop->version = vop_data->version;
	5003	+ vop->soc_id = vop_data->soc_id;
	5004	+ vop->id = vop_data->vop_id;
4710	5005	dev_set_drvdata(dev, vop);
4711	5006	vop->support_multi_area = of_property_read_bool(dev->of_node, "support-multi-area");
4712	5007