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2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87 
 kernel/drivers/dma/pl330.c
....@@ -1,16 +1,13 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
34  *		http://www.samsung.com
45  *
56  * Copyright (C) 2010 Samsung Electronics Co. Ltd.
67  *	Jaswinder Singh <jassi.brar@samsung.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License as published by
10
- * the Free Software Foundation; either version 2 of the License, or
11
- * (at your option) any later version.
128  */
139 
10
+#include <linux/debugfs.h>
1411 #include <linux/kernel.h>
1512 #include <linux/io.h>
1613 #include <linux/init.h>
....@@ -28,6 +25,7 @@
2825 #include <linux/err.h>
2926 #include <linux/pm_runtime.h>
3027 #include <linux/bug.h>
28
+#include <linux/reset.h>
3129 
3230 #include "dmaengine.h"
3331 #define PL330_MAX_CHAN		8
....@@ -37,16 +35,6 @@
3735 
3836 #define PL330_QUIRK_BROKEN_NO_FLUSHP	BIT(0)
3937 #define PL330_QUIRK_PERIPH_BURST	BIT(1)
40
-
41
-#ifdef CONFIG_CPU_RV1126
42
-#undef writel
43
-#define writel(v, c)			\
44
-	do {				\
45
-		readl_relaxed(c);	\
46
-		__iowmb();		\
47
-		writel_relaxed(v, c);	\
48
-	} while (0)
49
-#endif
5038 
5139 enum pl330_cachectrl {
5240 	CCTRL0,		/* Noncacheable and nonbufferable */
....@@ -268,7 +256,7 @@
268256 static unsigned cmd_line;
269257 #define PL330_DBGCMD_DUMP(off, x...)	do { \
270258 						printk("%x:", cmd_line); \
271
-						printk(x); \
259
+						printk(KERN_CONT x); \
272260 						cmd_line += off; \
273261 					} while (0)
274262 #define PL330_DBGMC_START(addr)		(cmd_line = addr)
....@@ -298,7 +286,7 @@
298286 	u32		irq_ns;
299287 };
300288 
301
-/**
289
+/*
302290  * Request Configuration.
303291  * The PL330 core does not modify this and uses the last
304292  * working configuration if the request doesn't provide any.
....@@ -460,8 +448,7 @@
460448 	/* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
461449 	dma_addr_t fifo_dma;
462450 	enum dma_data_direction dir;
463
-	unsigned int src_interlace_size;
464
-	unsigned int dst_interlace_size;
451
+	struct dma_slave_config slave_config;
465452 
466453 	/* for runtime pm tracking */
467454 	bool active;
....@@ -470,9 +457,6 @@
470457 struct pl330_dmac {
471458 	/* DMA-Engine Device */
472459 	struct dma_device ddma;
473
-
474
-	/* Holds info about sg limitations */
475
-	struct device_dma_parameters dma_parms;
476460 
477461 	/* Pool of descriptors available for the DMAC's channels */
478462 	struct list_head desc_pool;
....@@ -509,6 +493,9 @@
509493 	unsigned int num_peripherals;
510494 	struct dma_pl330_chan *peripherals; /* keep at end */
511495 	int quirks;
496
+
497
+	struct reset_control	*rstc;
498
+	struct reset_control	*rstc_ocp;
512499 };
513500 
514501 static struct pl330_of_quirks {
....@@ -554,15 +541,21 @@
554541 	/* For cyclic capability */
555542 	bool cyclic;
556543 	size_t num_periods;
544
+#ifdef CONFIG_NO_GKI
557545 	/* interlace size */
558546 	unsigned int src_interlace_size;
559547 	unsigned int dst_interlace_size;
548
+#endif
560549 };
561550 
562551 struct _xfer_spec {
563552 	u32 ccr;
564553 	struct dma_pl330_desc *desc;
565554 };
555
+
556
+static int pl330_config_write(struct dma_chan *chan,
557
+			struct dma_slave_config *slave_config,
558
+			enum dma_transfer_direction direction);
566559 
567560 static inline bool _queue_full(struct pl330_thread *thrd)
568561 {
....@@ -1088,16 +1081,16 @@
10881081 
10891082 		if (_state(thrd) == PL330_STATE_KILLING)
10901083 			UNTIL(thrd, PL330_STATE_STOPPED)
1091
-		/* fall through */
1084
+		fallthrough;
10921085 
10931086 	case PL330_STATE_FAULTING:
10941087 		_stop(thrd);
1095
-		/* fall through */
1088
+		fallthrough;
10961089 
10971090 	case PL330_STATE_KILLING:
10981091 	case PL330_STATE_COMPLETING:
10991092 		UNTIL(thrd, PL330_STATE_STOPPED)
1100
-		/* fall through */
1093
+		fallthrough;
11011094 
11021095 	case PL330_STATE_STOPPED:
11031096 		return _trigger(thrd);
....@@ -1148,7 +1141,6 @@
11481141 
11491142 	switch (direction) {
11501143 	case DMA_MEM_TO_MEM:
1151
-		/* fall through */
11521144 	case DMA_MEM_TO_DEV:
11531145 		off += _emit_LD(dry_run, &buf[off], cond);
11541146 		break;
....@@ -1182,7 +1174,6 @@
11821174 
11831175 	switch (direction) {
11841176 	case DMA_MEM_TO_MEM:
1185
-		/* fall through */
11861177 	case DMA_DEV_TO_MEM:
11871178 		off += _emit_ST(dry_run, &buf[off], cond);
11881179 		break;
....@@ -1227,8 +1218,10 @@
12271218 			pxs->desc->peri);
12281219 		off += _emit_store(dry_run, &buf[off], cond, pxs->desc->rqtype,
12291220 			pxs->desc->peri);
1221
+#ifdef CONFIG_NO_GKI
12301222 		switch (pxs->desc->rqtype) {
12311223 		case DMA_DEV_TO_MEM:
1224
+
12321225 			if (pxs->desc->dst_interlace_size)
12331226 				off += _emit_ADDH(dry_run, &buf[off], DST,
12341227 						  pxs->desc->dst_interlace_size);
....@@ -1242,6 +1235,7 @@
12421235 			WARN_ON(1);
12431236 			break;
12441237 		}
1238
+#endif
12451239 	}
12461240 
12471241 	return off;
....@@ -1258,7 +1252,6 @@
12581252 
12591253 	switch (pxs->desc->rqtype) {
12601254 	case DMA_MEM_TO_DEV:
1261
-		/* fall through */
12621255 	case DMA_DEV_TO_MEM:
12631256 		off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc,
12641257 			cond);
....@@ -1293,7 +1286,7 @@
12931286 
12941287 	switch (pxs->desc->rqtype) {
12951288 	case DMA_MEM_TO_DEV:
1296
-		/* fall through */
1289
+		fallthrough;
12971290 	case DMA_DEV_TO_MEM:
12981291 		/*
12991292 		 * dregs_len = (total bytes - BURST_TO_BYTE(bursts, ccr)) /
....@@ -1457,6 +1450,7 @@
14571450 		off += _emit_LPEND(dry_run, &buf[off], &lpend);
14581451 	}
14591452 
1453
+#ifdef CONFIG_NO_GKI
14601454 	if (!pxs->desc->src_interlace_size &&
14611455 	    !pxs->desc->dst_interlace_size) {
14621456 		num_dregs = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr);
....@@ -1466,6 +1460,14 @@
14661460 			off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
14671461 		}
14681462 	}
1463
+#else
1464
+	num_dregs = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr);
1465
+
1466
+	if (num_dregs) {
1467
+		off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs);
1468
+		off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
1469
+	}
1470
+#endif
14691471 
14701472 	off += _emit_SEV(dry_run, &buf[off], ev);
14711473 
....@@ -1533,21 +1535,26 @@
15331535 		BRST_SIZE(ccr);
15341536 	int off = 0;
15351537 
1538
+#ifdef CONFIG_NO_GKI
15361539 	if (pxs->desc->rqtype == DMA_DEV_TO_MEM)
15371540 		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +
15381541 				     pxs->desc->dst_interlace_size);
15391542 	else if (pxs->desc->rqtype == DMA_MEM_TO_DEV)
15401543 		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +
15411544 				     pxs->desc->src_interlace_size);
1545
+#endif
15421546 	while (bursts) {
15431547 		c = bursts;
15441548 		off += _loop(pl330, dry_run, &buf[off], &c, pxs);
15451549 		bursts -= c;
15461550 	}
1551
+#ifdef CONFIG_NO_GKI
15471552 	if (!pxs->desc->src_interlace_size &&
15481553 	    !pxs->desc->dst_interlace_size)
15491554 		off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs);
1550
-
1555
+#else
1556
+	off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs);
1557
+#endif
15511558 	return off;
15521559 }
15531560 
....@@ -1578,12 +1585,14 @@
15781585 	unsigned long bursts = BYTE_TO_BURST(x->bytes, ccr);
15791586 	int off = 0;
15801587 
1588
+#ifdef CONFIG_NO_GKI
15811589 	if (pxs->desc->rqtype == DMA_DEV_TO_MEM)
15821590 		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr)
15831591 			+ pxs->desc->dst_interlace_size);
15841592 	else if (pxs->desc->rqtype == DMA_MEM_TO_DEV)
15851593 		bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr)
15861594 			+ pxs->desc->src_interlace_size);
1595
+#endif
15871596 	/* Setup Loop(s) */
15881597 	off += _loop_cyclic(pl330, dry_run, &buf[off], bursts, pxs, ev);
15891598 
....@@ -1767,9 +1776,9 @@
17671776 	tasklet_schedule(&pch->task);
17681777 }
17691778 
1770
-static void pl330_dotask(unsigned long data)
1779
+static void pl330_dotask(struct tasklet_struct *t)
17711780 {
1772
-	struct pl330_dmac *pl330 = (struct pl330_dmac *) data;
1781
+	struct pl330_dmac *pl330 = from_tasklet(pl330, t, tasks);
17731782 	unsigned long flags;
17741783 	int i;
17751784 
....@@ -2126,9 +2135,10 @@
21262135 	if (ret) {
21272136 		dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n",
21282137 			__func__, __LINE__);
2129
-		dma_free_coherent(pl330->ddma.dev,
2138
+		dma_free_attrs(pl330->ddma.dev,
21302139 				chans * pl330->mcbufsz,
2131
-				pl330->mcode_cpu, pl330->mcode_bus);
2140
+				pl330->mcode_cpu, pl330->mcode_bus,
2141
+				DMA_ATTR_PRIVILEGED);
21322142 		return ret;
21332143 	}
21342144 
....@@ -2174,7 +2184,7 @@
21742184 		return ret;
21752185 	}
21762186 
2177
-	tasklet_init(&pl330->tasks, pl330_dotask, (unsigned long) pl330);
2187
+	tasklet_setup(&pl330->tasks, pl330_dotask);
21782188 
21792189 	pl330->state = INIT;
21802190 
....@@ -2207,9 +2217,9 @@
22072217 	/* Free DMAC resources */
22082218 	dmac_free_threads(pl330);
22092219 
2210
-	dma_free_coherent(pl330->ddma.dev,
2220
+	dma_free_attrs(pl330->ddma.dev,
22112221 		pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu,
2212
-		pl330->mcode_bus);
2222
+		pl330->mcode_bus, DMA_ATTR_PRIVILEGED);
22132223 }
22142224 
22152225 /* forward declaration */
....@@ -2257,9 +2267,9 @@
22572267 	}
22582268 }
22592269 
2260
-static void pl330_tasklet(unsigned long data)
2270
+static void pl330_tasklet(struct tasklet_struct *t)
22612271 {
2262
-	struct dma_pl330_chan *pch = (struct dma_pl330_chan *)data;
2272
+	struct dma_pl330_chan *pch = from_tasklet(pch, t, task);
22632273 	struct dma_pl330_desc *desc, *_dt;
22642274 	unsigned long flags;
22652275 	bool power_down = false;
....@@ -2367,7 +2377,7 @@
23672377 		return -ENOMEM;
23682378 	}
23692379 
2370
-	tasklet_init(&pch->task, pl330_tasklet, (unsigned long) pch);
2380
+	tasklet_setup(&pch->task, pl330_tasklet);
23712381 
23722382 	spin_unlock_irqrestore(&pl330->lock, flags);
23732383 
....@@ -2432,31 +2442,46 @@
24322442 		return max_burst_len;
24332443 }
24342444 
2445
+static int pl330_config_write(struct dma_chan *chan,
2446
+			struct dma_slave_config *slave_config,
2447
+			enum dma_transfer_direction direction)
2448
+{
2449
+	struct dma_pl330_chan *pch = to_pchan(chan);
2450
+
2451
+	pl330_unprep_slave_fifo(pch);
2452
+	if (direction == DMA_MEM_TO_DEV) {
2453
+		if (slave_config->dst_addr)
2454
+			pch->fifo_addr = slave_config->dst_addr;
2455
+		if (slave_config->dst_addr_width)
2456
+			pch->burst_sz = __ffs(slave_config->dst_addr_width);
2457
+#ifdef CONFIG_NO_GKI
2458
+		if (slave_config->src_interlace_size)
2459
+			pch->slave_config.src_interlace_size = slave_config->src_interlace_size;
2460
+#endif
2461
+		pch->burst_len = fixup_burst_len(slave_config->dst_maxburst,
2462
+			pch->dmac->quirks);
2463
+	} else if (direction == DMA_DEV_TO_MEM) {
2464
+		if (slave_config->src_addr)
2465
+			pch->fifo_addr = slave_config->src_addr;
2466
+		if (slave_config->src_addr_width)
2467
+			pch->burst_sz = __ffs(slave_config->src_addr_width);
2468
+#ifdef CONFIG_NO_GKI
2469
+		if (slave_config->dst_interlace_size)
2470
+			pch->slave_config.dst_interlace_size = slave_config->dst_interlace_size;
2471
+#endif
2472
+		pch->burst_len = fixup_burst_len(slave_config->src_maxburst,
2473
+			pch->dmac->quirks);
2474
+	}
2475
+
2476
+	return 0;
2477
+}
2478
+
24352479 static int pl330_config(struct dma_chan *chan,
24362480 			struct dma_slave_config *slave_config)
24372481 {
24382482 	struct dma_pl330_chan *pch = to_pchan(chan);
24392483 
2440
-	pl330_unprep_slave_fifo(pch);
2441
-	if (slave_config->direction == DMA_MEM_TO_DEV) {
2442
-		if (slave_config->dst_addr)
2443
-			pch->fifo_addr = slave_config->dst_addr;
2444
-		if (slave_config->dst_addr_width)
2445
-			pch->burst_sz = __ffs(slave_config->dst_addr_width);
2446
-		if (slave_config->src_interlace_size)
2447
-			pch->src_interlace_size = slave_config->src_interlace_size;
2448
-		pch->burst_len = fixup_burst_len(slave_config->dst_maxburst,
2449
-			pch->dmac->quirks);
2450
-	} else if (slave_config->direction == DMA_DEV_TO_MEM) {
2451
-		if (slave_config->src_addr)
2452
-			pch->fifo_addr = slave_config->src_addr;
2453
-		if (slave_config->src_addr_width)
2454
-			pch->burst_sz = __ffs(slave_config->src_addr_width);
2455
-		if (slave_config->dst_interlace_size)
2456
-			pch->dst_interlace_size = slave_config->dst_interlace_size;
2457
-		pch->burst_len = fixup_burst_len(slave_config->src_maxburst,
2458
-			pch->dmac->quirks);
2459
-	}
2484
+	memcpy(&pch->slave_config, slave_config, sizeof(*slave_config));
24602485 
24612486 	return 0;
24622487 }
....@@ -2467,7 +2492,6 @@
24672492 	struct dma_pl330_desc *desc;
24682493 	unsigned long flags;
24692494 	struct pl330_dmac *pl330 = pch->dmac;
2470
-	LIST_HEAD(list);
24712495 	bool power_down = false;
24722496 
24732497 	pm_runtime_get_sync(pl330->ddma.dev);
....@@ -2672,7 +2696,7 @@
26722696 	list_splice_tail_init(&pch->submitted_list, &pch->work_list);
26732697 	spin_unlock_irqrestore(&pch->lock, flags);
26742698 
2675
-	pl330_tasklet((unsigned long)pch);
2699
+	pl330_tasklet(&pch->task);
26762700 }
26772701 
26782702 /*
....@@ -2776,7 +2800,7 @@
27762800 
27772801 	/* If the DMAC pool is empty, alloc new */
27782802 	if (!desc) {
2779
-		DEFINE_SPINLOCK(lock);
2803
+		static DEFINE_SPINLOCK(lock);
27802804 		LIST_HEAD(pool);
27812805 
27822806 		if (!add_desc(&pool, &lock, GFP_ATOMIC, 1))
....@@ -2862,8 +2886,8 @@
28622886 {
28632887 	struct dma_pl330_desc *desc = NULL;
28642888 	struct dma_pl330_chan *pch = to_pchan(chan);
2865
-	dma_addr_t dst;
2866
-	dma_addr_t src;
2889
+	dma_addr_t dst = 0;
2890
+	dma_addr_t src = 0;
28672891 
28682892 	if (len % period_len != 0)
28692893 		return NULL;
....@@ -2873,6 +2897,8 @@
28732897 		__func__, __LINE__);
28742898 		return NULL;
28752899 	}
2900
+
2901
+	pl330_config_write(chan, &pch->slave_config, direction);
28762902 
28772903 	if (!pl330_prep_slave_fifo(pch, direction))
28782904 		return NULL;
....@@ -2910,10 +2936,10 @@
29102936 	desc->cyclic = true;
29112937 	desc->num_periods = len / period_len;
29122938 	desc->txd.flags = flags;
2913
-
2914
-	desc->src_interlace_size = pch->src_interlace_size;
2915
-	desc->dst_interlace_size = pch->dst_interlace_size;
2916
-
2939
+#ifdef CONFIG_NO_GKI
2940
+	desc->src_interlace_size = pch->slave_config.src_interlace_size;
2941
+	desc->dst_interlace_size = pch->slave_config.dst_interlace_size;
2942
+#endif
29172943 	return &desc->txd;
29182944 }
29192945 
....@@ -3004,6 +3030,8 @@
30043030 	if (unlikely(!pch || !sgl || !sg_len))
30053031 		return NULL;
30063032 
3033
+	pl330_config_write(chan, &pch->slave_config, direction);
3034
+
30073035 	if (!pl330_prep_slave_fifo(pch, direction))
30083036 		return NULL;
30093037 
....@@ -3044,8 +3072,10 @@
30443072 		desc->rqcfg.brst_len = pch->burst_len;
30453073 		desc->rqtype = direction;
30463074 		desc->bytes_requested = sg_dma_len(sg);
3047
-		desc->src_interlace_size = pch->src_interlace_size;
3048
-		desc->dst_interlace_size = pch->dst_interlace_size;
3075
+#ifdef CONFIG_NO_GKI
3076
+		desc->src_interlace_size = pch->slave_config.src_interlace_size;
3077
+		desc->dst_interlace_size = pch->slave_config.dst_interlace_size;
3078
+#endif
30493079 	}
30503080 
30513081 	/* Return the last desc in the chain */
....@@ -3068,6 +3098,55 @@
30683098 	BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \
30693099 	BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)
30703100 
3101
+#ifdef CONFIG_DEBUG_FS
3102
+static int pl330_debugfs_show(struct seq_file *s, void *data)
3103
+{
3104
+	struct pl330_dmac *pl330 = s->private;
3105
+	int chans, pchs, ch, pr;
3106
+
3107
+	chans = pl330->pcfg.num_chan;
3108
+	pchs = pl330->num_peripherals;
3109
+
3110
+	seq_puts(s, "PL330 physical channels:\n");
3111
+	seq_puts(s, "THREAD:\t\tCHANNEL:\n");
3112
+	seq_puts(s, "--------\t-----\n");
3113
+	for (ch = 0; ch < chans; ch++) {
3114
+		struct pl330_thread *thrd = &pl330->channels[ch];
3115
+		int found = -1;
3116
+
3117
+		for (pr = 0; pr < pchs; pr++) {
3118
+			struct dma_pl330_chan *pch = &pl330->peripherals[pr];
3119
+
3120
+			if (!pch->thread || thrd->id != pch->thread->id)
3121
+				continue;
3122
+
3123
+			found = pr;
3124
+		}
3125
+
3126
+		seq_printf(s, "%d\t\t", thrd->id);
3127
+		if (found == -1)
3128
+			seq_puts(s, "--\n");
3129
+		else
3130
+			seq_printf(s, "%d\n", found);
3131
+	}
3132
+
3133
+	return 0;
3134
+}
3135
+
3136
+DEFINE_SHOW_ATTRIBUTE(pl330_debugfs);
3137
+
3138
+static inline void init_pl330_debugfs(struct pl330_dmac *pl330)
3139
+{
3140
+	debugfs_create_file(dev_name(pl330->ddma.dev),
3141
+			    S_IFREG | 0444, NULL, pl330,
3142
+			    &pl330_debugfs_fops);
3143
+}
3144
+#else
3145
+static inline void init_pl330_debugfs(struct pl330_dmac *pl330)
3146
+{
3147
+}
3148
+#endif
3149
+
30713150 /*
30723151  * Runtime PM callbacks are provided by amba/bus.c driver.
30733152  *
....@@ -3078,12 +3157,7 @@
30783157 {
30793158 	struct amba_device *pcdev = to_amba_device(dev);
30803159 
3081
-	pm_runtime_disable(dev);
3082
-
3083
-	if (!pm_runtime_status_suspended(dev)) {
3084
-		/* amba did not disable the clock */
3085
-		amba_pclk_disable(pcdev);
3086
-	}
3160
+	pm_runtime_force_suspend(dev);
30873161 	amba_pclk_unprepare(pcdev);
30883162 
30893163 	return 0;
....@@ -3098,15 +3172,14 @@
30983172 	if (ret)
30993173 		return ret;
31003174 
3101
-	if (!pm_runtime_status_suspended(dev))
3102
-		ret = amba_pclk_enable(pcdev);
3103
-
3104
-	pm_runtime_enable(dev);
3175
+	pm_runtime_force_resume(dev);
31053176 
31063177 	return ret;
31073178 }
31083179 
3109
-static SIMPLE_DEV_PM_OPS(pl330_pm, pl330_suspend, pl330_resume);
3180
+static const struct dev_pm_ops pl330_pm = {
3181
+	SET_LATE_SYSTEM_SLEEP_PM_OPS(pl330_suspend, pl330_resume)
3182
+};
31103183 
31113184 static int
31123185 pl330_probe(struct amba_device *adev, const struct amba_id *id)
....@@ -3145,6 +3218,29 @@
31453218 		return PTR_ERR(pl330->base);
31463219 
31473220 	amba_set_drvdata(adev, pl330);
3221
+
3222
+	pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma");
3223
+	if (IS_ERR(pl330->rstc)) {
3224
+		return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc), "Failed to get reset!\n");
3225
+	} else {
3226
+		ret = reset_control_deassert(pl330->rstc);
3227
+		if (ret) {
3228
+			dev_err(&adev->dev, "Couldn't deassert the device from reset!\n");
3229
+			return ret;
3230
+		}
3231
+	}
3232
+
3233
+	pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp");
3234
+	if (IS_ERR(pl330->rstc_ocp)) {
3235
+		return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc_ocp),
3236
+				     "Failed to get OCP reset!\n");
3237
+	} else {
3238
+		ret = reset_control_deassert(pl330->rstc_ocp);
3239
+		if (ret) {
3240
+			dev_err(&adev->dev, "Couldn't deassert the device from OCP reset!\n");
3241
+			return ret;
3242
+		}
3243
+	}
31483244 
31493245 	for (i = 0; i < AMBA_NR_IRQS; i++) {
31503246 		irq = adev->irq[i];
....@@ -3242,8 +3338,6 @@
32423338 		}
32433339 	}
32443340 
3245
-	adev->dev.dma_parms = &pl330->dma_parms;
3246
-
32473341 	/*
32483342 	 * This is the limit for transfers with a buswidth of 1, larger
32493343 	 * buswidths will have larger limits.
....@@ -3253,6 +3347,7 @@
32533347 		dev_err(&adev->dev, "unable to set the seg size\n");
32543348 
32553349 
3350
+	init_pl330_debugfs(pl330);
32563351 	dev_info(&adev->dev,
32573352 		"Loaded driver for PL330 DMAC-%x\n", adev->periphid);
32583353 	dev_info(&adev->dev,
....@@ -3284,10 +3379,15 @@
32843379 probe_err2:
32853380 	pl330_del(pl330);
32863381 
3382
+	if (pl330->rstc_ocp)
3383
+		reset_control_assert(pl330->rstc_ocp);
3384
+
3385
+	if (pl330->rstc)
3386
+		reset_control_assert(pl330->rstc);
32873387 	return ret;
32883388 }
32893389 
3290
-static int pl330_remove(struct amba_device *adev)
3390
+static void pl330_remove(struct amba_device *adev)
32913391 {
32923392 	struct pl330_dmac *pl330 = amba_get_drvdata(adev);
32933393 	struct dma_pl330_chan *pch, *_p;
....@@ -3322,7 +3422,11 @@
33223422 
33233423 	pl330_del(pl330);
33243424 
3325
-	return 0;
3425
+	if (pl330->rstc_ocp)
3426
+		reset_control_assert(pl330->rstc_ocp);
3427
+
3428
+	if (pl330->rstc)
3429
+		reset_control_assert(pl330->rstc);
33263430 }
33273431 
33283432 static const struct amba_id pl330_ids[] = {