enable docker ppp

hc

2023-12-09 95099d4622f8cb224d94e314c7a8e0df60b13f87

 kernel/drivers/dma/iop-adma.c
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@@ -1,16 +1,7 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * offload engine driver for the Intel Xscale series of i/o processors
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  * Copyright © 2006, Intel Corporation.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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5
  */
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6
 
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 /*
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@@ -25,13 +16,13 @@
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 #include <linux/spinlock.h>
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 #include <linux/interrupt.h>
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 #include <linux/platform_device.h>
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+#include <linux/prefetch.h>
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 #include <linux/memory.h>
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 #include <linux/ioport.h>
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 #include <linux/raid/pq.h>
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 #include <linux/slab.h>
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-#include <mach/adma.h>
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-
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+#include "iop-adma.h"
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 #include "dmaengine.h"
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27
 
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 #define to_iop_adma_chan(chan) container_of(chan, struct iop_adma_chan, common)
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@@ -125,9 +116,9 @@
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 	list_for_each_entry_safe(iter, _iter, &iop_chan->chain,
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 					chain_node) {
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 		pr_debug("\tcookie: %d slot: %d busy: %d "
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-			"this_desc: %#x next_desc: %#llx ack: %d\n",
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+			"this_desc: %pad next_desc: %#llx ack: %d\n",
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 			iter->async_tx.cookie, iter->idx, busy,
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-			iter->async_tx.phys, (u64)iop_desc_get_next_desc(iter),
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+			&iter->async_tx.phys, (u64)iop_desc_get_next_desc(iter),
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 			async_tx_test_ack(&iter->async_tx));
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 		prefetch(_iter);
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 		prefetch(&_iter->async_tx);
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@@ -182,7 +173,7 @@
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 					&iop_chan->chain, chain_node) {
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 					zero_sum_result |=
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 					    iop_desc_get_zero_result(grp_iter);
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-					    pr_debug("\titer%d result: %d\n",
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+					pr_debug("\titer%d result: %d\n",
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 					    grp_iter->idx, zero_sum_result);
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 					slot_cnt -= slots_per_op;
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 					if (slot_cnt == 0)
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@@ -247,9 +238,10 @@
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 	spin_unlock_bh(&iop_chan->lock);
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 }
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-static void iop_adma_tasklet(unsigned long data)
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+static void iop_adma_tasklet(struct tasklet_struct *t)
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 {
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-	struct iop_adma_chan *iop_chan = (struct iop_adma_chan *) data;
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+	struct iop_adma_chan *iop_chan = from_tasklet(iop_chan, t,
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+						      irq_tasklet);
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245
 
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 	/* lockdep will flag depedency submissions as potentially
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 	 * recursive locking, this is not the case as a dependency
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@@ -373,13 +365,11 @@
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 	struct iop_adma_chan *iop_chan = to_iop_adma_chan(tx->chan);
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 	struct iop_adma_desc_slot *grp_start, *old_chain_tail;
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 	int slot_cnt;
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-	int slots_per_op;
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 	dma_cookie_t cookie;
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 	dma_addr_t next_dma;
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 	grp_start = sw_desc->group_head;
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 	slot_cnt = grp_start->slot_cnt;
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-	slots_per_op = grp_start->slots_per_op;
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 	spin_lock_bh(&iop_chan->lock);
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 	cookie = dma_cookie_assign(tx);
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@@ -417,8 +407,7 @@
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 /**
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  * iop_adma_alloc_chan_resources -  returns the number of allocated descriptors
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- * @chan - allocate descriptor resources for this channel
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- * @client - current client requesting the channel be ready for requests
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+ * @chan: allocate descriptor resources for this channel
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  *
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  * Note: We keep the slots for 1 operation on iop_chan->chain at all times.  To
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  * avoid deadlock, via async_xor, num_descs_in_pool must at a minimum be
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@@ -428,6 +417,7 @@
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 static int iop_adma_alloc_chan_resources(struct dma_chan *chan)
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 {
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 	char *hw_desc;
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+	dma_addr_t dma_desc;
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 	int idx;
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 	struct iop_adma_chan *iop_chan = to_iop_adma_chan(chan);
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 	struct iop_adma_desc_slot *slot = NULL;
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@@ -456,9 +446,8 @@
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 		INIT_LIST_HEAD(&slot->tx_list);
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 		INIT_LIST_HEAD(&slot->chain_node);
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 		INIT_LIST_HEAD(&slot->slot_node);
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-		hw_desc = (char *) iop_chan->device->dma_desc_pool;
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-		slot->async_tx.phys =
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-			(dma_addr_t) &hw_desc[idx * IOP_ADMA_SLOT_SIZE];
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+		dma_desc = iop_chan->device->dma_desc_pool;
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+		slot->async_tx.phys = dma_desc + idx * IOP_ADMA_SLOT_SIZE;
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 		slot->idx = idx;
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 		spin_lock_bh(&iop_chan->lock);
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@@ -1308,9 +1297,8 @@
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 		goto err_free_adev;
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 	}
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-	dev_dbg(&pdev->dev, "%s: allocated descriptor pool virt %p phys %p\n",
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-		__func__, adev->dma_desc_pool_virt,
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-		(void *) adev->dma_desc_pool);
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+	dev_dbg(&pdev->dev, "%s: allocated descriptor pool virt %p phys %pad\n",
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+		__func__, adev->dma_desc_pool_virt, &adev->dma_desc_pool);
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 	adev->id = plat_data->hw_id;
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@@ -1363,16 +1351,17 @@
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 		ret = -ENOMEM;
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 		goto err_free_iop_chan;
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 	}
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-	tasklet_init(&iop_chan->irq_tasklet, iop_adma_tasklet, (unsigned long)
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-		iop_chan);
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+	tasklet_setup(&iop_chan->irq_tasklet, iop_adma_tasklet);
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 	/* clear errors before enabling interrupts */
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 	iop_adma_device_clear_err_status(iop_chan);
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 	for (i = 0; i < 3; i++) {
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-		irq_handler_t handler[] = { iop_adma_eot_handler,
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-					iop_adma_eoc_handler,
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-					iop_adma_err_handler };
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+		static const irq_handler_t handler[] = {
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+			iop_adma_eot_handler,
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+			iop_adma_eoc_handler,
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+			iop_adma_err_handler
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+		};
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 		int irq = platform_get_irq(pdev, i);
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 		if (irq < 0) {
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 			ret = -ENXIO;