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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify it |
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| 5 | | - * under the terms of the GNU General Public License as published by the Free |
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| 6 | | - * Software Foundation; either version 2 of the License, or (at your option) |
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| 7 | | - * any later version. |
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| 8 | | - * |
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| 9 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
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| 10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 12 | | - * more details. |
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| 13 | | - * |
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| 14 | | - * The full GNU General Public License is included in this distribution in the |
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| 15 | | - * file called COPYING. |
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| 16 | 4 | */ |
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| 17 | 5 | #ifndef IOATDMA_H |
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| 18 | 6 | #define IOATDMA_H |
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| .. | .. |
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| 27 | 15 | #include "registers.h" |
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| 28 | 16 | #include "hw.h" |
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| 29 | 17 | |
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| 30 | | -#define IOAT_DMA_VERSION "4.00" |
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| 18 | +#define IOAT_DMA_VERSION "5.00" |
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| 31 | 19 | |
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| 32 | 20 | #define IOAT_DMA_DCA_ANY_CPU ~0 |
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| 33 | 21 | |
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| .. | .. |
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| 93 | 81 | u32 msixpba; |
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| 94 | 82 | }; |
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| 95 | 83 | |
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| 84 | +#define IOAT_MAX_ORDER 16 |
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| 85 | +#define IOAT_MAX_DESCS (1 << IOAT_MAX_ORDER) |
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| 86 | +#define IOAT_CHUNK_SIZE (SZ_512K) |
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| 87 | +#define IOAT_DESCS_PER_CHUNK (IOAT_CHUNK_SIZE / IOAT_DESC_SZ) |
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| 88 | + |
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| 96 | 89 | struct ioat_descs { |
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| 97 | 90 | void *virt; |
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| 98 | 91 | dma_addr_t hw; |
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| .. | .. |
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| 138 | 131 | u16 produce; |
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| 139 | 132 | struct ioat_ring_ent **ring; |
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| 140 | 133 | spinlock_t prep_lock; |
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| 141 | | - struct ioat_descs descs[2]; |
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| 134 | + struct ioat_descs descs[IOAT_MAX_DESCS / IOAT_DESCS_PER_CHUNK]; |
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| 142 | 135 | int desc_chunks; |
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| 143 | 136 | int intr_coalesce; |
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| 144 | 137 | int prev_intr_coalesce; |
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| .. | .. |
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| 311 | 304 | return !!err; |
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| 312 | 305 | } |
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| 313 | 306 | |
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| 314 | | -#define IOAT_MAX_ORDER 16 |
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| 315 | | -#define IOAT_MAX_DESCS 65536 |
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| 316 | | -#define IOAT_DESCS_PER_2M 32768 |
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| 317 | 307 | |
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| 318 | 308 | static inline u32 ioat_ring_size(struct ioatdma_chan *ioat_chan) |
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| 319 | 309 | { |
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| .. | .. |
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| 403 | 393 | enum dma_status |
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| 404 | 394 | ioat_tx_status(struct dma_chan *c, dma_cookie_t cookie, |
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| 405 | 395 | struct dma_tx_state *txstate); |
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| 406 | | -void ioat_cleanup_event(unsigned long data); |
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| 396 | +void ioat_cleanup_event(struct tasklet_struct *t); |
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| 407 | 397 | void ioat_timer_event(struct timer_list *t); |
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| 408 | 398 | int ioat_check_space_lock(struct ioatdma_chan *ioat_chan, int num_descs); |
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| 409 | 399 | void ioat_issue_pending(struct dma_chan *chan); |
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